From: Adrian Ratiu <adrian.ratiu@collabora.com> To: Ezequiel Garcia <ezequiel@collabora.com>, Philipp Zabel <p.zabel@pengutronix.de> Cc: Mark Brown <broonie@kernel.org>, Mauro Carvalho Chehab <mchehab@kernel.org>, Fruehberger Peter <Peter.Fruehberger@de.bosch.com>, kuhanh.murugasen.krishnan@intel.com, Daniel Vetter <daniel@ffwll.ch>, kernel@collabora.com, linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 03/18] media: hantro: make G1_REG_SOFT_RESET Rockchip specific Date: Mon, 12 Oct 2020 23:59:42 +0300 [thread overview] Message-ID: <20201012205957.889185-4-adrian.ratiu@collabora.com> (raw) In-Reply-To: <20201012205957.889185-1-adrian.ratiu@collabora.com> This register is not documented in either the G1 or VC8000D register maps and on VC8000D there is a conflict because at the same offset the VPU IP defines another register with a very different meaning. What likely happened is the HW integrator which uses only the G1 IP core added some reset/control logic at the end of the VPU map, so it makes sense to make this register RK-specific. Signed-off-by: Adrian Ratiu <adrian.ratiu@collabora.com> --- drivers/staging/media/hantro/hantro_g1_regs.h | 1 - drivers/staging/media/hantro/rk3288_vpu_hw.c | 4 +++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_g1_regs.h b/drivers/staging/media/hantro/hantro_g1_regs.h index 073b64cbe295..a482a2ba6dfe 100644 --- a/drivers/staging/media/hantro/hantro_g1_regs.h +++ b/drivers/staging/media/hantro/hantro_g1_regs.h @@ -315,7 +315,6 @@ #define G1_REG_REF_BUF_CTRL2_REFBU2_THR(x) (((x) & 0xfff) << 19) #define G1_REG_REF_BUF_CTRL2_REFBU2_PICID(x) (((x) & 0x1f) << 14) #define G1_REG_REF_BUF_CTRL2_APF_THRESHOLD(x) (((x) & 0x3fff) << 0) -#define G1_REG_SOFT_RESET 0x194 /* Post-processor registers. */ #define G1_REG_PP_INTERRUPT G1_SWREG(60) diff --git a/drivers/staging/media/hantro/rk3288_vpu_hw.c b/drivers/staging/media/hantro/rk3288_vpu_hw.c index 7b299ee3e93d..4ad578b1236e 100644 --- a/drivers/staging/media/hantro/rk3288_vpu_hw.c +++ b/drivers/staging/media/hantro/rk3288_vpu_hw.c @@ -13,6 +13,8 @@ #include "hantro_g1_regs.h" #include "hantro_h1_regs.h" +#define VDPU_REG_SOFT_RESET 0x194 + #define RK3288_ACLK_MAX_FREQ (400 * 1000 * 1000) /* @@ -167,7 +169,7 @@ static void rk3288_vpu_dec_reset(struct hantro_ctx *ctx) vdpu_write(vpu, G1_REG_INTERRUPT_DEC_IRQ_DIS, G1_REG_INTERRUPT); vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); - vdpu_write(vpu, 1, G1_REG_SOFT_RESET); + vdpu_write(vpu, 1, VDPU_REG_SOFT_RESET); } /* -- 2.28.0
WARNING: multiple messages have this Message-ID (diff)
From: Adrian Ratiu <adrian.ratiu@collabora.com> To: Ezequiel Garcia <ezequiel@collabora.com>, Philipp Zabel <p.zabel@pengutronix.de> Cc: Fruehberger Peter <Peter.Fruehberger@de.bosch.com>, Mauro Carvalho Chehab <mchehab@kernel.org>, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Mark Brown <broonie@kernel.org>, kuhanh.murugasen.krishnan@intel.com, Daniel Vetter <daniel@ffwll.ch>, kernel@collabora.com, linux-media@vger.kernel.org Subject: [PATCH 03/18] media: hantro: make G1_REG_SOFT_RESET Rockchip specific Date: Mon, 12 Oct 2020 23:59:42 +0300 [thread overview] Message-ID: <20201012205957.889185-4-adrian.ratiu@collabora.com> (raw) In-Reply-To: <20201012205957.889185-1-adrian.ratiu@collabora.com> This register is not documented in either the G1 or VC8000D register maps and on VC8000D there is a conflict because at the same offset the VPU IP defines another register with a very different meaning. What likely happened is the HW integrator which uses only the G1 IP core added some reset/control logic at the end of the VPU map, so it makes sense to make this register RK-specific. Signed-off-by: Adrian Ratiu <adrian.ratiu@collabora.com> --- drivers/staging/media/hantro/hantro_g1_regs.h | 1 - drivers/staging/media/hantro/rk3288_vpu_hw.c | 4 +++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_g1_regs.h b/drivers/staging/media/hantro/hantro_g1_regs.h index 073b64cbe295..a482a2ba6dfe 100644 --- a/drivers/staging/media/hantro/hantro_g1_regs.h +++ b/drivers/staging/media/hantro/hantro_g1_regs.h @@ -315,7 +315,6 @@ #define G1_REG_REF_BUF_CTRL2_REFBU2_THR(x) (((x) & 0xfff) << 19) #define G1_REG_REF_BUF_CTRL2_REFBU2_PICID(x) (((x) & 0x1f) << 14) #define G1_REG_REF_BUF_CTRL2_APF_THRESHOLD(x) (((x) & 0x3fff) << 0) -#define G1_REG_SOFT_RESET 0x194 /* Post-processor registers. */ #define G1_REG_PP_INTERRUPT G1_SWREG(60) diff --git a/drivers/staging/media/hantro/rk3288_vpu_hw.c b/drivers/staging/media/hantro/rk3288_vpu_hw.c index 7b299ee3e93d..4ad578b1236e 100644 --- a/drivers/staging/media/hantro/rk3288_vpu_hw.c +++ b/drivers/staging/media/hantro/rk3288_vpu_hw.c @@ -13,6 +13,8 @@ #include "hantro_g1_regs.h" #include "hantro_h1_regs.h" +#define VDPU_REG_SOFT_RESET 0x194 + #define RK3288_ACLK_MAX_FREQ (400 * 1000 * 1000) /* @@ -167,7 +169,7 @@ static void rk3288_vpu_dec_reset(struct hantro_ctx *ctx) vdpu_write(vpu, G1_REG_INTERRUPT_DEC_IRQ_DIS, G1_REG_INTERRUPT); vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); - vdpu_write(vpu, 1, G1_REG_SOFT_RESET); + vdpu_write(vpu, 1, VDPU_REG_SOFT_RESET); } /* -- 2.28.0 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2020-10-12 20:59 UTC|newest] Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-12 20:59 [PATCH 00/18] Add Hantro regmap and VC8000 h264 decode support Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 20:59 ` [PATCH 01/18] media: hantro: document all int reg bits up to vc8000 Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 20:59 ` [PATCH 02/18] media: hantro: make consistent use of decimal register notation Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu [this message] 2020-10-12 20:59 ` [PATCH 03/18] media: hantro: make G1_REG_SOFT_RESET Rockchip specific Adrian Ratiu 2020-10-12 20:59 ` [PATCH 04/18] media: hantro: add reset controller support Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-13 8:11 ` Philipp Zabel 2020-10-13 8:11 ` Philipp Zabel 2020-10-12 20:59 ` [PATCH 05/18] media: hantro: prepare clocks before variant inits are run Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 20:59 ` [PATCH 06/18] media: hantro: imx8mq: simplify ctrlblk reset logic Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 20:59 ` [PATCH 07/18] regmap: mmio: add config option to allow relaxed MMIO accesses Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-13 10:26 ` Mark Brown 2020-10-13 10:26 ` Mark Brown 2020-10-14 11:51 ` Adrian Ratiu 2020-10-14 11:51 ` Adrian Ratiu 2020-10-14 12:12 ` Mark Brown 2020-10-14 12:12 ` Mark Brown 2020-10-14 13:00 ` Adrian Ratiu 2020-10-14 13:00 ` Adrian Ratiu 2020-10-12 20:59 ` [PATCH 08/18] media: hantro: add initial MMIO regmap infrastructure Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 20:59 ` [PATCH 09/18] media: hantro: default regmap to relaxed MMIO Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 20:59 ` [PATCH 10/18] media: hantro: convert G1 h264 decoder to regmap fields Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 20:59 ` [PATCH 11/18] media: hantro: convert G1 postproc to regmap Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 20:59 ` [PATCH 12/18] media: hantro: add VC8000D h264 decoding Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 20:59 ` [PATCH 13/18] media: hantro: add VC8000D postproc support Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 20:59 ` [PATCH 14/18] media: hantro: make PP enablement logic a bit smarter Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 20:59 ` [PATCH 15/18] media: hantro: add user-selectable, platform-selectable H264 High10 Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 20:59 ` [PATCH 16/18] media: hantro: rename h264_dec as it's not G1 specific anymore Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 20:59 ` [PATCH 17/18] media: hantro: add dump registers debug option before decode start Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 20:59 ` [PATCH 18/18] media: hantro: document encoder reg fields Adrian Ratiu 2020-10-12 20:59 ` Adrian Ratiu 2020-10-12 23:39 ` [PATCH 00/18] Add Hantro regmap and VC8000 h264 decode support Jonas Karlman 2020-10-12 23:39 ` Jonas Karlman 2020-10-13 6:48 ` Adrian Ratiu 2020-10-13 6:48 ` Adrian Ratiu 2020-10-29 12:38 ` Ezequiel Garcia 2020-10-29 12:38 ` Ezequiel Garcia 2020-10-29 16:21 ` Jonas Karlman 2020-10-29 16:21 ` Jonas Karlman 2020-11-03 15:27 ` Ezequiel Garcia 2020-11-03 15:27 ` Ezequiel Garcia 2020-10-29 13:07 ` Ezequiel Garcia 2020-10-29 13:07 ` Ezequiel Garcia 2020-10-29 14:15 ` Robin Murphy 2020-10-29 14:15 ` Robin Murphy 2020-10-29 14:48 ` Mark Brown 2020-10-29 14:48 ` Mark Brown 2020-10-29 16:27 ` Ezequiel Garcia 2020-10-29 16:27 ` Ezequiel Garcia 2020-10-29 17:59 ` Mark Brown 2020-10-29 17:59 ` Mark Brown
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