All of lore.kernel.org
 help / color / mirror / Atom feed
From: Miles Chen <miles.chen@mediatek.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
	Russell King <linux@armlinux.org.uk>,
	Minchan Kim <minchan@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>, <wsd_upstream@mediatek.com>,
	Miles Chen <miles.chen@mediatek.com>,
	Suren Baghdasaryan <surenb@google.com>
Subject: [PATCH v2 4/4] arm: replace vector mem type with read-only type
Date: Fri, 23 Oct 2020 17:14:37 +0800	[thread overview]
Message-ID: <20201023091437.8225-5-miles.chen@mediatek.com> (raw)
In-Reply-To: <20201023091437.8225-1-miles.chen@mediatek.com>

Since kernel no longer writes to the vector, try to replace
the vector mem type with read-only type and remove L_PTE_MT_VECTORS.

from Catalin in [1]:
"
> I don't think this matters since the kernel no longer writes to the
> vectors page at run-time but it needs cleaning up a bit (and testing in
> case I missed something). IOW, do we still need a dedicated mapping type
> for the vectors or we can simply use the read-only user page attributes?
"

[1] https://lore.kernel.org/patchwork/patch/986574/

Cc: Russell King <linux@armlinux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Minchan Kim <minchan@kernel.org>
Cc: Suren Baghdasaryan <surenb@google.com>
Signed-off-by: Miles Chen <miles.chen@mediatek.com>
---
 arch/arm/include/asm/pgtable-2level.h | 1 -
 arch/arm/mm/mmu.c                     | 7 +++----
 arch/arm/mm/proc-macros.S             | 2 +-
 3 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h
index 385e7a32394e..438359d3675f 100644
--- a/arch/arm/include/asm/pgtable-2level.h
+++ b/arch/arm/include/asm/pgtable-2level.h
@@ -163,7 +163,6 @@
 #define L_PTE_MT_WRITETHROUGH	(_AT(pteval_t, 0x02) << 2)	/* 0010 */
 #define L_PTE_MT_WRITEBACK	(_AT(pteval_t, 0x03) << 2)	/* 0011 */
 #define L_PTE_MT_DEV_SHARED	(_AT(pteval_t, 0x04) << 2)	/* 0100 */
-#define L_PTE_MT_VECTORS	(_AT(pteval_t, 0x05) << 2)	/* 0101 */
 #define L_PTE_MT_MINICACHE	(_AT(pteval_t, 0x06) << 2)	/* 0110 (sa1100, xscale) */
 #define L_PTE_MT_WRITEALLOC	(_AT(pteval_t, 0x07) << 2)	/* 0111 */
 #if defined(CONFIG_CPU_V7) || defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index ab69250a86bc..0b6b377e2cce 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -536,12 +536,11 @@ static void __init build_mem_type_table(void)
 
 #ifndef CONFIG_ARM_LPAE
 	/*
-	 * We don't use domains on ARMv6 (since this causes problems with
-	 * v6/v7 kernels), so we must use a separate memory type for user
-	 * r/o, kernel r/w to map the vectors page.
+	 * We no longer write to the vector pages ar run-time, to
+	 * use read-only user page attribute for vector.
 	 */
 	if (cpu_arch == CPU_ARCH_ARMv6)
-		vecs_pgprot |= L_PTE_MT_VECTORS;
+		vecs_pgprot |= L_PTE_RDONLY;
 
 	/*
 	 * Check is it with support for the PXN bit
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index dde1d6374250..f3e6551b4a7e 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -137,7 +137,7 @@
 	.long	PTE_CACHEABLE					@ L_PTE_MT_WRITETHROUGH
 	.long	PTE_CACHEABLE | PTE_BUFFERABLE			@ L_PTE_MT_WRITEBACK
 	.long	PTE_BUFFERABLE					@ L_PTE_MT_DEV_SHARED
-	.long	PTE_CACHEABLE | PTE_BUFFERABLE | PTE_EXT_APX	@ L_PTE_MT_VECTORS
+	.long	0x00						@ unused
 	.long	0x00						@ L_PTE_MT_MINICACHE (not present)
 	.long	PTE_EXT_TEX(1) | PTE_CACHEABLE | PTE_BUFFERABLE	@ L_PTE_MT_WRITEALLOC
 	.long	0x00						@ unused
-- 
2.18.0

WARNING: multiple messages have this Message-ID (diff)
From: Miles Chen <miles.chen@mediatek.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
	Russell King <linux@armlinux.org.uk>,
	Minchan Kim <minchan@kernel.org>
Cc: wsd_upstream@mediatek.com, linux-kernel@vger.kernel.org,
	Miles Chen <miles.chen@mediatek.com>,
	linux-mediatek@lists.infradead.org,
	Suren Baghdasaryan <surenb@google.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 4/4] arm: replace vector mem type with read-only type
Date: Fri, 23 Oct 2020 17:14:37 +0800	[thread overview]
Message-ID: <20201023091437.8225-5-miles.chen@mediatek.com> (raw)
In-Reply-To: <20201023091437.8225-1-miles.chen@mediatek.com>

Since kernel no longer writes to the vector, try to replace
the vector mem type with read-only type and remove L_PTE_MT_VECTORS.

from Catalin in [1]:
"
> I don't think this matters since the kernel no longer writes to the
> vectors page at run-time but it needs cleaning up a bit (and testing in
> case I missed something). IOW, do we still need a dedicated mapping type
> for the vectors or we can simply use the read-only user page attributes?
"

[1] https://lore.kernel.org/patchwork/patch/986574/

Cc: Russell King <linux@armlinux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Minchan Kim <minchan@kernel.org>
Cc: Suren Baghdasaryan <surenb@google.com>
Signed-off-by: Miles Chen <miles.chen@mediatek.com>
---
 arch/arm/include/asm/pgtable-2level.h | 1 -
 arch/arm/mm/mmu.c                     | 7 +++----
 arch/arm/mm/proc-macros.S             | 2 +-
 3 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h
index 385e7a32394e..438359d3675f 100644
--- a/arch/arm/include/asm/pgtable-2level.h
+++ b/arch/arm/include/asm/pgtable-2level.h
@@ -163,7 +163,6 @@
 #define L_PTE_MT_WRITETHROUGH	(_AT(pteval_t, 0x02) << 2)	/* 0010 */
 #define L_PTE_MT_WRITEBACK	(_AT(pteval_t, 0x03) << 2)	/* 0011 */
 #define L_PTE_MT_DEV_SHARED	(_AT(pteval_t, 0x04) << 2)	/* 0100 */
-#define L_PTE_MT_VECTORS	(_AT(pteval_t, 0x05) << 2)	/* 0101 */
 #define L_PTE_MT_MINICACHE	(_AT(pteval_t, 0x06) << 2)	/* 0110 (sa1100, xscale) */
 #define L_PTE_MT_WRITEALLOC	(_AT(pteval_t, 0x07) << 2)	/* 0111 */
 #if defined(CONFIG_CPU_V7) || defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index ab69250a86bc..0b6b377e2cce 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -536,12 +536,11 @@ static void __init build_mem_type_table(void)
 
 #ifndef CONFIG_ARM_LPAE
 	/*
-	 * We don't use domains on ARMv6 (since this causes problems with
-	 * v6/v7 kernels), so we must use a separate memory type for user
-	 * r/o, kernel r/w to map the vectors page.
+	 * We no longer write to the vector pages ar run-time, to
+	 * use read-only user page attribute for vector.
 	 */
 	if (cpu_arch == CPU_ARCH_ARMv6)
-		vecs_pgprot |= L_PTE_MT_VECTORS;
+		vecs_pgprot |= L_PTE_RDONLY;
 
 	/*
 	 * Check is it with support for the PXN bit
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index dde1d6374250..f3e6551b4a7e 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -137,7 +137,7 @@
 	.long	PTE_CACHEABLE					@ L_PTE_MT_WRITETHROUGH
 	.long	PTE_CACHEABLE | PTE_BUFFERABLE			@ L_PTE_MT_WRITEBACK
 	.long	PTE_BUFFERABLE					@ L_PTE_MT_DEV_SHARED
-	.long	PTE_CACHEABLE | PTE_BUFFERABLE | PTE_EXT_APX	@ L_PTE_MT_VECTORS
+	.long	0x00						@ unused
 	.long	0x00						@ L_PTE_MT_MINICACHE (not present)
 	.long	PTE_EXT_TEX(1) | PTE_CACHEABLE | PTE_BUFFERABLE	@ L_PTE_MT_WRITEALLOC
 	.long	0x00						@ unused
-- 
2.18.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Miles Chen <miles.chen@mediatek.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
	Russell King <linux@armlinux.org.uk>,
	Minchan Kim <minchan@kernel.org>
Cc: wsd_upstream@mediatek.com, linux-kernel@vger.kernel.org,
	Miles Chen <miles.chen@mediatek.com>,
	linux-mediatek@lists.infradead.org,
	Suren Baghdasaryan <surenb@google.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 4/4] arm: replace vector mem type with read-only type
Date: Fri, 23 Oct 2020 17:14:37 +0800	[thread overview]
Message-ID: <20201023091437.8225-5-miles.chen@mediatek.com> (raw)
In-Reply-To: <20201023091437.8225-1-miles.chen@mediatek.com>

Since kernel no longer writes to the vector, try to replace
the vector mem type with read-only type and remove L_PTE_MT_VECTORS.

from Catalin in [1]:
"
> I don't think this matters since the kernel no longer writes to the
> vectors page at run-time but it needs cleaning up a bit (and testing in
> case I missed something). IOW, do we still need a dedicated mapping type
> for the vectors or we can simply use the read-only user page attributes?
"

[1] https://lore.kernel.org/patchwork/patch/986574/

Cc: Russell King <linux@armlinux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Minchan Kim <minchan@kernel.org>
Cc: Suren Baghdasaryan <surenb@google.com>
Signed-off-by: Miles Chen <miles.chen@mediatek.com>
---
 arch/arm/include/asm/pgtable-2level.h | 1 -
 arch/arm/mm/mmu.c                     | 7 +++----
 arch/arm/mm/proc-macros.S             | 2 +-
 3 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h
index 385e7a32394e..438359d3675f 100644
--- a/arch/arm/include/asm/pgtable-2level.h
+++ b/arch/arm/include/asm/pgtable-2level.h
@@ -163,7 +163,6 @@
 #define L_PTE_MT_WRITETHROUGH	(_AT(pteval_t, 0x02) << 2)	/* 0010 */
 #define L_PTE_MT_WRITEBACK	(_AT(pteval_t, 0x03) << 2)	/* 0011 */
 #define L_PTE_MT_DEV_SHARED	(_AT(pteval_t, 0x04) << 2)	/* 0100 */
-#define L_PTE_MT_VECTORS	(_AT(pteval_t, 0x05) << 2)	/* 0101 */
 #define L_PTE_MT_MINICACHE	(_AT(pteval_t, 0x06) << 2)	/* 0110 (sa1100, xscale) */
 #define L_PTE_MT_WRITEALLOC	(_AT(pteval_t, 0x07) << 2)	/* 0111 */
 #if defined(CONFIG_CPU_V7) || defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index ab69250a86bc..0b6b377e2cce 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -536,12 +536,11 @@ static void __init build_mem_type_table(void)
 
 #ifndef CONFIG_ARM_LPAE
 	/*
-	 * We don't use domains on ARMv6 (since this causes problems with
-	 * v6/v7 kernels), so we must use a separate memory type for user
-	 * r/o, kernel r/w to map the vectors page.
+	 * We no longer write to the vector pages ar run-time, to
+	 * use read-only user page attribute for vector.
 	 */
 	if (cpu_arch == CPU_ARCH_ARMv6)
-		vecs_pgprot |= L_PTE_MT_VECTORS;
+		vecs_pgprot |= L_PTE_RDONLY;
 
 	/*
 	 * Check is it with support for the PXN bit
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index dde1d6374250..f3e6551b4a7e 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -137,7 +137,7 @@
 	.long	PTE_CACHEABLE					@ L_PTE_MT_WRITETHROUGH
 	.long	PTE_CACHEABLE | PTE_BUFFERABLE			@ L_PTE_MT_WRITEBACK
 	.long	PTE_BUFFERABLE					@ L_PTE_MT_DEV_SHARED
-	.long	PTE_CACHEABLE | PTE_BUFFERABLE | PTE_EXT_APX	@ L_PTE_MT_VECTORS
+	.long	0x00						@ unused
 	.long	0x00						@ L_PTE_MT_MINICACHE (not present)
 	.long	PTE_EXT_TEX(1) | PTE_CACHEABLE | PTE_BUFFERABLE	@ L_PTE_MT_WRITEALLOC
 	.long	0x00						@ unused
-- 
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2020-10-23  9:15 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-23  9:14 [PATCH v2 0/4] arm: support get_user_pages_fast Miles Chen
2020-10-23  9:14 ` Miles Chen
2020-10-23  9:14 ` Miles Chen
2020-10-23  9:14 ` [PATCH v2 1/4] arm: mm: use strict p[gum]d types Miles Chen
2020-10-23  9:14   ` Miles Chen
2020-10-23  9:14   ` Miles Chen
2020-10-23  9:14 ` [PATCH v2 2/4] arm: mm: reordering memory type table Miles Chen
2020-10-23  9:14   ` Miles Chen
2020-10-23  9:14   ` Miles Chen
2020-10-23 10:16   ` Russell King - ARM Linux admin
2020-10-23 10:16     ` Russell King - ARM Linux admin
2020-10-23 10:16     ` Russell King - ARM Linux admin
2020-10-27  8:03     ` Miles Chen
2020-10-27  8:03       ` Miles Chen
2020-10-27  8:03       ` Miles Chen
2020-10-23  9:14 ` [PATCH v2 3/4] arm: mm: introduce L_PTE_SPECIAL Miles Chen
2020-10-23  9:14   ` Miles Chen
2020-10-23  9:14   ` Miles Chen
2020-10-23 10:08   ` Russell King - ARM Linux admin
2020-10-23 10:08     ` Russell King - ARM Linux admin
2020-10-23 10:08     ` Russell King - ARM Linux admin
2020-10-27  7:45     ` Miles Chen
2020-10-27  7:45       ` Miles Chen
2020-10-27  7:45       ` Miles Chen
2020-10-27  9:11       ` Russell King - ARM Linux admin
2020-10-27  9:11         ` Russell King - ARM Linux admin
2020-10-27  9:11         ` Russell King - ARM Linux admin
2020-11-01 12:48         ` Miles Chen
2020-11-01 12:48           ` Miles Chen
2020-11-01 12:48           ` Miles Chen
2020-10-23  9:14 ` Miles Chen [this message]
2020-10-23  9:14   ` [PATCH v2 4/4] arm: replace vector mem type with read-only type Miles Chen
2020-10-23  9:14   ` Miles Chen
2020-10-23 10:12   ` Russell King - ARM Linux admin
2020-10-23 10:12     ` Russell King - ARM Linux admin
2020-10-23 10:12     ` Russell King - ARM Linux admin
2020-10-27  7:41     ` Miles Chen
2020-10-27  7:41       ` Miles Chen
2020-10-27  7:41       ` Miles Chen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201023091437.8225-5-miles.chen@mediatek.com \
    --to=miles.chen@mediatek.com \
    --cc=catalin.marinas@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=linux@armlinux.org.uk \
    --cc=minchan@kernel.org \
    --cc=surenb@google.com \
    --cc=wsd_upstream@mediatek.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.