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From: Anshuman Gupta <anshuman.gupta@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: jani.nikula@intel.com, uma.shankar@intel.com,
	seanpaul@chromium.org, Anshuman Gupta <anshuman.gupta@intel.com>,
	juston.li@intel.com
Subject: [PATCH v4 01/16] drm/i915/hdcp: Update CP property in update_pipe
Date: Tue, 27 Oct 2020 22:11:53 +0530	[thread overview]
Message-ID: <20201027164208.10026-2-anshuman.gupta@intel.com> (raw)
In-Reply-To: <20201027164208.10026-1-anshuman.gupta@intel.com>

When crtc state need_modeset is true it is not necessary
it is going to be a real modeset, it can turns to be a
fastset instead of modeset.
This turns content protection property to be DESIRED and hdcp
update_pipe left with property to be in DESIRED state but
actual hdcp->value was ENABLED.

This issue is caught with DP MST setup, where we have multiple
connector in same DP_MST topology. When disabling HDCP on one of
DP MST connector leads to set the crtc state need_modeset to true
for all other crtc driving the other DP-MST topology connectors.
This turns up other DP MST connectors CP property to be DESIRED
despite the actual hdcp->value is ENABLED.
Above scenario fails the DP MST HDCP IGT test, disabling HDCP on
one MST stream should not cause to disable HDCP on another MST
stream on same DP MST topology.

v2:
Fix WARN_ON(connector->base.registration_state == DRM_CONNECTOR_REGISTERED)
v3:
Commit log improvement. [Uma]
Added a comment before scheduling prop_work. [Uma]

Fixes: 33f9a623bfc6 ("drm/i915/hdcp: Update CP as per the kernel internal state")
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdcp.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index b2a4bbcfdcd2..eee8263405b9 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -2221,6 +2221,14 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
 		desired_and_not_enabled =
 			hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED;
 		mutex_unlock(&hdcp->mutex);
+		/*
+		 * If HDCP already ENABLED and CP property is DESIRED, schedule
+		 * prop_work to update correct CP property to user space.
+		 */
+		if (!desired_and_not_enabled && !content_protection_type_changed) {
+			drm_connector_get(&connector->base);
+			schedule_work(&hdcp->prop_work);
+		}
 	}
 
 	if (desired_and_not_enabled || content_protection_type_changed)
-- 
2.26.2

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: Anshuman Gupta <anshuman.gupta@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: jani.nikula@intel.com, seanpaul@chromium.org
Subject: [Intel-gfx] [PATCH v4 01/16] drm/i915/hdcp: Update CP property in update_pipe
Date: Tue, 27 Oct 2020 22:11:53 +0530	[thread overview]
Message-ID: <20201027164208.10026-2-anshuman.gupta@intel.com> (raw)
In-Reply-To: <20201027164208.10026-1-anshuman.gupta@intel.com>

When crtc state need_modeset is true it is not necessary
it is going to be a real modeset, it can turns to be a
fastset instead of modeset.
This turns content protection property to be DESIRED and hdcp
update_pipe left with property to be in DESIRED state but
actual hdcp->value was ENABLED.

This issue is caught with DP MST setup, where we have multiple
connector in same DP_MST topology. When disabling HDCP on one of
DP MST connector leads to set the crtc state need_modeset to true
for all other crtc driving the other DP-MST topology connectors.
This turns up other DP MST connectors CP property to be DESIRED
despite the actual hdcp->value is ENABLED.
Above scenario fails the DP MST HDCP IGT test, disabling HDCP on
one MST stream should not cause to disable HDCP on another MST
stream on same DP MST topology.

v2:
Fix WARN_ON(connector->base.registration_state == DRM_CONNECTOR_REGISTERED)
v3:
Commit log improvement. [Uma]
Added a comment before scheduling prop_work. [Uma]

Fixes: 33f9a623bfc6 ("drm/i915/hdcp: Update CP as per the kernel internal state")
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdcp.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index b2a4bbcfdcd2..eee8263405b9 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -2221,6 +2221,14 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
 		desired_and_not_enabled =
 			hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED;
 		mutex_unlock(&hdcp->mutex);
+		/*
+		 * If HDCP already ENABLED and CP property is DESIRED, schedule
+		 * prop_work to update correct CP property to user space.
+		 */
+		if (!desired_and_not_enabled && !content_protection_type_changed) {
+			drm_connector_get(&connector->base);
+			schedule_work(&hdcp->prop_work);
+		}
 	}
 
 	if (desired_and_not_enabled || content_protection_type_changed)
-- 
2.26.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-10-27 16:56 UTC|newest]

Thread overview: 111+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-27 16:41 [PATCH v4 00/16] HDCP 2.2 and HDCP 1.4 Gen12 DP MST support Anshuman Gupta
2020-10-27 16:41 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 16:41 ` Anshuman Gupta [this message]
2020-10-27 16:41   ` [Intel-gfx] [PATCH v4 01/16] drm/i915/hdcp: Update CP property in update_pipe Anshuman Gupta
2020-11-02  7:45   ` Shankar, Uma
2020-11-02  7:45     ` [Intel-gfx] " Shankar, Uma
2020-11-05 13:18   ` Ramalingam C
2020-11-05 13:18     ` [Intel-gfx] " Ramalingam C
2020-11-05 13:21     ` Ramalingam C
2020-11-05 13:21       ` Ramalingam C
2020-11-05 13:26       ` Ramalingam C
2020-11-05 13:26         ` Ramalingam C
2020-10-27 16:41 ` [PATCH v4 02/16] drm/i915/hdcp: Get conn while content_type changed Anshuman Gupta
2020-10-27 16:41   ` [Intel-gfx] " Anshuman Gupta
2020-11-02  7:45   ` Shankar, Uma
2020-11-02  7:45     ` [Intel-gfx] " Shankar, Uma
2020-11-05 13:23   ` Ramalingam C
2020-11-05 13:23     ` [Intel-gfx] " Ramalingam C
2020-10-27 16:41 ` [PATCH v4 03/16] drm/i915/hotplug: Handle CP_IRQ for DP-MST Anshuman Gupta
2020-10-27 16:41   ` [Intel-gfx] " Anshuman Gupta
2020-11-06 12:00   ` Ramalingam C
2020-11-06 12:00     ` [Intel-gfx] " Ramalingam C
2020-10-27 16:41 ` [PATCH v4 04/16] drm/i915/hdcp: DP MST transcoder for link and stream Anshuman Gupta
2020-10-27 16:41   ` [Intel-gfx] " Anshuman Gupta
2020-11-05 13:52   ` Ramalingam C
2020-11-05 13:52     ` [Intel-gfx] " Ramalingam C
2020-10-27 16:41 ` [PATCH v4 05/16] drm/i915/hdcp: Move HDCP enc status timeout to header Anshuman Gupta
2020-10-27 16:41   ` [Intel-gfx] " Anshuman Gupta
2020-11-05 13:57   ` Ramalingam C
2020-11-05 13:57     ` [Intel-gfx] " Ramalingam C
2020-10-27 16:41 ` [PATCH v4 06/16] drm/i915/hdcp: HDCP stream encryption support Anshuman Gupta
2020-10-27 16:41   ` [Intel-gfx] " Anshuman Gupta
2020-11-02  7:47   ` Shankar, Uma
2020-11-02  7:47     ` [Intel-gfx] " Shankar, Uma
2020-11-05 15:34   ` Ramalingam C
2020-11-05 15:34     ` [Intel-gfx] " Ramalingam C
2020-11-06  5:22     ` Anshuman Gupta
2020-11-06  5:22       ` [Intel-gfx] " Anshuman Gupta
2020-11-06  7:52       ` Ramalingam C
2020-11-06  7:52         ` [Intel-gfx] " Ramalingam C
2020-10-27 16:41 ` [PATCH v4 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support Anshuman Gupta
2020-10-27 16:41   ` [Intel-gfx] " Anshuman Gupta
2020-11-02  7:47   ` Shankar, Uma
2020-11-02  7:47     ` [Intel-gfx] " Shankar, Uma
2020-11-05 15:41   ` Ramalingam C
2020-11-05 15:41     ` [Intel-gfx] " Ramalingam C
2020-11-06  6:36     ` Anshuman Gupta
2020-11-06  6:36       ` [Intel-gfx] " Anshuman Gupta
2020-10-27 16:42 ` [PATCH v4 08/16] drm/i915/hdcp: Pass dig_port to intel_hdcp_init Anshuman Gupta
2020-10-27 16:42   ` [Intel-gfx] " Anshuman Gupta
2020-11-05 16:39   ` Ramalingam C
2020-11-05 16:39     ` [Intel-gfx] " Ramalingam C
2020-11-06  4:50     ` Anshuman Gupta
2020-11-06  4:50       ` [Intel-gfx] " Anshuman Gupta
2020-11-06  7:48       ` Ramalingam C
2020-11-06  7:48         ` [Intel-gfx] " Ramalingam C
2020-10-27 16:42 ` [PATCH v4 09/16] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port Anshuman Gupta
2020-10-27 16:42   ` [Intel-gfx] " Anshuman Gupta
2020-11-06 11:34   ` Ramalingam C
2020-11-06 11:34     ` [Intel-gfx] " Ramalingam C
2020-10-27 16:42 ` [PATCH v4 10/16] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len Anshuman Gupta
2020-10-27 16:42   ` [Intel-gfx] " Anshuman Gupta
2020-11-05 16:07   ` Ramalingam C
2020-11-05 16:07     ` [Intel-gfx] " Ramalingam C
2020-10-27 16:42 ` [PATCH v4 11/16] drm/hdcp: Max MST content streams Anshuman Gupta
2020-10-27 16:42   ` [Intel-gfx] " Anshuman Gupta
2020-11-05 16:09   ` Ramalingam C
2020-11-05 16:09     ` [Intel-gfx] " Ramalingam C
2020-10-27 16:42 ` [PATCH v4 12/16] drm/i915/hdcp: MST streams support in hdcp port_data Anshuman Gupta
2020-10-27 16:42   ` [Intel-gfx] " Anshuman Gupta
2020-11-02  7:49   ` Shankar, Uma
2020-11-02  7:49     ` [Intel-gfx] " Shankar, Uma
2020-11-05 16:34   ` Ramalingam C
2020-11-05 16:34     ` [Intel-gfx] " Ramalingam C
2020-11-06  6:35     ` Anshuman Gupta
2020-11-06  6:35       ` [Intel-gfx] " Anshuman Gupta
2020-11-06 11:28       ` Ramalingam C
2020-11-06 11:28         ` [Intel-gfx] " Ramalingam C
2020-10-27 16:42 ` [PATCH v4 13/16] drm/i915/hdcp: Pass connector to check_2_2_link Anshuman Gupta
2020-10-27 16:42   ` [Intel-gfx] " Anshuman Gupta
2020-11-05 16:45   ` Ramalingam C
2020-11-05 16:45     ` [Intel-gfx] " Ramalingam C
2020-11-06  5:08     ` Anshuman Gupta
2020-11-06  5:08       ` [Intel-gfx] " Anshuman Gupta
2020-10-27 16:42 ` [PATCH v4 14/16] drm/i915/hdcp: Add HDCP 2.2 stream register Anshuman Gupta
2020-10-27 16:42   ` [Intel-gfx] " Anshuman Gupta
2020-11-05 16:47   ` Ramalingam C
2020-11-05 16:47     ` [Intel-gfx] " Ramalingam C
2020-10-27 16:42 ` [PATCH v4 15/16] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks Anshuman Gupta
2020-10-27 16:42   ` [Intel-gfx] " Anshuman Gupta
2020-11-02  7:49   ` Shankar, Uma
2020-11-02  7:49     ` [Intel-gfx] " Shankar, Uma
2020-11-03  6:27   ` Anshuman Gupta
2020-11-06  9:27     ` Ramalingam C
2020-11-06 11:12       ` Ramalingam C
2020-11-09  5:36         ` Anshuman Gupta
2020-11-09  8:38           ` Ramalingam C
2020-10-27 16:42 ` [PATCH v4 16/16] drm/i915/hdcp: Enable HDCP 2.2 MST support Anshuman Gupta
2020-10-27 16:42   ` [Intel-gfx] " Anshuman Gupta
2020-11-06 11:58   ` Ramalingam C
2020-11-06 11:58     ` [Intel-gfx] " Ramalingam C
2020-10-28  2:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev2) Patchwork
2020-10-28  2:49 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-28  3:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-28  6:40 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-10-29  8:37   ` Anshuman Gupta
2020-10-29 22:11     ` Vudum, Lakshminarayana
2020-10-29 17:40 ` Patchwork
2020-10-29 17:54 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2020-11-02  9:02   ` Anshuman Gupta
2020-11-03  7:05 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev3) Patchwork

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