From: Yifeng Zhao <yifeng.zhao@rock-chips.com>
To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
robh+dt@kernel.org
Cc: devicetree@vger.kernel.org, heiko@sntech.de,
Yifeng Zhao <yifeng.zhao@rock-chips.com>,
linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-mtd@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v13 1/8] dt-bindings: mtd: Describe Rockchip RK3xxx NAND flash controller
Date: Wed, 28 Oct 2020 17:53:23 +0800 [thread overview]
Message-ID: <20201028095326.15562-2-yifeng.zhao@rock-chips.com> (raw)
In-Reply-To: <20201028095326.15562-1-yifeng.zhao@rock-chips.com>
Documentation support for Rockchip RK3xxx NAND flash controllers
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
---
Changes in v13: None
Changes in v12:
- Fix some warnings while make dt_binding_check
- Drop a allOf defined
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- Fix a error while make dt_binding_check
Changes in v7:
- Fix some wrong define
Changes in v6:
- Fix some wrong define
- Modified the definition of compatible
Changes in v5:
- Fix some wrong define.
- Add boot-medium define.
- Remove some compatible define.
Changes in v4:
- The compatible define with rkxx_nfc.
- Add assigned-clocks.
- Fix some wrong defineChanges in.
Changes in v3:
- Change the title for the dt-bindings.
Changes in v2: None
.../mtd/rockchip,nand-controller.yaml | 161 ++++++++++++++++++
1 file changed, 161 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
diff --git a/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
new file mode 100644
index 000000000000..0922536b1811
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
@@ -0,0 +1,161 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip SoCs NAND FLASH Controller (NFC)
+
+allOf:
+ - $ref: "nand-controller.yaml#"
+
+maintainers:
+ - Heiko Stuebner <heiko@sntech.de>
+
+properties:
+ compatible:
+ oneOf:
+ - const: rockchip,px30-nfc
+ - const: rockchip,rk2928-nfc
+ - const: rockchip,rv1108-nfc
+ - items:
+ - const: rockchip,rk3036-nfc
+ - const: rockchip,rk2928-nfc
+ - items:
+ - const: rockchip,rk3308-nfc
+ - const: rockchip,rv1108-nfc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ items:
+ - description: Bus Clock
+ - description: Module Clock
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: ahb
+ - const: nfc
+
+ assigned-clocks:
+ maxItems: 1
+
+ assigned-clock-rates:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+patternProperties:
+ "^nand@[0-7]$":
+ type: object
+ properties:
+ reg:
+ minimum: 0
+ maximum: 7
+
+ nand-ecc-mode:
+ const: hw
+
+ nand-ecc-step-size:
+ const: 1024
+
+ nand-ecc-strength:
+ enum: [16, 24, 40, 60, 70]
+ description: |
+ The ECC configurations that can be supported are as follows.
+ NFC v600 ECC 16, 24, 40, 60
+ RK2928, RK3066, RK3188
+
+ NFC v622 ECC 16, 24, 40, 60
+ RK3036, RK3128
+
+ NFC v800 ECC 16
+ RK3308, RV1108
+
+ NFC v900 ECC 16, 40, 60, 70
+ RK3326, PX30
+
+ nand-bus-width:
+ const: 8
+
+ rockchip,boot-blks:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 2
+ default: 16
+ description:
+ The NFC driver need this information to select ECC
+ algorithms supported by the boot ROM.
+ Only used in combination with 'nand-is-boot-medium'.
+
+ rockchip,boot-ecc-strength:
+ enum: [16, 24, 40, 60, 70]
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ If specified it indicates that a different BCH/ECC setting is
+ supported by the boot ROM.
+ NFC v600 ECC 16, 24
+ RK2928, RK3066, RK3188
+
+ NFC v622 ECC 16, 24, 40, 60
+ RK3036, RK3128
+
+ NFC v800 ECC 16
+ RK3308, RV1108
+
+ NFC v900 ECC 16, 70
+ RK3326, PX30
+
+ Only used in combination with 'nand-is-boot-medium'.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/rk3308-cru.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ nfc: nand-controller@ff4b0000 {
+ compatible = "rockchip,rk3308-nfc",
+ "rockchip,rv1108-nfc";
+ reg = <0xff4b0000 0x4000>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
+ clock-names = "ahb", "nfc";
+ assigned-clocks = <&clks SCLK_NANDC>;
+ assigned-clock-rates = <150000000>;
+
+ pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0
+ &flash_rdn &flash_rdy &flash_wrn>;
+ pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ nand@0 {
+ reg = <0>;
+ label = "rk-nand";
+ nand-bus-width = <8>;
+ nand-ecc-mode = "hw";
+ nand-ecc-step-size = <1024>;
+ nand-ecc-strength = <16>;
+ nand-is-boot-medium;
+ rockchip,boot-blks = <8>;
+ rockchip,boot-ecc-strength = <16>;
+ };
+ };
+
+...
--
2.17.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Yifeng Zhao <yifeng.zhao@rock-chips.com>
To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
robh+dt@kernel.org
Cc: devicetree@vger.kernel.org, heiko@sntech.de,
Yifeng Zhao <yifeng.zhao@rock-chips.com>,
linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-mtd@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v13 1/8] dt-bindings: mtd: Describe Rockchip RK3xxx NAND flash controller
Date: Wed, 28 Oct 2020 17:53:23 +0800 [thread overview]
Message-ID: <20201028095326.15562-2-yifeng.zhao@rock-chips.com> (raw)
In-Reply-To: <20201028095326.15562-1-yifeng.zhao@rock-chips.com>
Documentation support for Rockchip RK3xxx NAND flash controllers
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
---
Changes in v13: None
Changes in v12:
- Fix some warnings while make dt_binding_check
- Drop a allOf defined
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- Fix a error while make dt_binding_check
Changes in v7:
- Fix some wrong define
Changes in v6:
- Fix some wrong define
- Modified the definition of compatible
Changes in v5:
- Fix some wrong define.
- Add boot-medium define.
- Remove some compatible define.
Changes in v4:
- The compatible define with rkxx_nfc.
- Add assigned-clocks.
- Fix some wrong defineChanges in.
Changes in v3:
- Change the title for the dt-bindings.
Changes in v2: None
.../mtd/rockchip,nand-controller.yaml | 161 ++++++++++++++++++
1 file changed, 161 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
diff --git a/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
new file mode 100644
index 000000000000..0922536b1811
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
@@ -0,0 +1,161 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip SoCs NAND FLASH Controller (NFC)
+
+allOf:
+ - $ref: "nand-controller.yaml#"
+
+maintainers:
+ - Heiko Stuebner <heiko@sntech.de>
+
+properties:
+ compatible:
+ oneOf:
+ - const: rockchip,px30-nfc
+ - const: rockchip,rk2928-nfc
+ - const: rockchip,rv1108-nfc
+ - items:
+ - const: rockchip,rk3036-nfc
+ - const: rockchip,rk2928-nfc
+ - items:
+ - const: rockchip,rk3308-nfc
+ - const: rockchip,rv1108-nfc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ items:
+ - description: Bus Clock
+ - description: Module Clock
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: ahb
+ - const: nfc
+
+ assigned-clocks:
+ maxItems: 1
+
+ assigned-clock-rates:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+patternProperties:
+ "^nand@[0-7]$":
+ type: object
+ properties:
+ reg:
+ minimum: 0
+ maximum: 7
+
+ nand-ecc-mode:
+ const: hw
+
+ nand-ecc-step-size:
+ const: 1024
+
+ nand-ecc-strength:
+ enum: [16, 24, 40, 60, 70]
+ description: |
+ The ECC configurations that can be supported are as follows.
+ NFC v600 ECC 16, 24, 40, 60
+ RK2928, RK3066, RK3188
+
+ NFC v622 ECC 16, 24, 40, 60
+ RK3036, RK3128
+
+ NFC v800 ECC 16
+ RK3308, RV1108
+
+ NFC v900 ECC 16, 40, 60, 70
+ RK3326, PX30
+
+ nand-bus-width:
+ const: 8
+
+ rockchip,boot-blks:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 2
+ default: 16
+ description:
+ The NFC driver need this information to select ECC
+ algorithms supported by the boot ROM.
+ Only used in combination with 'nand-is-boot-medium'.
+
+ rockchip,boot-ecc-strength:
+ enum: [16, 24, 40, 60, 70]
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ If specified it indicates that a different BCH/ECC setting is
+ supported by the boot ROM.
+ NFC v600 ECC 16, 24
+ RK2928, RK3066, RK3188
+
+ NFC v622 ECC 16, 24, 40, 60
+ RK3036, RK3128
+
+ NFC v800 ECC 16
+ RK3308, RV1108
+
+ NFC v900 ECC 16, 70
+ RK3326, PX30
+
+ Only used in combination with 'nand-is-boot-medium'.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/rk3308-cru.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ nfc: nand-controller@ff4b0000 {
+ compatible = "rockchip,rk3308-nfc",
+ "rockchip,rv1108-nfc";
+ reg = <0xff4b0000 0x4000>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
+ clock-names = "ahb", "nfc";
+ assigned-clocks = <&clks SCLK_NANDC>;
+ assigned-clock-rates = <150000000>;
+
+ pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0
+ &flash_rdn &flash_rdy &flash_wrn>;
+ pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ nand@0 {
+ reg = <0>;
+ label = "rk-nand";
+ nand-bus-width = <8>;
+ nand-ecc-mode = "hw";
+ nand-ecc-step-size = <1024>;
+ nand-ecc-strength = <16>;
+ nand-is-boot-medium;
+ rockchip,boot-blks = <8>;
+ rockchip,boot-ecc-strength = <16>;
+ };
+ };
+
+...
--
2.17.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Yifeng Zhao <yifeng.zhao@rock-chips.com>
To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
robh+dt@kernel.org
Cc: devicetree@vger.kernel.org, heiko@sntech.de,
Yifeng Zhao <yifeng.zhao@rock-chips.com>,
linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-mtd@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v13 1/8] dt-bindings: mtd: Describe Rockchip RK3xxx NAND flash controller
Date: Wed, 28 Oct 2020 17:53:23 +0800 [thread overview]
Message-ID: <20201028095326.15562-2-yifeng.zhao@rock-chips.com> (raw)
In-Reply-To: <20201028095326.15562-1-yifeng.zhao@rock-chips.com>
Documentation support for Rockchip RK3xxx NAND flash controllers
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
---
Changes in v13: None
Changes in v12:
- Fix some warnings while make dt_binding_check
- Drop a allOf defined
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- Fix a error while make dt_binding_check
Changes in v7:
- Fix some wrong define
Changes in v6:
- Fix some wrong define
- Modified the definition of compatible
Changes in v5:
- Fix some wrong define.
- Add boot-medium define.
- Remove some compatible define.
Changes in v4:
- The compatible define with rkxx_nfc.
- Add assigned-clocks.
- Fix some wrong defineChanges in.
Changes in v3:
- Change the title for the dt-bindings.
Changes in v2: None
.../mtd/rockchip,nand-controller.yaml | 161 ++++++++++++++++++
1 file changed, 161 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
diff --git a/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
new file mode 100644
index 000000000000..0922536b1811
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
@@ -0,0 +1,161 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip SoCs NAND FLASH Controller (NFC)
+
+allOf:
+ - $ref: "nand-controller.yaml#"
+
+maintainers:
+ - Heiko Stuebner <heiko@sntech.de>
+
+properties:
+ compatible:
+ oneOf:
+ - const: rockchip,px30-nfc
+ - const: rockchip,rk2928-nfc
+ - const: rockchip,rv1108-nfc
+ - items:
+ - const: rockchip,rk3036-nfc
+ - const: rockchip,rk2928-nfc
+ - items:
+ - const: rockchip,rk3308-nfc
+ - const: rockchip,rv1108-nfc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ items:
+ - description: Bus Clock
+ - description: Module Clock
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: ahb
+ - const: nfc
+
+ assigned-clocks:
+ maxItems: 1
+
+ assigned-clock-rates:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+patternProperties:
+ "^nand@[0-7]$":
+ type: object
+ properties:
+ reg:
+ minimum: 0
+ maximum: 7
+
+ nand-ecc-mode:
+ const: hw
+
+ nand-ecc-step-size:
+ const: 1024
+
+ nand-ecc-strength:
+ enum: [16, 24, 40, 60, 70]
+ description: |
+ The ECC configurations that can be supported are as follows.
+ NFC v600 ECC 16, 24, 40, 60
+ RK2928, RK3066, RK3188
+
+ NFC v622 ECC 16, 24, 40, 60
+ RK3036, RK3128
+
+ NFC v800 ECC 16
+ RK3308, RV1108
+
+ NFC v900 ECC 16, 40, 60, 70
+ RK3326, PX30
+
+ nand-bus-width:
+ const: 8
+
+ rockchip,boot-blks:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 2
+ default: 16
+ description:
+ The NFC driver need this information to select ECC
+ algorithms supported by the boot ROM.
+ Only used in combination with 'nand-is-boot-medium'.
+
+ rockchip,boot-ecc-strength:
+ enum: [16, 24, 40, 60, 70]
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ If specified it indicates that a different BCH/ECC setting is
+ supported by the boot ROM.
+ NFC v600 ECC 16, 24
+ RK2928, RK3066, RK3188
+
+ NFC v622 ECC 16, 24, 40, 60
+ RK3036, RK3128
+
+ NFC v800 ECC 16
+ RK3308, RV1108
+
+ NFC v900 ECC 16, 70
+ RK3326, PX30
+
+ Only used in combination with 'nand-is-boot-medium'.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/rk3308-cru.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ nfc: nand-controller@ff4b0000 {
+ compatible = "rockchip,rk3308-nfc",
+ "rockchip,rv1108-nfc";
+ reg = <0xff4b0000 0x4000>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
+ clock-names = "ahb", "nfc";
+ assigned-clocks = <&clks SCLK_NANDC>;
+ assigned-clock-rates = <150000000>;
+
+ pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0
+ &flash_rdn &flash_rdy &flash_wrn>;
+ pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ nand@0 {
+ reg = <0>;
+ label = "rk-nand";
+ nand-bus-width = <8>;
+ nand-ecc-mode = "hw";
+ nand-ecc-step-size = <1024>;
+ nand-ecc-strength = <16>;
+ nand-is-boot-medium;
+ rockchip,boot-blks = <8>;
+ rockchip,boot-ecc-strength = <16>;
+ };
+ };
+
+...
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-10-28 9:56 UTC|newest]
Thread overview: 95+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-28 9:53 [PATCH v13 0/8] Add Rockchip NFC drivers for RK3308 and others Yifeng Zhao
2020-10-28 9:53 ` Yifeng Zhao
2020-10-28 9:53 ` Yifeng Zhao
2020-10-28 9:53 ` Yifeng Zhao [this message]
2020-10-28 9:53 ` [PATCH v13 1/8] dt-bindings: mtd: Describe Rockchip RK3xxx NAND flash controller Yifeng Zhao
2020-10-28 9:53 ` Yifeng Zhao
2020-10-28 9:53 ` [PATCH v13 2/8] mtd: rawnand: rockchip: NFC drivers for RK3308, RK2928 and others Yifeng Zhao
2020-10-28 9:53 ` Yifeng Zhao
2020-10-28 9:53 ` Yifeng Zhao
2020-10-28 10:48 ` Miquel Raynal
2020-10-28 10:48 ` Miquel Raynal
2020-10-28 10:48 ` Miquel Raynal
2020-10-28 10:48 ` Miquel Raynal
2020-10-30 10:12 ` 赵仪峰
2020-10-30 10:12 ` 赵仪峰
2020-10-30 10:12 ` 赵仪峰
2020-10-30 10:12 ` 赵仪峰
2020-10-30 10:26 ` Miquel Raynal
2020-10-30 10:26 ` Miquel Raynal
2020-10-30 10:26 ` Miquel Raynal
2020-10-30 10:26 ` Miquel Raynal
2020-10-31 11:58 ` Johan Jonker
2020-10-31 11:58 ` Johan Jonker
2020-10-31 11:58 ` Johan Jonker
2020-10-31 11:58 ` Johan Jonker
2020-10-31 13:45 ` Johan Jonker
2020-10-31 13:45 ` Johan Jonker
2020-10-31 13:45 ` Johan Jonker
2020-10-31 13:45 ` Johan Jonker
2020-11-02 3:46 ` 赵仪峰
2020-11-02 3:46 ` 赵仪峰
2020-11-02 3:46 ` 赵仪峰
2020-11-02 3:46 ` 赵仪峰
2020-11-02 7:32 ` Miquel Raynal
2020-11-02 7:32 ` Miquel Raynal
2020-11-02 7:32 ` Miquel Raynal
2020-11-02 7:32 ` Miquel Raynal
2020-11-02 8:14 ` 赵仪峰
2020-11-02 8:14 ` 赵仪峰
2020-11-02 8:14 ` 赵仪峰
2020-11-02 8:14 ` 赵仪峰
2020-11-02 8:20 ` Miquel Raynal
2020-11-02 8:20 ` Miquel Raynal
2020-11-02 8:20 ` Miquel Raynal
2020-11-02 8:20 ` Miquel Raynal
[not found] ` <e02e13a0-769d-6b73-c87e-5b7d75fd4254@rock-chips.com>
2020-11-02 12:57 ` Johan Jonker
2020-11-02 12:57 ` Johan Jonker
2020-11-02 12:57 ` Johan Jonker
2020-11-02 12:57 ` Johan Jonker
2020-11-02 13:07 ` Miquel Raynal
2020-11-02 13:07 ` Miquel Raynal
2020-11-02 13:07 ` Miquel Raynal
2020-11-02 13:07 ` Miquel Raynal
2020-11-02 13:11 ` Johan Jonker
2020-11-02 13:11 ` Johan Jonker
2020-11-02 13:11 ` Johan Jonker
2020-11-02 13:11 ` Johan Jonker
2020-11-02 16:31 ` Johan Jonker
2020-11-02 16:31 ` Johan Jonker
2020-11-02 16:31 ` Johan Jonker
2020-11-02 16:31 ` Johan Jonker
2020-11-02 17:00 ` Miquel Raynal
2020-11-02 17:00 ` Miquel Raynal
2020-11-02 17:00 ` Miquel Raynal
2020-11-02 17:00 ` Miquel Raynal
2020-11-02 17:11 ` Johan Jonker
2020-11-02 17:11 ` Johan Jonker
2020-11-02 17:11 ` Johan Jonker
2020-11-02 17:11 ` Johan Jonker
2020-11-04 7:30 ` 赵仪峰
2020-11-04 7:30 ` 赵仪峰
2020-11-04 7:30 ` 赵仪峰
2020-11-04 7:30 ` 赵仪峰
2020-11-04 7:34 ` 赵仪峰
2020-11-04 7:34 ` 赵仪峰
2020-11-04 7:34 ` 赵仪峰
2020-11-04 7:34 ` 赵仪峰
2020-10-28 9:53 ` [PATCH v13 3/8] MAINTAINERS: add maintainers to ROCKCHIP NFC Yifeng Zhao
2020-10-28 9:53 ` Yifeng Zhao
2020-10-28 9:53 ` Yifeng Zhao
2020-10-28 9:53 ` [PATCH v13 4/8] arm64: dts: rockchip: Add NFC node for RK3308 SoC Yifeng Zhao
2020-10-28 9:53 ` Yifeng Zhao
2020-10-28 9:53 ` Yifeng Zhao
2020-10-28 9:54 ` [PATCH v13 5/8] arm64: dts: rockchip: Add NFC node for PX30 SoC Yifeng Zhao
2020-10-28 9:54 ` Yifeng Zhao
2020-10-28 9:54 ` Yifeng Zhao
2020-10-28 9:54 ` [PATCH v13 6/8] arm: dts: rockchip: Add NFC node for RV1108 SoC Yifeng Zhao
2020-10-28 9:54 ` Yifeng Zhao
2020-10-28 9:54 ` Yifeng Zhao
2020-10-28 9:54 ` [PATCH v13 7/8] arm: dts: rockchip: Add NFC node for RK2928 and other SoCs Yifeng Zhao
2020-10-28 9:54 ` Yifeng Zhao
2020-10-28 9:54 ` Yifeng Zhao
2020-10-28 9:54 ` [PATCH v13 8/8] arm: dts: rockchip: Add NFC node for RK3036 SoC Yifeng Zhao
2020-10-28 9:54 ` Yifeng Zhao
2020-10-28 9:54 ` Yifeng Zhao
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201028095326.15562-2-yifeng.zhao@rock-chips.com \
--to=yifeng.zhao@rock-chips.com \
--cc=devicetree@vger.kernel.org \
--cc=heiko@sntech.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=miquel.raynal@bootlin.com \
--cc=richard@nod.at \
--cc=robh+dt@kernel.org \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.