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From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [v9 03/12] drm/i915/display: Attach HDR property for capable Gen9 devices
Date: Tue,  3 Nov 2020 20:58:25 +0530	[thread overview]
Message-ID: <20201103152834.12727-4-uma.shankar@intel.com> (raw)
In-Reply-To: <20201103152834.12727-1-uma.shankar@intel.com>

Attach HDR property for Gen9 devices with MCA LSPCON
chips.

v2: Cleaned HDR property attachment logic based on capability
as per Jani Nikula's suggestion.

v3: Fixed the HDR property attachment logic as per the new changes
by Kai-Feng to align with lspcon detection failure on some devices.

v4: Add HDR proprty in late_register to handle lspcon detection,
as suggested by Ville.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 11 +++++++++++
 drivers/gpu/drm/i915/display/intel_lspcon.c |  2 +-
 drivers/gpu/drm/i915/display/intel_lspcon.h |  1 +
 3 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index cf09aca7607b..0ce3204473fa 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6714,6 +6714,8 @@ intel_dp_connector_register(struct drm_connector *connector)
 {
 	struct drm_i915_private *i915 = to_i915(connector->dev);
 	struct intel_dp *intel_dp = intel_attached_dp(to_intel_connector(connector));
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+	struct intel_lspcon *lspcon = &dig_port->lspcon;
 	int ret;
 
 	ret = intel_connector_register(connector);
@@ -6727,6 +6729,15 @@ intel_dp_connector_register(struct drm_connector *connector)
 	ret = drm_dp_aux_register(&intel_dp->aux);
 	if (!ret)
 		drm_dp_cec_register_connector(&intel_dp->aux, connector);
+
+	if (lspcon_init(dig_port)) {
+		lspcon_detect_hdr_capability(lspcon);
+		if (lspcon->hdr_supported)
+			drm_object_attach_property(&connector->base,
+						   connector->dev->mode_config.hdr_output_metadata_property,
+						   0);
+	}
+
 	return ret;
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 46565ae555b1..336494b60d11 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -553,7 +553,7 @@ void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon)
 	lspcon_wait_mode(lspcon, DRM_LSPCON_MODE_PCON);
 }
 
-static bool lspcon_init(struct intel_digital_port *dig_port)
+bool lspcon_init(struct intel_digital_port *dig_port)
 {
 	struct intel_dp *dp = &dig_port->dp;
 	struct intel_lspcon *lspcon = &dig_port->lspcon;
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h
index 98043ba50dd4..42ccb21c908f 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.h
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.h
@@ -15,6 +15,7 @@ struct intel_digital_port;
 struct intel_encoder;
 struct intel_lspcon;
 
+bool lspcon_init(struct intel_digital_port *dig_port);
 void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon);
 void lspcon_resume(struct intel_digital_port *dig_port);
 void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon);
-- 
2.26.2

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  parent reply	other threads:[~2020-11-03 14:54 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-03 15:28 [Intel-gfx] [v9 00/12] Enable HDR on MCA LSPCON based Gen9 devices Uma Shankar
2020-11-03 15:28 ` [Intel-gfx] [v9 01/12] drm/i915/display: Add HDR Capability detection for LSPCON Uma Shankar
2020-11-25 16:30   ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 02/12] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon Uma Shankar
2020-11-25 16:37   ` Ville Syrjälä
2020-11-03 15:28 ` Uma Shankar [this message]
2020-11-04  7:30   ` [Intel-gfx] [v10 03/12] drm/i915/display: Attach HDR property for capable Gen9 devices Uma Shankar
2020-11-25 16:36     ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 04/12] drm/i915/display: Attach content type property for LSPCON Uma Shankar
2020-11-25 16:29   ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 05/12] drm/i915/display: Nuke bogus lspcon check Uma Shankar
2020-11-25 16:29   ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 06/12] drm/i915/display: Enable BT2020 for HDR on LSPCON devices Uma Shankar
2020-11-25 16:40   ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 07/12] drm/i915/display: Enable HDR for Parade based lspcon Uma Shankar
2020-11-25 16:42   ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 08/12] drm/i915/display: Implement infoframes readback for LSPCON Uma Shankar
2020-11-25 16:46   ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 09/12] drm/i915/display: Implement DRM infoframe read " Uma Shankar
2020-11-25 16:50   ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 10/12] drm/i915/lspcon: Create separate infoframe_enabled helper Uma Shankar
2020-11-25 16:56   ` Ville Syrjälä
2020-11-26  7:45     ` Shankar, Uma
2020-11-03 15:28 ` [Intel-gfx] [v9 11/12] drm/i915/lspcon: Do not send DRM infoframes to non-HDMI sinks Uma Shankar
2020-11-03 15:28 ` [Intel-gfx] [v9 12/12] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON Uma Shankar
2020-11-03 15:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev9) Patchwork
2020-11-03 15:48 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-03 16:08 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-11-04  7:22 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev10) Patchwork
2020-11-04  7:24 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-04  7:41 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-04  9:40 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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