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From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Vipin Anand <vipin.anand@intel.com>
Subject: [Intel-gfx] [v11 08/13] drm/i915/display: Enable HDR for Parade based lspcon
Date: Thu, 26 Nov 2020 13:44:40 +0530	[thread overview]
Message-ID: <20201126081445.29759-9-uma.shankar@intel.com> (raw)
In-Reply-To: <20201126081445.29759-1-uma.shankar@intel.com>

Enable HDR for LSPCON based on Parade along with MCA.

v2: Added a helper for status reg as suggested by Ville.

v3: Removed a redundant variable, added Ville's RB.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Vipin Anand <vipin.anand@intel.com>
Reviewed-by: Ville Syrjä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_lspcon.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index f6f58a991e7a..1d3dffade168 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -36,6 +36,7 @@
 #define LSPCON_VENDOR_MCA_OUI 0x0060AD
 
 #define DPCD_MCA_LSPCON_HDR_STATUS	0x70003
+#define DPCD_PARADE_LSPCON_HDR_STATUS	0x00511
 
 /* AUX addresses to write MCA AVI IF */
 #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0
@@ -106,6 +107,14 @@ static bool lspcon_detect_vendor(struct intel_lspcon *lspcon)
 	return true;
 }
 
+static u32 get_hdr_status_reg(struct intel_lspcon *lspcon)
+{
+	if (lspcon->vendor == LSPCON_VENDOR_MCA)
+		return DPCD_MCA_LSPCON_HDR_STATUS;
+	else
+		return DPCD_PARADE_LSPCON_HDR_STATUS;
+}
+
 void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon)
 {
 	struct intel_digital_port *dig_port =
@@ -115,12 +124,8 @@ void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon)
 	u8 hdr_caps;
 	int ret;
 
-	/* Enable HDR for MCA based LSPCON devices */
-	if (lspcon->vendor == LSPCON_VENDOR_MCA)
-		ret = drm_dp_dpcd_read(&dp->aux, DPCD_MCA_LSPCON_HDR_STATUS,
-				       &hdr_caps, 1);
-	else
-		return;
+	ret = drm_dp_dpcd_read(&dp->aux, get_hdr_status_reg(lspcon),
+			       &hdr_caps, 1);
 
 	if (ret < 0) {
 		drm_dbg_kms(dev, "HDR capability detection failed\n");
-- 
2.26.2

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  parent reply	other threads:[~2020-11-26  7:41 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-26  8:14 [Intel-gfx] [v11 00/13] Enable HDR on MCA LSPCON based Gen9 devices Uma Shankar
2020-11-26  8:14 ` [Intel-gfx] [v11 01/13] drm/i915/display: Add HDR Capability detection for LSPCON Uma Shankar
2020-11-26 16:26   ` Ville Syrjälä
2020-11-26 20:10     ` Shankar, Uma
2020-11-26  8:14 ` [Intel-gfx] [v11 02/13] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon Uma Shankar
2020-11-26  8:14 ` [Intel-gfx] [v11 03/13] drm/i915/display: Attach HDR property for capable Gen9 devices Uma Shankar
2020-11-26  8:14 ` [Intel-gfx] [v11 04/13] drm/i915/display: Enable quantization range for HDR on LSPCON devices Uma Shankar
2020-11-26 16:27   ` Ville Syrjälä
2020-11-26  8:14 ` [Intel-gfx] [v11 05/13] drm/i915/display: Add a WARN for invalid output range and format Uma Shankar
2020-11-26 16:27   ` Ville Syrjälä
2020-11-26  8:14 ` [Intel-gfx] [v11 06/13] drm/i915/display: Attach content type property for LSPCON Uma Shankar
2020-11-26 16:28   ` Ville Syrjälä
2020-11-26  8:14 ` [Intel-gfx] [v11 07/13] i915/display: Enable BT2020 for HDR on LSPCON devices Uma Shankar
2020-11-26 17:13   ` Ville Syrjälä
2020-11-26 20:23     ` Shankar, Uma
2020-11-26  8:14 ` Uma Shankar [this message]
2020-11-26  8:14 ` [Intel-gfx] [v11 09/13] drm/i915/display: Implement infoframes readback for LSPCON Uma Shankar
2020-11-26 16:32   ` Ville Syrjälä
2020-11-26 17:44     ` Ville Syrjälä
2020-11-26 20:11       ` Shankar, Uma
2020-11-26  8:14 ` [Intel-gfx] [v11 10/13] drm/i915/display: Implement DRM infoframe read " Uma Shankar
2020-11-26  8:14 ` [Intel-gfx] [v11 11/13] drm/i915/lspcon: Create separate infoframe_enabled helper Uma Shankar
2020-11-26  8:14 ` [Intel-gfx] [v11 12/13] drm/i915/lspcon: Do not send DRM infoframes to non-HDMI sinks Uma Shankar
2020-11-26  8:14 ` [Intel-gfx] [v11 13/13] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON Uma Shankar
2020-11-26  9:41 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev11) Patchwork
2020-11-26  9:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-26 10:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-26 12:06 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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