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From: Ulrich Hecht <uli+renesas@fpond.eu>
To: linux-renesas-soc@vger.kernel.org
Cc: wsa@the-dreams.de, geert@linux-m68k.org, hoai.luu.ub@renesas.com,
	Ulrich Hecht <uli+renesas@fpond.eu>,
	Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [PATCH v3 11/12] pinctrl: renesas: r8a779a0: Add TMU pins, groups and functions
Date: Tue, 12 Jan 2021 17:59:28 +0100	[thread overview]
Message-ID: <20210112165929.31002-12-uli+renesas@fpond.eu> (raw)
In-Reply-To: <20210112165929.31002-1-uli+renesas@fpond.eu>

This patch adds TMU TCLK1-4 pins, groups and functions to the R8A779A0
(V3U) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/pinctrl/renesas/pfc-r8a779a0.c | 65 ++++++++++++++++++++++++++
 1 file changed, 65 insertions(+)

diff --git a/drivers/pinctrl/renesas/pfc-r8a779a0.c b/drivers/pinctrl/renesas/pfc-r8a779a0.c
index f244aa5fd12e..f4f46a76d06a 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779a0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c
@@ -2535,6 +2535,53 @@ static const unsigned int scif_clk_mux[] = {
 	SCIF_CLK_MARK,
 };
 
+/* - TMU -------------------------------------------------------------------- */
+static const unsigned int tmu_tclk1_a_pins[] = {
+	/* TCLK1 */
+	RCAR_GP_PIN(2, 23),
+};
+static const unsigned int tmu_tclk1_a_mux[] = {
+	TCLK1_A_MARK,
+};
+static const unsigned int tmu_tclk1_b_pins[] = {
+	/* TCLK1 */
+	RCAR_GP_PIN(1, 23),
+};
+static const unsigned int tmu_tclk1_b_mux[] = {
+	TCLK1_B_MARK,
+};
+
+static const unsigned int tmu_tclk2_a_pins[] = {
+	/* TCLK2 */
+	RCAR_GP_PIN(2, 24),
+};
+static const unsigned int tmu_tclk2_a_mux[] = {
+	TCLK2_A_MARK,
+};
+static const unsigned int tmu_tclk2_b_pins[] = {
+	/* TCLK2 */
+	RCAR_GP_PIN(2, 10),
+};
+static const unsigned int tmu_tclk2_b_mux[] = {
+	TCLK2_B_MARK,
+};
+
+static const unsigned int tmu_tclk3_pins[] = {
+	/* TCLK3 */
+	RCAR_GP_PIN(2, 11),
+};
+static const unsigned int tmu_tclk3_mux[] = {
+	TCLK3_MARK,
+};
+
+static const unsigned int tmu_tclk4_pins[] = {
+	/* TCLK4 */
+	RCAR_GP_PIN(2, 12),
+};
+static const unsigned int tmu_tclk4_mux[] = {
+	TCLK4_MARK,
+};
+
 static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(avb0_link),
 	SH_PFC_PIN_GROUP(avb0_magic),
@@ -2711,6 +2758,13 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(scif4_clk),
 	SH_PFC_PIN_GROUP(scif4_ctrl),
 	SH_PFC_PIN_GROUP(scif_clk),
+
+	SH_PFC_PIN_GROUP(tmu_tclk1_a),
+	SH_PFC_PIN_GROUP(tmu_tclk1_b),
+	SH_PFC_PIN_GROUP(tmu_tclk2_a),
+	SH_PFC_PIN_GROUP(tmu_tclk2_b),
+	SH_PFC_PIN_GROUP(tmu_tclk3),
+	SH_PFC_PIN_GROUP(tmu_tclk4),
 };
 
 static const char * const avb0_groups[] = {
@@ -3014,6 +3068,15 @@ static const char * const scif_clk_groups[] = {
 	"scif_clk",
 };
 
+static const char * const tmu_groups[] = {
+	"tmu_tclk1_a",
+	"tmu_tclk1_b",
+	"tmu_tclk2_a",
+	"tmu_tclk2_b",
+	"tmu_tclk3",
+	"tmu_tclk4",
+};
+
 static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(avb0),
 	SH_PFC_FUNCTION(avb1),
@@ -3072,6 +3135,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(scif3),
 	SH_PFC_FUNCTION(scif4),
 	SH_PFC_FUNCTION(scif_clk),
+
+	SH_PFC_FUNCTION(tmu),
 };
 
 static const struct pinmux_cfg_reg pinmux_config_regs[] = {
-- 
2.20.1


  parent reply	other threads:[~2021-01-12 17:03 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-12 16:59 [PATCH v3 00/12] pinctrl: renesas: R8A779A0 (V3U) device support Ulrich Hecht
2021-01-12 16:59 ` [PATCH v3 01/12] pinctrl: renesas: r8a779a0: Add I2C pins, groups and functions Ulrich Hecht
2021-01-12 16:59 ` [PATCH v3 02/12] pinctrl: renesas: r8a779a0: Add EtherAVB " Ulrich Hecht
2021-01-13 13:41   ` Geert Uytterhoeven
2021-01-12 16:59 ` [PATCH v3 03/12] pinctrl: renesas: r8a779a0: Add CANFD " Ulrich Hecht
2021-01-12 16:59 ` [PATCH v3 04/12] pinctrl: renesas: r8a779a0: Add DU pins, groups and function Ulrich Hecht
2021-01-12 16:59 ` [PATCH v3 05/12] pinctrl: renesas: r8a779a0: Add HSCIF pins, groups and functions Ulrich Hecht
2021-01-12 16:59 ` [PATCH v3 06/12] pinctrl: renesas: r8a779a0: Add INTC-EX pins, groups and function Ulrich Hecht
2021-01-12 16:59 ` [PATCH v3 07/12] pinctrl: renesas: r8a779a0: Add MMC pins, groups and functions Ulrich Hecht
2021-01-12 16:59 ` [PATCH v3 08/12] pinctrl: renesas: r8a779a0: Add MSIOF " Ulrich Hecht
2021-01-13 13:46   ` Geert Uytterhoeven
2021-01-12 16:59 ` [PATCH v3 09/12] pinctrl: renesas: r8a779a0: Add PWM " Ulrich Hecht
2021-01-12 16:59 ` [PATCH v3 10/12] pinctrl: renesas: r8a779a0: Add QSPI pins, groups, " Ulrich Hecht
2021-01-12 16:59 ` Ulrich Hecht [this message]
2021-01-12 16:59 ` [PATCH v3 12/12] pinctrl: renesas: r8a779a0: Add TPU pins, groups " Ulrich Hecht
2021-01-13 13:48 ` [PATCH v3 00/12] pinctrl: renesas: R8A779A0 (V3U) device support Geert Uytterhoeven

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