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From: Andre Przywara <andre.przywara@arm.com>
To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>
Cc: "Jernej Skrabec" <jernej.skrabec@siol.net>,
	"Samuel Holland" <samuel@sholland.org>,
	"Icenowy Zheng" <icenowy@aosc.io>,
	"Rob Herring" <robh@kernel.org>,
	"Clément Péron" <peron.clem@gmail.com>,
	"Shuosheng Huang" <huangshuosheng@allwinnertech.com>,
	"Yangtao Li" <tiny.windzz@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com,
	"Lee Jones" <lee.jones@linaro.org>,
	devicetree@vger.kernel.org
Subject: [PATCH v4 04/21] dt-bindings: mfd: axp20x: Add AXP305 compatible (plus optional IRQ)
Date: Mon, 25 Jan 2021 15:17:54 +0000	[thread overview]
Message-ID: <20210125151811.11871-5-andre.przywara@arm.com> (raw)
In-Reply-To: <20210125151811.11871-1-andre.przywara@arm.com>

The AXP305 PMIC used in AXP805 seems to be fully compatible to the
AXP805 PMIC, so add the proper chain of compatible strings.

Also at least on one board (Orangepi Zero2) there is no interrupt line
connected to the CPU, so make the "interrupts" property optional.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 Documentation/devicetree/bindings/mfd/axp20x.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
index 4991a6415796..4fd748101e3c 100644
--- a/Documentation/devicetree/bindings/mfd/axp20x.txt
+++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
@@ -26,10 +26,10 @@ Required properties:
     * "x-powers,axp803"
     * "x-powers,axp806"
     * "x-powers,axp805", "x-powers,axp806"
+    * "x-powers,axp803", "x-powers,axp805", "x-powers,axp806"
     * "x-powers,axp809"
     * "x-powers,axp813"
 - reg: The I2C slave address or RSB hardware address for the AXP chip
-- interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin
 - interrupt-controller: The PMIC has its own internal IRQs
 - #interrupt-cells: Should be set to 1
 
@@ -43,6 +43,7 @@ more information:
 			AXP20x/LDO3: software-based implementation
 
 Optional properties:
+- interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin
 - x-powers,dcdc-freq: defines the work frequency of DC-DC in KHz
 		      AXP152/20X: range:  750-1875, Default: 1.5 MHz
 		      AXP22X/8XX: range: 1800-4050, Default: 3   MHz
-- 
2.17.5


WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara@arm.com>
To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>
Cc: "Jernej Skrabec" <jernej.skrabec@siol.net>,
	"Samuel Holland" <samuel@sholland.org>,
	"Yangtao Li" <tiny.windzz@gmail.com>,
	linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com,
	"Clément Péron" <peron.clem@gmail.com>,
	"Shuosheng Huang" <huangshuosheng@allwinnertech.com>,
	"Lee Jones" <lee.jones@linaro.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	"Icenowy Zheng" <icenowy@aosc.io>
Subject: [PATCH v4 04/21] dt-bindings: mfd: axp20x: Add AXP305 compatible (plus optional IRQ)
Date: Mon, 25 Jan 2021 15:17:54 +0000	[thread overview]
Message-ID: <20210125151811.11871-5-andre.przywara@arm.com> (raw)
In-Reply-To: <20210125151811.11871-1-andre.przywara@arm.com>

The AXP305 PMIC used in AXP805 seems to be fully compatible to the
AXP805 PMIC, so add the proper chain of compatible strings.

Also at least on one board (Orangepi Zero2) there is no interrupt line
connected to the CPU, so make the "interrupts" property optional.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 Documentation/devicetree/bindings/mfd/axp20x.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
index 4991a6415796..4fd748101e3c 100644
--- a/Documentation/devicetree/bindings/mfd/axp20x.txt
+++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
@@ -26,10 +26,10 @@ Required properties:
     * "x-powers,axp803"
     * "x-powers,axp806"
     * "x-powers,axp805", "x-powers,axp806"
+    * "x-powers,axp803", "x-powers,axp805", "x-powers,axp806"
     * "x-powers,axp809"
     * "x-powers,axp813"
 - reg: The I2C slave address or RSB hardware address for the AXP chip
-- interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin
 - interrupt-controller: The PMIC has its own internal IRQs
 - #interrupt-cells: Should be set to 1
 
@@ -43,6 +43,7 @@ more information:
 			AXP20x/LDO3: software-based implementation
 
 Optional properties:
+- interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin
 - x-powers,dcdc-freq: defines the work frequency of DC-DC in KHz
 		      AXP152/20X: range:  750-1875, Default: 1.5 MHz
 		      AXP22X/8XX: range: 1800-4050, Default: 3   MHz
-- 
2.17.5


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  parent reply	other threads:[~2021-01-26  6:58 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-25 15:17 [PATCH v4 00/21] arm64: sunxi: Initial Allwinner H616 SoC support Andre Przywara
2021-01-25 15:17 ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 01/21] dt-bindings: clk: sunxi-ccu: Add compatible string for Allwinner H616 Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 02/21] clk: sunxi-ng: Add support for the Allwinner H616 R-CCU Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 03/21] clk: sunxi-ng: Add support for the Allwinner H616 CCU Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:17 ` Andre Przywara [this message]
2021-01-25 15:17   ` [PATCH v4 04/21] dt-bindings: mfd: axp20x: Add AXP305 compatible (plus optional IRQ) Andre Przywara
2021-01-25 15:17 ` [PATCH v4 05/21] Input: axp20x-pek: Bail out if AXP has no interrupt line connected Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 06/21] mfd: axp20x: Allow AXP chips without interrupt lines Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 07/21] dt-bindings: sram: sunxi-sram: Add H616 compatible string Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 08/21] soc: sunxi: sram: Add support for more than one EMAC clock Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:17 ` [PATCH v4 09/21] dt-bindings: watchdog: sun4i: Add H616 compatible string Andre Przywara
2021-01-25 15:17   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 10/21] dt-bindings: i2c: mv64xxx: " Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 11/21] dt-bindings: media: IR: Add H616 IR " Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 12/21] dt-bindings: rtc: sun6i: Add H616 " Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 22:51   ` Alexandre Belloni
2021-01-25 22:51     ` Alexandre Belloni
2021-01-26  0:14     ` Andre Przywara
2021-01-26  0:14       ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 13/21] dt-bindings: spi: sunxi: " Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 14/21] net: stmmac: dwmac-sun8i: Prepare for second EMAC clock register Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 15/21] phy: sun4i-usb: Rework HCI PHY (aka. "pmu_unk1") handling Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 16/21] dt-bindings: usb: Add H616 compatible string Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 17/21] dt-bindings: usb: sunxi-musb: " Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 18/21] phy: sun4i-usb: Add support for the H616 USB PHY Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 19/21] arm64: dts: allwinner: Add Allwinner H616 .dtsi file Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 20/21] dt-bindings: arm: sunxi: Add OrangePi Zero 2 binding Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-25 15:18 ` [PATCH v4 21/21] arm64: dts: allwinner: Add OrangePi Zero 2 .dts Andre Przywara
2021-01-25 15:18   ` Andre Przywara
2021-01-26 12:07 ` [PATCH v4 00/21] arm64: sunxi: Initial Allwinner H616 SoC support Maxime Ripard
2021-01-26 12:07   ` Maxime Ripard
2021-01-27 17:15 ` (subset) " Mark Brown
2021-01-27 17:29   ` Andre Przywara
2021-01-27 17:29     ` Andre Przywara

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