From: Pavel Tatashin <pasha.tatashin@soleen.com>
To: pasha.tatashin@soleen.com, jmorris@namei.org, sashal@kernel.org,
ebiederm@xmission.com, kexec@lists.infradead.org,
linux-kernel@vger.kernel.org, corbet@lwn.net,
catalin.marinas@arm.com, will@kernel.org,
linux-arm-kernel@lists.infradead.org, maz@kernel.org,
james.morse@arm.com, vladimir.murzin@arm.com,
matthias.bgg@gmail.com, linux-mm@kvack.org, mark.rutland@arm.com,
steve.capper@arm.com, rfontana@redhat.com, tglx@linutronix.de,
selindag@gmail.com, tyhicks@linux.microsoft.com
Subject: [PATCH v12 09/17] arm64: kexec: Use dcache ops macros instead of open-coding
Date: Tue, 2 Mar 2021 19:22:22 -0500 [thread overview]
Message-ID: <20210303002230.1083176-10-pasha.tatashin@soleen.com> (raw)
In-Reply-To: <20210303002230.1083176-1-pasha.tatashin@soleen.com>
From: James Morse <james.morse@arm.com>
kexec does dcache maintenance when it re-writes all memory. Our
dcache_by_line_op macro depends on reading the sanitised DminLine
from memory. Kexec may have overwritten this, so open-codes the
sequence.
dcache_by_line_op is a whole set of macros, it uses dcache_line_size
which uses read_ctr for the sanitsed DminLine. Reading the DminLine
is the first thing the dcache_by_line_op does.
Rename dcache_by_line_op dcache_by_myline_op and take DminLine as
an argument. Kexec can now use the slightly smaller macro.
This makes up-coming changes to the dcache maintenance easier on
the eye.
Code generated by the existing callers is unchanged.
Signed-off-by: James Morse <james.morse@arm.com>
[Fixed merging issues]
Signed-off-by: Pavel Tatashin <pasha.tatashin@soleen.com>
---
arch/arm64/include/asm/assembler.h | 12 ++++++++----
arch/arm64/kernel/relocate_kernel.S | 13 +++----------
2 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index ca31594d3d6c..29061b76aab6 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -371,10 +371,9 @@ alternative_else
alternative_endif
.endm
- .macro dcache_by_line_op op, domain, kaddr, size, tmp1, tmp2
- dcache_line_size \tmp1, \tmp2
+ .macro dcache_by_myline_op op, domain, kaddr, size, linesz, tmp2
add \size, \kaddr, \size
- sub \tmp2, \tmp1, #1
+ sub \tmp2, \linesz, #1
bic \kaddr, \kaddr, \tmp2
9998:
.ifc \op, cvau
@@ -394,12 +393,17 @@ alternative_endif
.endif
.endif
.endif
- add \kaddr, \kaddr, \tmp1
+ add \kaddr, \kaddr, \linesz
cmp \kaddr, \size
b.lo 9998b
dsb \domain
.endm
+ .macro dcache_by_line_op op, domain, kaddr, size, tmp1, tmp2
+ dcache_line_size \tmp1, \tmp2
+ dcache_by_myline_op \op, \domain, \kaddr, \size, \tmp1, \tmp2
+ .endm
+
/*
* Macro to perform an instruction cache maintenance for the interval
* [start, end)
diff --git a/arch/arm64/kernel/relocate_kernel.S b/arch/arm64/kernel/relocate_kernel.S
index 8058fabe0a76..718037bef560 100644
--- a/arch/arm64/kernel/relocate_kernel.S
+++ b/arch/arm64/kernel/relocate_kernel.S
@@ -41,16 +41,9 @@ SYM_CODE_START(arm64_relocate_new_kernel)
tbz x16, IND_SOURCE_BIT, .Ltest_indirection
/* Invalidate dest page to PoC. */
- mov x2, x13
- add x20, x2, #PAGE_SIZE
- sub x1, x15, #1
- bic x2, x2, x1
-2: dc ivac, x2
- add x2, x2, x15
- cmp x2, x20
- b.lo 2b
- dsb sy
-
+ mov x2, x13
+ mov x1, #PAGE_SIZE
+ dcache_by_myline_op ivac, sy, x2, x1, x15, x20
copy_page x13, x12, x1, x2, x3, x4, x5, x6, x7, x8
b .Lnext
.Ltest_indirection:
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Pavel Tatashin <pasha.tatashin@soleen.com>
To: pasha.tatashin@soleen.com, jmorris@namei.org, sashal@kernel.org,
ebiederm@xmission.com, kexec@lists.infradead.org,
linux-kernel@vger.kernel.org, corbet@lwn.net,
catalin.marinas@arm.com, will@kernel.org,
linux-arm-kernel@lists.infradead.org, maz@kernel.org,
james.morse@arm.com, vladimir.murzin@arm.com,
matthias.bgg@gmail.com, linux-mm@kvack.org, mark.rutland@arm.com,
steve.capper@arm.com, rfontana@redhat.com, tglx@linutronix.de,
selindag@gmail.com, tyhicks@linux.microsoft.com
Subject: [PATCH v12 09/17] arm64: kexec: Use dcache ops macros instead of open-coding
Date: Tue, 2 Mar 2021 19:22:22 -0500 [thread overview]
Message-ID: <20210303002230.1083176-10-pasha.tatashin@soleen.com> (raw)
In-Reply-To: <20210303002230.1083176-1-pasha.tatashin@soleen.com>
From: James Morse <james.morse@arm.com>
kexec does dcache maintenance when it re-writes all memory. Our
dcache_by_line_op macro depends on reading the sanitised DminLine
from memory. Kexec may have overwritten this, so open-codes the
sequence.
dcache_by_line_op is a whole set of macros, it uses dcache_line_size
which uses read_ctr for the sanitsed DminLine. Reading the DminLine
is the first thing the dcache_by_line_op does.
Rename dcache_by_line_op dcache_by_myline_op and take DminLine as
an argument. Kexec can now use the slightly smaller macro.
This makes up-coming changes to the dcache maintenance easier on
the eye.
Code generated by the existing callers is unchanged.
Signed-off-by: James Morse <james.morse@arm.com>
[Fixed merging issues]
Signed-off-by: Pavel Tatashin <pasha.tatashin@soleen.com>
---
arch/arm64/include/asm/assembler.h | 12 ++++++++----
arch/arm64/kernel/relocate_kernel.S | 13 +++----------
2 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index ca31594d3d6c..29061b76aab6 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -371,10 +371,9 @@ alternative_else
alternative_endif
.endm
- .macro dcache_by_line_op op, domain, kaddr, size, tmp1, tmp2
- dcache_line_size \tmp1, \tmp2
+ .macro dcache_by_myline_op op, domain, kaddr, size, linesz, tmp2
add \size, \kaddr, \size
- sub \tmp2, \tmp1, #1
+ sub \tmp2, \linesz, #1
bic \kaddr, \kaddr, \tmp2
9998:
.ifc \op, cvau
@@ -394,12 +393,17 @@ alternative_endif
.endif
.endif
.endif
- add \kaddr, \kaddr, \tmp1
+ add \kaddr, \kaddr, \linesz
cmp \kaddr, \size
b.lo 9998b
dsb \domain
.endm
+ .macro dcache_by_line_op op, domain, kaddr, size, tmp1, tmp2
+ dcache_line_size \tmp1, \tmp2
+ dcache_by_myline_op \op, \domain, \kaddr, \size, \tmp1, \tmp2
+ .endm
+
/*
* Macro to perform an instruction cache maintenance for the interval
* [start, end)
diff --git a/arch/arm64/kernel/relocate_kernel.S b/arch/arm64/kernel/relocate_kernel.S
index 8058fabe0a76..718037bef560 100644
--- a/arch/arm64/kernel/relocate_kernel.S
+++ b/arch/arm64/kernel/relocate_kernel.S
@@ -41,16 +41,9 @@ SYM_CODE_START(arm64_relocate_new_kernel)
tbz x16, IND_SOURCE_BIT, .Ltest_indirection
/* Invalidate dest page to PoC. */
- mov x2, x13
- add x20, x2, #PAGE_SIZE
- sub x1, x15, #1
- bic x2, x2, x1
-2: dc ivac, x2
- add x2, x2, x15
- cmp x2, x20
- b.lo 2b
- dsb sy
-
+ mov x2, x13
+ mov x1, #PAGE_SIZE
+ dcache_by_myline_op ivac, sy, x2, x1, x15, x20
copy_page x13, x12, x1, x2, x3, x4, x5, x6, x7, x8
b .Lnext
.Ltest_indirection:
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Pavel Tatashin <pasha.tatashin@soleen.com>
To: pasha.tatashin@soleen.com, jmorris@namei.org, sashal@kernel.org,
ebiederm@xmission.com, kexec@lists.infradead.org,
linux-kernel@vger.kernel.org, corbet@lwn.net,
catalin.marinas@arm.com, will@kernel.org,
linux-arm-kernel@lists.infradead.org, maz@kernel.org,
james.morse@arm.com, vladimir.murzin@arm.com,
matthias.bgg@gmail.com, linux-mm@kvack.org, mark.rutland@arm.com,
steve.capper@arm.com, rfontana@redhat.com, tglx@linutronix.de,
selindag@gmail.com, tyhicks@linux.microsoft.com
Subject: [PATCH v12 09/17] arm64: kexec: Use dcache ops macros instead of open-coding
Date: Tue, 2 Mar 2021 19:22:22 -0500 [thread overview]
Message-ID: <20210303002230.1083176-10-pasha.tatashin@soleen.com> (raw)
In-Reply-To: <20210303002230.1083176-1-pasha.tatashin@soleen.com>
From: James Morse <james.morse@arm.com>
kexec does dcache maintenance when it re-writes all memory. Our
dcache_by_line_op macro depends on reading the sanitised DminLine
from memory. Kexec may have overwritten this, so open-codes the
sequence.
dcache_by_line_op is a whole set of macros, it uses dcache_line_size
which uses read_ctr for the sanitsed DminLine. Reading the DminLine
is the first thing the dcache_by_line_op does.
Rename dcache_by_line_op dcache_by_myline_op and take DminLine as
an argument. Kexec can now use the slightly smaller macro.
This makes up-coming changes to the dcache maintenance easier on
the eye.
Code generated by the existing callers is unchanged.
Signed-off-by: James Morse <james.morse@arm.com>
[Fixed merging issues]
Signed-off-by: Pavel Tatashin <pasha.tatashin@soleen.com>
---
arch/arm64/include/asm/assembler.h | 12 ++++++++----
arch/arm64/kernel/relocate_kernel.S | 13 +++----------
2 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index ca31594d3d6c..29061b76aab6 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -371,10 +371,9 @@ alternative_else
alternative_endif
.endm
- .macro dcache_by_line_op op, domain, kaddr, size, tmp1, tmp2
- dcache_line_size \tmp1, \tmp2
+ .macro dcache_by_myline_op op, domain, kaddr, size, linesz, tmp2
add \size, \kaddr, \size
- sub \tmp2, \tmp1, #1
+ sub \tmp2, \linesz, #1
bic \kaddr, \kaddr, \tmp2
9998:
.ifc \op, cvau
@@ -394,12 +393,17 @@ alternative_endif
.endif
.endif
.endif
- add \kaddr, \kaddr, \tmp1
+ add \kaddr, \kaddr, \linesz
cmp \kaddr, \size
b.lo 9998b
dsb \domain
.endm
+ .macro dcache_by_line_op op, domain, kaddr, size, tmp1, tmp2
+ dcache_line_size \tmp1, \tmp2
+ dcache_by_myline_op \op, \domain, \kaddr, \size, \tmp1, \tmp2
+ .endm
+
/*
* Macro to perform an instruction cache maintenance for the interval
* [start, end)
diff --git a/arch/arm64/kernel/relocate_kernel.S b/arch/arm64/kernel/relocate_kernel.S
index 8058fabe0a76..718037bef560 100644
--- a/arch/arm64/kernel/relocate_kernel.S
+++ b/arch/arm64/kernel/relocate_kernel.S
@@ -41,16 +41,9 @@ SYM_CODE_START(arm64_relocate_new_kernel)
tbz x16, IND_SOURCE_BIT, .Ltest_indirection
/* Invalidate dest page to PoC. */
- mov x2, x13
- add x20, x2, #PAGE_SIZE
- sub x1, x15, #1
- bic x2, x2, x1
-2: dc ivac, x2
- add x2, x2, x15
- cmp x2, x20
- b.lo 2b
- dsb sy
-
+ mov x2, x13
+ mov x1, #PAGE_SIZE
+ dcache_by_myline_op ivac, sy, x2, x1, x15, x20
copy_page x13, x12, x1, x2, x3, x4, x5, x6, x7, x8
b .Lnext
.Ltest_indirection:
--
2.25.1
_______________________________________________
kexec mailing list
kexec@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/kexec
next prev parent reply other threads:[~2021-03-03 11:03 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-03 0:22 [PATCH v12 00/17] arm64: MMU enabled kexec relocation Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 01/17] arm64: hyp-stub: Check the size of the HYP stub's vectors Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 02/17] arm64: hyp-stub: Move invalid vector entries into the vectors Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 03/17] arm64: hyp-stub: Move el1_sync " Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 04/17] arm64: kernel: add helper for booted at EL2 and not VHE Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 05/17] arm64: trans_pgd: hibernate: Add trans_pgd_copy_el2_vectors Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 06/17] arm64: hibernate: abstract ttrb0 setup function Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 07/17] arm64: kexec: flush image and lists during kexec load time Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 08/17] arm64: kexec: skip relocation code for inplace kexec Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin [this message]
2021-03-03 0:22 ` [PATCH v12 09/17] arm64: kexec: Use dcache ops macros instead of open-coding Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 10/17] arm64: kexec: pass kimage as the only argument to relocation function Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 11/17] arm64: kexec: kexec may require EL2 vectors Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 12/17] arm64: kexec: relocate in EL1 mode Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 13/17] arm64: kexec: use ld script for relocation function Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 14/17] arm64: kexec: install a copy of the linear-map Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 15/17] arm64: kexec: keep MMU enabled during kexec relocation Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 16/17] arm64: kexec: remove the pre-kexec PoC maintenance Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` [PATCH v12 17/17] arm64: kexec: Remove cpu-reset.h Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-03 0:22 ` Pavel Tatashin
2021-03-22 1:36 ` [PATCH v12 00/17] arm64: MMU enabled kexec relocation Pingfan Liu
2021-03-22 1:36 ` Pingfan Liu
2021-03-22 1:36 ` Pingfan Liu
2021-03-22 1:36 ` Pingfan Liu
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