From: Anup Patel <anup.patel@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Palmer Dabbelt <palmerdabbelt@google.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Ulf Hansson <ulf.hansson@linaro.org>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>,
Pavel Machek <pavel@ucw.cz>, Rob Herring <robh+dt@kernel.org>
Cc: Sandeep Tripathy <milun.tripathy@gmail.com>,
Atish Patra <atish.patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Liush <liush@allwinnertech.com>, Anup Patel <anup@brainfault.org>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Anup Patel <anup.patel@wdc.com>
Subject: [PATCH v6 2/8] RISC-V: Rename relocate() and make it global
Date: Wed, 9 Jun 2021 17:57:09 +0530 [thread overview]
Message-ID: <20210609122715.3389-3-anup.patel@wdc.com> (raw)
In-Reply-To: <20210609122715.3389-1-anup.patel@wdc.com>
The low-level relocate() function enables mmu and relocates
execution to link-time addresses. We rename relocate() function
to relocate_enable_mmu() function which is more informative.
Also, the relocate_enable_mmu() function will be used in the
resume path when a CPU wakes-up from a non-retentive suspend
so we make it global symbol.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
arch/riscv/kernel/head.S | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 89cc58ab52b4..a44c0bc9c2f3 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -79,7 +79,8 @@ pe_head_start:
.align 2
#ifdef CONFIG_MMU
-relocate:
+ .global relocate_enable_mmu
+relocate_enable_mmu:
/* Relocate return address */
la a1, kernel_virt_addr
XIP_FIXUP_OFFSET a1
@@ -174,7 +175,7 @@ secondary_start_common:
/* Enable virtual memory and relocate to virtual address */
la a0, swapper_pg_dir
XIP_FIXUP_OFFSET a0
- call relocate
+ call relocate_enable_mmu
#endif
call setup_trap_vector
tail smp_callin
@@ -311,7 +312,7 @@ clear_bss_done:
#ifdef CONFIG_MMU
la a0, early_pg_dir
XIP_FIXUP_OFFSET a0
- call relocate
+ call relocate_enable_mmu
#endif /* CONFIG_MMU */
call setup_trap_vector
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <anup.patel@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Palmer Dabbelt <palmerdabbelt@google.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Ulf Hansson <ulf.hansson@linaro.org>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>,
Pavel Machek <pavel@ucw.cz>, Rob Herring <robh+dt@kernel.org>
Cc: Sandeep Tripathy <milun.tripathy@gmail.com>,
Atish Patra <atish.patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Liush <liush@allwinnertech.com>, Anup Patel <anup@brainfault.org>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Anup Patel <anup.patel@wdc.com>
Subject: [PATCH v6 2/8] RISC-V: Rename relocate() and make it global
Date: Wed, 9 Jun 2021 17:57:09 +0530 [thread overview]
Message-ID: <20210609122715.3389-3-anup.patel@wdc.com> (raw)
In-Reply-To: <20210609122715.3389-1-anup.patel@wdc.com>
The low-level relocate() function enables mmu and relocates
execution to link-time addresses. We rename relocate() function
to relocate_enable_mmu() function which is more informative.
Also, the relocate_enable_mmu() function will be used in the
resume path when a CPU wakes-up from a non-retentive suspend
so we make it global symbol.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
arch/riscv/kernel/head.S | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 89cc58ab52b4..a44c0bc9c2f3 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -79,7 +79,8 @@ pe_head_start:
.align 2
#ifdef CONFIG_MMU
-relocate:
+ .global relocate_enable_mmu
+relocate_enable_mmu:
/* Relocate return address */
la a1, kernel_virt_addr
XIP_FIXUP_OFFSET a1
@@ -174,7 +175,7 @@ secondary_start_common:
/* Enable virtual memory and relocate to virtual address */
la a0, swapper_pg_dir
XIP_FIXUP_OFFSET a0
- call relocate
+ call relocate_enable_mmu
#endif
call setup_trap_vector
tail smp_callin
@@ -311,7 +312,7 @@ clear_bss_done:
#ifdef CONFIG_MMU
la a0, early_pg_dir
XIP_FIXUP_OFFSET a0
- call relocate
+ call relocate_enable_mmu
#endif /* CONFIG_MMU */
call setup_trap_vector
--
2.25.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <anup.patel@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Palmer Dabbelt <palmerdabbelt@google.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Ulf Hansson <ulf.hansson@linaro.org>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>,
Pavel Machek <pavel@ucw.cz>, Rob Herring <robh+dt@kernel.org>
Cc: Sandeep Tripathy <milun.tripathy@gmail.com>,
Atish Patra <atish.patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Liush <liush@allwinnertech.com>, Anup Patel <anup@brainfault.org>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Anup Patel <anup.patel@wdc.com>
Subject: [PATCH v6 2/8] RISC-V: Rename relocate() and make it global
Date: Wed, 9 Jun 2021 17:57:09 +0530 [thread overview]
Message-ID: <20210609122715.3389-3-anup.patel@wdc.com> (raw)
In-Reply-To: <20210609122715.3389-1-anup.patel@wdc.com>
The low-level relocate() function enables mmu and relocates
execution to link-time addresses. We rename relocate() function
to relocate_enable_mmu() function which is more informative.
Also, the relocate_enable_mmu() function will be used in the
resume path when a CPU wakes-up from a non-retentive suspend
so we make it global symbol.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
arch/riscv/kernel/head.S | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 89cc58ab52b4..a44c0bc9c2f3 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -79,7 +79,8 @@ pe_head_start:
.align 2
#ifdef CONFIG_MMU
-relocate:
+ .global relocate_enable_mmu
+relocate_enable_mmu:
/* Relocate return address */
la a1, kernel_virt_addr
XIP_FIXUP_OFFSET a1
@@ -174,7 +175,7 @@ secondary_start_common:
/* Enable virtual memory and relocate to virtual address */
la a0, swapper_pg_dir
XIP_FIXUP_OFFSET a0
- call relocate
+ call relocate_enable_mmu
#endif
call setup_trap_vector
tail smp_callin
@@ -311,7 +312,7 @@ clear_bss_done:
#ifdef CONFIG_MMU
la a0, early_pg_dir
XIP_FIXUP_OFFSET a0
- call relocate
+ call relocate_enable_mmu
#endif /* CONFIG_MMU */
call setup_trap_vector
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-06-09 12:27 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-09 12:27 [PATCH v6 0/8] RISC-V CPU Idle Support Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 12:27 ` [PATCH v6 1/8] RISC-V: Enable CPU_IDLE drivers Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 12:27 ` Anup Patel [this message]
2021-06-09 12:27 ` [PATCH v6 2/8] RISC-V: Rename relocate() and make it global Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 12:27 ` [PATCH v6 3/8] RISC-V: Add arch functions for non-retentive suspend entry/exit Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 12:27 ` [PATCH v6 4/8] RISC-V: Add SBI HSM suspend related defines Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 12:27 ` [PATCH v6 5/8] cpuidle: Factor-out power domain related code from PSCI domain driver Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 12:27 ` [PATCH v6 6/8] cpuidle: Add RISC-V SBI CPU idle driver Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 12:27 ` [PATCH v6 7/8] dt-bindings: Add common bindings for ARM and RISC-V idle states Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 16:16 ` Rob Herring
2021-06-09 16:16 ` Rob Herring
2021-06-09 16:16 ` Rob Herring
2021-06-10 4:24 ` Anup Patel
2021-06-10 4:24 ` Anup Patel
2021-06-10 4:24 ` Anup Patel
2021-06-09 12:27 ` [PATCH v6 8/8] RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine Anup Patel
2021-06-09 12:27 ` Anup Patel
2021-06-09 12:27 ` Anup Patel
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