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From: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH] drm/i915/selftest: Extend ctx_timestamp ICL workaround to GEN11
Date: Wed, 23 Jun 2021 12:51:44 +0530	[thread overview]
Message-ID: <20210623072144.890147-1-tejaskumarx.surendrakumar.upadhyay@intel.com> (raw)

EHL and JSL are also observing requirement for 80ns interval for
CTX_TIMESTAMP thus extending it to GEN11.

Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
---
 drivers/gpu/drm/i915/gt/selftest_engine_pm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_pm.c b/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
index 72cca3f0da21..d0afadf34649 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
@@ -173,8 +173,8 @@ static int __live_engine_timestamps(struct intel_engine_cs *engine)
 	d_ctx = trifilter(s_ctx);
 
 	d_ctx *= engine->gt->clock_frequency;
-	if (IS_ICELAKE(engine->i915))
-		d_ring *= 12500000; /* Fixed 80ns for icl ctx timestamp? */
+	if (IS_GEN(engine->i915, 11))
+		d_ring *= 12500000; /* Fixed 80ns for GEN11 ctx timestamp? */
 	else
 		d_ring *= engine->gt->clock_frequency;
 
-- 
2.31.1

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             reply	other threads:[~2021-06-23  7:30 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-23  7:21 Tejas Upadhyay [this message]
2021-06-23  8:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftest: Extend ctx_timestamp ICL workaround to GEN11 Patchwork
2021-06-23  9:35 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-06-23 11:18 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftest: Extend ctx_timestamp ICL workaround to GEN11 (rev2) Patchwork
2021-06-23 12:31 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-06-24  9:48 ` [Intel-gfx] [PATCH] drm/i915/selftest: Extend ctx_timestamp ICL workaround to GEN11 Tvrtko Ursulin

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