From: Daniel Vetter <daniel.vetter@ffwll.ch> To: DRI Development <dri-devel@lists.freedesktop.org> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, Intel Graphics Development <intel-gfx@lists.freedesktop.org>, etnaviv@lists.freedesktop.org, Russell King <linux+etnaviv@armlinux.org.uk>, Daniel Vetter <daniel.vetter@intel.com> Subject: [PATCH v4 15/18] drm/etnaviv: Don't break exclusive fence ordering Date: Mon, 12 Jul 2021 19:53:49 +0200 [thread overview] Message-ID: <20210712175352.802687-16-daniel.vetter@ffwll.ch> (raw) In-Reply-To: <20210712175352.802687-1-daniel.vetter@ffwll.ch> There's only one exclusive slot, and we must not break the ordering. Adding a new exclusive fence drops all previous fences from the dma_resv. To avoid violating the signalling order we err on the side of over-synchronizing by waiting for the existing fences, even if userspace asked us to ignore them. A better fix would be to us a dma_fence_chain or _array like e.g. amdgpu now uses, but it probably makes sense to lift this into dma-resv.c code as a proper concept, so that drivers don't have to hack up their own solution each on their own. Hence go with the simple fix for now. Another option is the fence import ioctl from Jason: https://lore.kernel.org/dri-devel/20210610210925.642582-7-jason@jlekstrand.net/ v2: Improve commit message per Lucas' suggestion. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Russell King <linux+etnaviv@armlinux.org.uk> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: etnaviv@lists.freedesktop.org --- drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c index 5b97ce1299ad..07454db4b150 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c @@ -178,18 +178,20 @@ static int submit_fence_sync(struct etnaviv_gem_submit *submit) for (i = 0; i < submit->nr_bos; i++) { struct etnaviv_gem_submit_bo *bo = &submit->bos[i]; struct dma_resv *robj = bo->obj->base.resv; + bool write = bo->flags & ETNA_SUBMIT_BO_WRITE; - if (!(bo->flags & ETNA_SUBMIT_BO_WRITE)) { + if (!(write)) { ret = dma_resv_reserve_shared(robj, 1); if (ret) return ret; } - if (submit->flags & ETNA_SUBMIT_NO_IMPLICIT) + /* exclusive fences must be ordered */ + if (submit->flags & ETNA_SUBMIT_NO_IMPLICIT && !write) continue; ret = drm_sched_job_await_implicit(&submit->sched_job, &bo->obj->base, - bo->flags & ETNA_SUBMIT_BO_WRITE); + write); if (ret) return ret; } -- 2.32.0
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Vetter <daniel.vetter@ffwll.ch> To: DRI Development <dri-devel@lists.freedesktop.org> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, Intel Graphics Development <intel-gfx@lists.freedesktop.org>, etnaviv@lists.freedesktop.org, Christian Gmeiner <christian.gmeiner@gmail.com>, Russell King <linux+etnaviv@armlinux.org.uk>, Daniel Vetter <daniel.vetter@intel.com>, Lucas Stach <l.stach@pengutronix.de> Subject: [Intel-gfx] [PATCH v4 15/18] drm/etnaviv: Don't break exclusive fence ordering Date: Mon, 12 Jul 2021 19:53:49 +0200 [thread overview] Message-ID: <20210712175352.802687-16-daniel.vetter@ffwll.ch> (raw) In-Reply-To: <20210712175352.802687-1-daniel.vetter@ffwll.ch> There's only one exclusive slot, and we must not break the ordering. Adding a new exclusive fence drops all previous fences from the dma_resv. To avoid violating the signalling order we err on the side of over-synchronizing by waiting for the existing fences, even if userspace asked us to ignore them. A better fix would be to us a dma_fence_chain or _array like e.g. amdgpu now uses, but it probably makes sense to lift this into dma-resv.c code as a proper concept, so that drivers don't have to hack up their own solution each on their own. Hence go with the simple fix for now. Another option is the fence import ioctl from Jason: https://lore.kernel.org/dri-devel/20210610210925.642582-7-jason@jlekstrand.net/ v2: Improve commit message per Lucas' suggestion. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Russell King <linux+etnaviv@armlinux.org.uk> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: etnaviv@lists.freedesktop.org --- drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c index 5b97ce1299ad..07454db4b150 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c @@ -178,18 +178,20 @@ static int submit_fence_sync(struct etnaviv_gem_submit *submit) for (i = 0; i < submit->nr_bos; i++) { struct etnaviv_gem_submit_bo *bo = &submit->bos[i]; struct dma_resv *robj = bo->obj->base.resv; + bool write = bo->flags & ETNA_SUBMIT_BO_WRITE; - if (!(bo->flags & ETNA_SUBMIT_BO_WRITE)) { + if (!(write)) { ret = dma_resv_reserve_shared(robj, 1); if (ret) return ret; } - if (submit->flags & ETNA_SUBMIT_NO_IMPLICIT) + /* exclusive fences must be ordered */ + if (submit->flags & ETNA_SUBMIT_NO_IMPLICIT && !write) continue; ret = drm_sched_job_await_implicit(&submit->sched_job, &bo->obj->base, - bo->flags & ETNA_SUBMIT_BO_WRITE); + write); if (ret) return ret; } -- 2.32.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-07-12 20:02 UTC|newest] Thread overview: 112+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-07-12 17:53 [PATCH v4 00/18] drm/sched dependency tracking and dma-resv fixes Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` [PATCH v4 01/18] drm/sched: Split drm_sched_job_init Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` Daniel Vetter 2021-07-12 20:22 ` Emma Anholt 2021-07-12 20:22 ` [Intel-gfx] " Emma Anholt 2021-07-12 20:22 ` Emma Anholt 2021-07-13 6:40 ` Christian König 2021-07-13 6:40 ` [Intel-gfx] " Christian König 2021-07-13 6:40 ` Christian König 2021-07-13 6:53 ` Daniel Vetter 2021-07-13 6:53 ` [Intel-gfx] " Daniel Vetter 2021-07-13 6:53 ` Daniel Vetter 2021-07-12 17:53 ` [PATCH v4 02/18] drm/sched: Barriers are needed for entity->last_scheduled Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-13 6:35 ` Christian König 2021-07-13 6:35 ` [Intel-gfx] " Christian König 2021-07-13 6:50 ` Daniel Vetter 2021-07-13 6:50 ` [Intel-gfx] " Daniel Vetter 2021-07-13 7:25 ` Christian König 2021-07-13 7:25 ` [Intel-gfx] " Christian König 2021-07-13 9:10 ` Daniel Vetter 2021-07-13 9:10 ` [Intel-gfx] " Daniel Vetter 2021-07-13 11:20 ` Christian König 2021-07-13 11:20 ` [Intel-gfx] " Christian König 2021-07-13 16:11 ` Andrey Grodzovsky 2021-07-13 16:11 ` [Intel-gfx] " Andrey Grodzovsky 2021-07-13 16:45 ` Daniel Vetter 2021-07-13 16:45 ` [Intel-gfx] " Daniel Vetter 2021-07-14 22:12 ` Andrey Grodzovsky 2021-07-14 22:12 ` [Intel-gfx] " Andrey Grodzovsky 2021-07-15 10:16 ` Daniel Vetter 2021-07-15 10:16 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` [PATCH v4 03/18] drm/sched: Add dependency tracking Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` Daniel Vetter 2021-07-27 11:09 ` Daniel Vetter 2021-07-27 11:09 ` [Intel-gfx] " Daniel Vetter 2021-07-27 11:09 ` Daniel Vetter 2021-07-28 11:28 ` [Linaro-mm-sig] " Christian König 2021-07-28 11:28 ` [Intel-gfx] " Christian König 2021-07-28 11:28 ` Christian König 2021-07-28 12:09 ` Daniel Vetter 2021-07-28 12:09 ` [Intel-gfx] " Daniel Vetter 2021-07-28 12:09 ` Daniel Vetter 2021-07-28 12:46 ` Christian König 2021-07-28 12:46 ` [Intel-gfx] " Christian König 2021-07-28 12:46 ` Christian König 2021-07-28 15:20 ` Melissa Wen 2021-07-28 15:20 ` [Intel-gfx] " Melissa Wen 2021-07-28 15:20 ` Melissa Wen 2021-07-12 17:53 ` [PATCH v4 04/18] drm/sched: drop entity parameter from drm_sched_push_job Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` Daniel Vetter 2021-07-12 17:53 ` [PATCH v4 05/18] drm/sched: improve docs around drm_sched_entity Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` [PATCH v4 06/18] drm/panfrost: use scheduler dependency tracking Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` Daniel Vetter 2021-07-12 17:53 ` [PATCH v4 07/18] drm/lima: " Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` Daniel Vetter 2021-07-12 17:53 ` [PATCH v4 08/18] drm/v3d: Move drm_sched_job_init to v3d_job_init Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-14 9:34 ` Melissa Wen 2021-07-14 9:34 ` [Intel-gfx] " Melissa Wen 2021-07-12 17:53 ` [PATCH v4 09/18] drm/v3d: Use scheduler dependency handling Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-14 9:37 ` Melissa Wen 2021-07-14 9:37 ` [Intel-gfx] " Melissa Wen 2021-07-12 17:53 ` [PATCH v4 10/18] drm/etnaviv: " Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` Daniel Vetter 2021-07-12 17:53 ` [PATCH v4 11/18] drm/gem: Delete gem array fencing helpers Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` Daniel Vetter 2021-07-12 17:53 ` [PATCH v4 12/18] drm/sched: Don't store self-dependencies Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` [PATCH v4 13/18] drm/sched: Check locking in drm_sched_job_await_implicit Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` [PATCH v4 14/18] drm/msm: Don't break exclusive fence ordering Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` Daniel Vetter 2021-07-13 16:55 ` Rob Clark 2021-07-13 16:55 ` [Intel-gfx] " Rob Clark 2021-07-13 16:55 ` Rob Clark 2021-07-13 16:58 ` Daniel Vetter 2021-07-13 16:58 ` [Intel-gfx] " Daniel Vetter 2021-07-13 16:58 ` Daniel Vetter 2021-07-13 17:46 ` Rob Clark 2021-07-13 17:46 ` [Intel-gfx] " Rob Clark 2021-07-13 17:46 ` Rob Clark 2021-07-13 17:45 ` Daniel Vetter 2021-07-13 17:45 ` [Intel-gfx] " Daniel Vetter 2021-07-13 17:45 ` Daniel Vetter 2021-07-12 17:53 ` Daniel Vetter [this message] 2021-07-12 17:53 ` [Intel-gfx] [PATCH v4 15/18] drm/etnaviv: " Daniel Vetter 2021-07-12 17:53 ` [PATCH v4 16/18] drm/i915: delete exclude argument from i915_sw_fence_await_reservation Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` [PATCH v4 17/18] drm/i915: Don't break exclusive fence ordering Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` [PATCH v4 18/18] dma-resv: Give the docs a do-over Daniel Vetter 2021-07-12 17:53 ` [Intel-gfx] " Daniel Vetter 2021-07-12 17:53 ` Daniel Vetter 2021-07-12 20:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/sched dependency tracking and dma-resv fixes (rev3) Patchwork 2021-07-12 21:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-07-12 23:43 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2021-07-27 11:51 ` [PATCH v4 00/18] drm/sched dependency tracking and dma-resv fixes Boris Brezillon 2021-07-27 11:51 ` [Intel-gfx] " Boris Brezillon 2021-07-27 14:47 ` Melissa Wen 2021-07-27 14:47 ` [Intel-gfx] " Melissa Wen
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