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From: Kishon Vijay Abraham I <kishon@ti.com>
To: Nishanth Menon <nm@ti.com>, Tero Kristo <kristo@kernel.org>,
	Rob Herring <robh+dt@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Kishon Vijay Abraham I <kishon@ti.com>, <lokeshvutla@ti.com>
Subject: [PATCH 2/6] arm64: dts: ti: k3-j721e-main: Fix "bus-range" upto 256 bus number for PCIe
Date: Wed, 15 Sep 2021 11:23:54 +0530	[thread overview]
Message-ID: <20210915055358.19997-3-kishon@ti.com> (raw)
In-Reply-To: <20210915055358.19997-1-kishon@ti.com>

commit 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device
tree nodes") restricted PCIe bus numbers from 0 to 15 (due to SMMU
restriction in J721E). However since SMMU is not enabled, allow the full
supported bus numbers from 0 to 255.

Fixes: 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 43be5d23130b..08c8d1b47dcd 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -610,7 +610,7 @@
 		clock-names = "fck";
 		#address-cells = <3>;
 		#size-cells = <2>;
-		bus-range = <0x0 0xf>;
+		bus-range = <0x0 0xff>;
 		vendor-id = <0x104c>;
 		device-id = <0xb00d>;
 		msi-map = <0x0 &gic_its 0x0 0x10000>;
@@ -658,7 +658,7 @@
 		clock-names = "fck";
 		#address-cells = <3>;
 		#size-cells = <2>;
-		bus-range = <0x0 0xf>;
+		bus-range = <0x0 0xff>;
 		vendor-id = <0x104c>;
 		device-id = <0xb00d>;
 		msi-map = <0x0 &gic_its 0x10000 0x10000>;
@@ -706,7 +706,7 @@
 		clock-names = "fck";
 		#address-cells = <3>;
 		#size-cells = <2>;
-		bus-range = <0x0 0xf>;
+		bus-range = <0x0 0xff>;
 		vendor-id = <0x104c>;
 		device-id = <0xb00d>;
 		msi-map = <0x0 &gic_its 0x20000 0x10000>;
@@ -754,7 +754,7 @@
 		clock-names = "fck";
 		#address-cells = <3>;
 		#size-cells = <2>;
-		bus-range = <0x0 0xf>;
+		bus-range = <0x0 0xff>;
 		vendor-id = <0x104c>;
 		device-id = <0xb00d>;
 		msi-map = <0x0 &gic_its 0x30000 0x10000>;
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Nishanth Menon <nm@ti.com>, Tero Kristo <kristo@kernel.org>,
	Rob Herring <robh+dt@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Kishon Vijay Abraham I <kishon@ti.com>, <lokeshvutla@ti.com>
Subject: [PATCH 2/6] arm64: dts: ti: k3-j721e-main: Fix "bus-range" upto 256 bus number for PCIe
Date: Wed, 15 Sep 2021 11:23:54 +0530	[thread overview]
Message-ID: <20210915055358.19997-3-kishon@ti.com> (raw)
In-Reply-To: <20210915055358.19997-1-kishon@ti.com>

commit 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device
tree nodes") restricted PCIe bus numbers from 0 to 15 (due to SMMU
restriction in J721E). However since SMMU is not enabled, allow the full
supported bus numbers from 0 to 255.

Fixes: 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 43be5d23130b..08c8d1b47dcd 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -610,7 +610,7 @@
 		clock-names = "fck";
 		#address-cells = <3>;
 		#size-cells = <2>;
-		bus-range = <0x0 0xf>;
+		bus-range = <0x0 0xff>;
 		vendor-id = <0x104c>;
 		device-id = <0xb00d>;
 		msi-map = <0x0 &gic_its 0x0 0x10000>;
@@ -658,7 +658,7 @@
 		clock-names = "fck";
 		#address-cells = <3>;
 		#size-cells = <2>;
-		bus-range = <0x0 0xf>;
+		bus-range = <0x0 0xff>;
 		vendor-id = <0x104c>;
 		device-id = <0xb00d>;
 		msi-map = <0x0 &gic_its 0x10000 0x10000>;
@@ -706,7 +706,7 @@
 		clock-names = "fck";
 		#address-cells = <3>;
 		#size-cells = <2>;
-		bus-range = <0x0 0xf>;
+		bus-range = <0x0 0xff>;
 		vendor-id = <0x104c>;
 		device-id = <0xb00d>;
 		msi-map = <0x0 &gic_its 0x20000 0x10000>;
@@ -754,7 +754,7 @@
 		clock-names = "fck";
 		#address-cells = <3>;
 		#size-cells = <2>;
-		bus-range = <0x0 0xf>;
+		bus-range = <0x0 0xff>;
 		vendor-id = <0x104c>;
 		device-id = <0xb00d>;
 		msi-map = <0x0 &gic_its 0x30000 0x10000>;
-- 
2.17.1


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  parent reply	other threads:[~2021-09-15  5:54 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-15  5:53 [PATCH 0/6] AM65/J7200/J721E: Misc PCIe DT fixes Kishon Vijay Abraham I
2021-09-15  5:53 ` Kishon Vijay Abraham I
2021-09-15  5:53 ` [PATCH 1/6] arm64: dts: ti: k3-j721e-main: Fix "max-virtual-functions" in PCIe EP nodes Kishon Vijay Abraham I
2021-09-15  5:53   ` Kishon Vijay Abraham I
2021-09-15  5:53 ` Kishon Vijay Abraham I [this message]
2021-09-15  5:53   ` [PATCH 2/6] arm64: dts: ti: k3-j721e-main: Fix "bus-range" upto 256 bus number for PCIe Kishon Vijay Abraham I
2021-09-15  5:53 ` [PATCH 3/6] arm64: dts: ti: j7200-main: Fix "vendor-id"/"device-id" properties of pcie node Kishon Vijay Abraham I
2021-09-15  5:53   ` Kishon Vijay Abraham I
2021-09-15  5:53 ` [PATCH 4/6] arm64: dts: ti: j7200-main: Fix "bus-range" upto 256 bus number for PCIe Kishon Vijay Abraham I
2021-09-15  5:53   ` Kishon Vijay Abraham I
2021-09-15  5:53 ` [PATCH 5/6] arm64: dts: ti: j7200-main: Add *max-virtual-functions* for pcie-ep DT node Kishon Vijay Abraham I
2021-09-15  5:53   ` Kishon Vijay Abraham I
2021-09-15  5:53 ` [PATCH 6/6] arm64: dts: ti: k3-am65-main: Cleanup "ranges" property in "pcie" " Kishon Vijay Abraham I
2021-09-15  5:53   ` Kishon Vijay Abraham I
2021-09-15 10:50 ` [PATCH 0/6] AM65/J7200/J721E: Misc PCIe DT fixes Aswath Govindraju
2021-09-15 10:50   ` Aswath Govindraju
2021-09-20 18:59 ` Nishanth Menon
2021-09-20 18:59   ` Nishanth Menon

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