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From: Richard Fitzgerald <rf@opensource.cirrus.com>
To: <broonie@kernel.org>
Cc: <alsa-devel@alsa-project.org>, <linux-kernel@vger.kernel.org>,
	<patches@opensource.cirrus.com>,
	Richard Fitzgerald <rf@opensource.cirrus.com>
Subject: [PATCH 14/16] ASoC: cs42l42: Mark OSC_SWITCH_STATUS register volatile
Date: Fri, 15 Oct 2021 14:36:17 +0100	[thread overview]
Message-ID: <20211015133619.4698-15-rf@opensource.cirrus.com> (raw)
In-Reply-To: <20211015133619.4698-1-rf@opensource.cirrus.com>

OSC_SWITCH_STATUS is a volatile register indicating the current state
of the clock switch logic.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
---
 sound/soc/codecs/cs42l42.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c
index 05b8ae62b20d..8e4a43c5a120 100644
--- a/sound/soc/codecs/cs42l42.c
+++ b/sound/soc/codecs/cs42l42.c
@@ -52,7 +52,6 @@ static const struct reg_default cs42l42_reg_defaults[] = {
 	{ CS42L42_RSENSE_CTL1,			0x40 },
 	{ CS42L42_RSENSE_CTL2,			0x00 },
 	{ CS42L42_OSC_SWITCH,			0x00 },
-	{ CS42L42_OSC_SWITCH_STATUS,		0x05 },
 	{ CS42L42_RSENSE_CTL3,			0x1B },
 	{ CS42L42_TSENSE_CTL,			0x1B },
 	{ CS42L42_TSRS_INT_DISABLE,		0x00 },
@@ -331,6 +330,7 @@ static bool cs42l42_volatile_register(struct device *dev, unsigned int reg)
 	case CS42L42_DEVID_CD:
 	case CS42L42_DEVID_E:
 	case CS42L42_MCLK_STATUS:
+	case CS42L42_OSC_SWITCH_STATUS:
 	case CS42L42_TRSENSE_STATUS:
 	case CS42L42_HS_DET_STATUS:
 	case CS42L42_ADC_OVFL_STATUS:
-- 
2.11.0


WARNING: multiple messages have this Message-ID (diff)
From: Richard Fitzgerald <rf@opensource.cirrus.com>
To: <broonie@kernel.org>
Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org,
	Richard Fitzgerald <rf@opensource.cirrus.com>,
	linux-kernel@vger.kernel.org
Subject: [PATCH 14/16] ASoC: cs42l42: Mark OSC_SWITCH_STATUS register volatile
Date: Fri, 15 Oct 2021 14:36:17 +0100	[thread overview]
Message-ID: <20211015133619.4698-15-rf@opensource.cirrus.com> (raw)
In-Reply-To: <20211015133619.4698-1-rf@opensource.cirrus.com>

OSC_SWITCH_STATUS is a volatile register indicating the current state
of the clock switch logic.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
---
 sound/soc/codecs/cs42l42.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c
index 05b8ae62b20d..8e4a43c5a120 100644
--- a/sound/soc/codecs/cs42l42.c
+++ b/sound/soc/codecs/cs42l42.c
@@ -52,7 +52,6 @@ static const struct reg_default cs42l42_reg_defaults[] = {
 	{ CS42L42_RSENSE_CTL1,			0x40 },
 	{ CS42L42_RSENSE_CTL2,			0x00 },
 	{ CS42L42_OSC_SWITCH,			0x00 },
-	{ CS42L42_OSC_SWITCH_STATUS,		0x05 },
 	{ CS42L42_RSENSE_CTL3,			0x1B },
 	{ CS42L42_TSENSE_CTL,			0x1B },
 	{ CS42L42_TSRS_INT_DISABLE,		0x00 },
@@ -331,6 +330,7 @@ static bool cs42l42_volatile_register(struct device *dev, unsigned int reg)
 	case CS42L42_DEVID_CD:
 	case CS42L42_DEVID_E:
 	case CS42L42_MCLK_STATUS:
+	case CS42L42_OSC_SWITCH_STATUS:
 	case CS42L42_TRSENSE_STATUS:
 	case CS42L42_HS_DET_STATUS:
 	case CS42L42_ADC_OVFL_STATUS:
-- 
2.11.0


  parent reply	other threads:[~2021-10-15 13:37 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-15 13:36 [PATCH 00/16] ASoC: cs42l42: Collection of bugfixes Richard Fitzgerald
2021-10-15 13:36 ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 01/16] ASoC: cs42l42: Don't reconfigure the PLL while it is running Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 02/16] ASoC: cs42l42: Always configure both ASP TX channels Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 03/16] ASoC: cs42l42: Correct some register default values Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 04/16] ASoC: cs42l42: Don't set defaults for volatile registers Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 05/16] ASoC: cs42l42: Defer probe if request_threaded_irq() returns EPROBE_DEFER Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 06/16] ASoC: cs42l42: Reset GPIO is mandatory Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 14:30   ` Mark Brown
2021-10-15 14:30     ` Mark Brown
2021-10-15 13:36 ` [PATCH 07/16] ASoC: cs42l42: Correct power-up sequence to match datasheet Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 15:02   ` Mark Brown
2021-10-15 15:02     ` Mark Brown
2021-10-15 13:36 ` [PATCH 08/16] ASoC: cs42l42: Reset and power-down on driver remove() Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 15:04   ` Mark Brown
2021-10-15 15:04     ` Mark Brown
2021-10-15 13:36 ` [PATCH 09/16] ASoC: cs42l42: Prevent NULL pointer deref in interrupt handler Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 10/16] ASoC: cs42l42: Don't claim to support 192k Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 11/16] ASoC: cs42l42: Use PLL for SCLK > 12.288MHz Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 12/16] ASoC: cs42l42: Allow time for HP/ADC to power-up after enable Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 13/16] ASoC: cs42l42: Set correct SRC MCLK Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` Richard Fitzgerald [this message]
2021-10-15 13:36   ` [PATCH 14/16] ASoC: cs42l42: Mark OSC_SWITCH_STATUS register volatile Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 15/16] ASoC: cs42l42: Fix WARN in remove() if running without an interrupt Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 16/16] ASoC: cs42l42: Always enable TS_PLUG and TS_UNPLUG interrupts Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 19:42 ` (subset) [PATCH 00/16] ASoC: cs42l42: Collection of bugfixes Mark Brown
2021-10-15 19:42   ` Mark Brown

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