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From: Richard Fitzgerald <rf@opensource.cirrus.com>
To: <broonie@kernel.org>
Cc: <alsa-devel@alsa-project.org>, <linux-kernel@vger.kernel.org>,
	<patches@opensource.cirrus.com>,
	Richard Fitzgerald <rf@opensource.cirrus.com>
Subject: [PATCH 02/16] ASoC: cs42l42: Always configure both ASP TX channels
Date: Fri, 15 Oct 2021 14:36:05 +0100	[thread overview]
Message-ID: <20211015133619.4698-3-rf@opensource.cirrus.com> (raw)
In-Reply-To: <20211015133619.4698-1-rf@opensource.cirrus.com>

An I2S frame always has two slots (left and right) even when sending
mono. The right channel (channel 2) of ASP TX will always have the
same bit width as the left channel and will always be on the high
phase of LRCLK.

The previous implementation always passed the field masks for both
channels to snd_soc_component_update_bits() but for mono the written value
only contained the settings for channel 1. The result was that for mono
channel 2 was set to 8-bit (which is an invalid configuration) with both
channels on the low phase of LRCLK.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Fixes: 585e7079de0e ("ASoC: cs42l42: Add Capture Support")
---
 sound/soc/codecs/cs42l42.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c
index 26f6a3510a03..c52393301294 100644
--- a/sound/soc/codecs/cs42l42.c
+++ b/sound/soc/codecs/cs42l42.c
@@ -861,11 +861,10 @@ static int cs42l42_pcm_hw_params(struct snd_pcm_substream *substream,
 
 	switch (substream->stream) {
 	case SNDRV_PCM_STREAM_CAPTURE:
-		if (channels == 2) {
-			val |= CS42L42_ASP_TX_CH2_AP_MASK;
-			val |= width << CS42L42_ASP_TX_CH2_RES_SHIFT;
-		}
-		val |= width << CS42L42_ASP_TX_CH1_RES_SHIFT;
+		/* channel 2 on high LRCLK */
+		val = CS42L42_ASP_TX_CH2_AP_MASK |
+		      (width << CS42L42_ASP_TX_CH2_RES_SHIFT) |
+		      (width << CS42L42_ASP_TX_CH1_RES_SHIFT);
 
 		snd_soc_component_update_bits(component, CS42L42_ASP_TX_CH_AP_RES,
 				CS42L42_ASP_TX_CH1_AP_MASK | CS42L42_ASP_TX_CH2_AP_MASK |
-- 
2.11.0


WARNING: multiple messages have this Message-ID (diff)
From: Richard Fitzgerald <rf@opensource.cirrus.com>
To: <broonie@kernel.org>
Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org,
	Richard Fitzgerald <rf@opensource.cirrus.com>,
	linux-kernel@vger.kernel.org
Subject: [PATCH 02/16] ASoC: cs42l42: Always configure both ASP TX channels
Date: Fri, 15 Oct 2021 14:36:05 +0100	[thread overview]
Message-ID: <20211015133619.4698-3-rf@opensource.cirrus.com> (raw)
In-Reply-To: <20211015133619.4698-1-rf@opensource.cirrus.com>

An I2S frame always has two slots (left and right) even when sending
mono. The right channel (channel 2) of ASP TX will always have the
same bit width as the left channel and will always be on the high
phase of LRCLK.

The previous implementation always passed the field masks for both
channels to snd_soc_component_update_bits() but for mono the written value
only contained the settings for channel 1. The result was that for mono
channel 2 was set to 8-bit (which is an invalid configuration) with both
channels on the low phase of LRCLK.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Fixes: 585e7079de0e ("ASoC: cs42l42: Add Capture Support")
---
 sound/soc/codecs/cs42l42.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c
index 26f6a3510a03..c52393301294 100644
--- a/sound/soc/codecs/cs42l42.c
+++ b/sound/soc/codecs/cs42l42.c
@@ -861,11 +861,10 @@ static int cs42l42_pcm_hw_params(struct snd_pcm_substream *substream,
 
 	switch (substream->stream) {
 	case SNDRV_PCM_STREAM_CAPTURE:
-		if (channels == 2) {
-			val |= CS42L42_ASP_TX_CH2_AP_MASK;
-			val |= width << CS42L42_ASP_TX_CH2_RES_SHIFT;
-		}
-		val |= width << CS42L42_ASP_TX_CH1_RES_SHIFT;
+		/* channel 2 on high LRCLK */
+		val = CS42L42_ASP_TX_CH2_AP_MASK |
+		      (width << CS42L42_ASP_TX_CH2_RES_SHIFT) |
+		      (width << CS42L42_ASP_TX_CH1_RES_SHIFT);
 
 		snd_soc_component_update_bits(component, CS42L42_ASP_TX_CH_AP_RES,
 				CS42L42_ASP_TX_CH1_AP_MASK | CS42L42_ASP_TX_CH2_AP_MASK |
-- 
2.11.0


  parent reply	other threads:[~2021-10-15 13:37 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-15 13:36 [PATCH 00/16] ASoC: cs42l42: Collection of bugfixes Richard Fitzgerald
2021-10-15 13:36 ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 01/16] ASoC: cs42l42: Don't reconfigure the PLL while it is running Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` Richard Fitzgerald [this message]
2021-10-15 13:36   ` [PATCH 02/16] ASoC: cs42l42: Always configure both ASP TX channels Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 03/16] ASoC: cs42l42: Correct some register default values Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 04/16] ASoC: cs42l42: Don't set defaults for volatile registers Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 05/16] ASoC: cs42l42: Defer probe if request_threaded_irq() returns EPROBE_DEFER Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 06/16] ASoC: cs42l42: Reset GPIO is mandatory Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 14:30   ` Mark Brown
2021-10-15 14:30     ` Mark Brown
2021-10-15 13:36 ` [PATCH 07/16] ASoC: cs42l42: Correct power-up sequence to match datasheet Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 15:02   ` Mark Brown
2021-10-15 15:02     ` Mark Brown
2021-10-15 13:36 ` [PATCH 08/16] ASoC: cs42l42: Reset and power-down on driver remove() Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 15:04   ` Mark Brown
2021-10-15 15:04     ` Mark Brown
2021-10-15 13:36 ` [PATCH 09/16] ASoC: cs42l42: Prevent NULL pointer deref in interrupt handler Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 10/16] ASoC: cs42l42: Don't claim to support 192k Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 11/16] ASoC: cs42l42: Use PLL for SCLK > 12.288MHz Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 12/16] ASoC: cs42l42: Allow time for HP/ADC to power-up after enable Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 13/16] ASoC: cs42l42: Set correct SRC MCLK Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 14/16] ASoC: cs42l42: Mark OSC_SWITCH_STATUS register volatile Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 15/16] ASoC: cs42l42: Fix WARN in remove() if running without an interrupt Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 13:36 ` [PATCH 16/16] ASoC: cs42l42: Always enable TS_PLUG and TS_UNPLUG interrupts Richard Fitzgerald
2021-10-15 13:36   ` Richard Fitzgerald
2021-10-15 19:42 ` (subset) [PATCH 00/16] ASoC: cs42l42: Collection of bugfixes Mark Brown
2021-10-15 19:42   ` Mark Brown

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