From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: daniel.lezcano@linaro.org, robh@kernel.org
Cc: arnd@linaro.org, heiko@sntech.de, ulf.hansson@linaro.org,
rjw@rjwysocki.net, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
lukasz.luba@arm.com, Robin Murphy <robin.murphy@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Johan Jonker <jbx6244@gmail.com>,
Helen Koike <helen.koike@collabora.com>,
Brian Norris <briannorris@chromium.org>,
Elaine Zhang <zhangqing@rock-chips.com>,
linux-arm-kernel@lists.infradead.org (moderated
list:ARM/Rockchip SoC support),
linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC
support)
Subject: [PATCH v3 2/5] arm64: dts: rockchip: Add powerzones definition for rock960
Date: Wed, 1 Dec 2021 17:38:51 +0100 [thread overview]
Message-ID: <20211201163856.41419-2-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <20211201163856.41419-1-daniel.lezcano@linaro.org>
Add the powerzones description. This first step introduces the big,
the little as powerzone places.
Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
V3:
- Remove GPU section as no power is available (yet)
- Remove '#powerzone-cells' conforming to the bindings change
V2:
- Move description in the SoC dtsi specific file
V1: Initial post
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index d3cdf6f42a30..c41b20888a44 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -76,6 +76,7 @@ cpu_l0: cpu@0 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_l1: cpu@1 {
@@ -88,6 +89,7 @@ cpu_l1: cpu@1 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_l2: cpu@2 {
@@ -100,6 +102,7 @@ cpu_l2: cpu@2 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_l3: cpu@3 {
@@ -112,6 +115,7 @@ cpu_l3: cpu@3 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_b0: cpu@100 {
@@ -124,6 +128,7 @@ cpu_b0: cpu@100 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <436>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
thermal-idle {
#cooling-cells = <2>;
@@ -142,6 +147,7 @@ cpu_b1: cpu@101 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <436>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
thermal-idle {
#cooling-cells = <2>;
@@ -791,6 +797,17 @@ spi5: spi@ff200000 {
status = "disabled";
};
+ powerzones {
+
+ PKG_PZ: pkg {
+ #powerzone-cells = <0>;
+ powerzone = <&SOC_PZ>;
+ };
+
+ SOC_PZ: soc {
+ };
+ };
+
thermal_zones: thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <100>;
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: daniel.lezcano@linaro.org, robh@kernel.org
Cc: arnd@linaro.org, heiko@sntech.de, ulf.hansson@linaro.org,
rjw@rjwysocki.net, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
lukasz.luba@arm.com, Robin Murphy <robin.murphy@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Johan Jonker <jbx6244@gmail.com>,
Helen Koike <helen.koike@collabora.com>,
Brian Norris <briannorris@chromium.org>,
Elaine Zhang <zhangqing@rock-chips.com>,
linux-arm-kernel@lists.infradead.org (moderated
list:ARM/Rockchip SoC support),
linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC
support)
Subject: [PATCH v3 2/5] arm64: dts: rockchip: Add powerzones definition for rock960
Date: Wed, 1 Dec 2021 17:38:51 +0100 [thread overview]
Message-ID: <20211201163856.41419-2-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <20211201163856.41419-1-daniel.lezcano@linaro.org>
Add the powerzones description. This first step introduces the big,
the little as powerzone places.
Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
V3:
- Remove GPU section as no power is available (yet)
- Remove '#powerzone-cells' conforming to the bindings change
V2:
- Move description in the SoC dtsi specific file
V1: Initial post
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index d3cdf6f42a30..c41b20888a44 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -76,6 +76,7 @@ cpu_l0: cpu@0 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_l1: cpu@1 {
@@ -88,6 +89,7 @@ cpu_l1: cpu@1 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_l2: cpu@2 {
@@ -100,6 +102,7 @@ cpu_l2: cpu@2 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_l3: cpu@3 {
@@ -112,6 +115,7 @@ cpu_l3: cpu@3 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_b0: cpu@100 {
@@ -124,6 +128,7 @@ cpu_b0: cpu@100 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <436>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
thermal-idle {
#cooling-cells = <2>;
@@ -142,6 +147,7 @@ cpu_b1: cpu@101 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <436>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
thermal-idle {
#cooling-cells = <2>;
@@ -791,6 +797,17 @@ spi5: spi@ff200000 {
status = "disabled";
};
+ powerzones {
+
+ PKG_PZ: pkg {
+ #powerzone-cells = <0>;
+ powerzone = <&SOC_PZ>;
+ };
+
+ SOC_PZ: soc {
+ };
+ };
+
thermal_zones: thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <100>;
--
2.25.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: daniel.lezcano@linaro.org, robh@kernel.org
Cc: arnd@linaro.org, heiko@sntech.de, ulf.hansson@linaro.org,
rjw@rjwysocki.net, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
lukasz.luba@arm.com, Robin Murphy <robin.murphy@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Johan Jonker <jbx6244@gmail.com>,
Helen Koike <helen.koike@collabora.com>,
Brian Norris <briannorris@chromium.org>,
Elaine Zhang <zhangqing@rock-chips.com>,
linux-arm-kernel@lists.infradead.org (moderated
list:ARM/Rockchip SoC support),
linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC
support)
Subject: [PATCH v3 2/5] arm64: dts: rockchip: Add powerzones definition for rock960
Date: Wed, 1 Dec 2021 17:38:51 +0100 [thread overview]
Message-ID: <20211201163856.41419-2-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <20211201163856.41419-1-daniel.lezcano@linaro.org>
Add the powerzones description. This first step introduces the big,
the little as powerzone places.
Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
V3:
- Remove GPU section as no power is available (yet)
- Remove '#powerzone-cells' conforming to the bindings change
V2:
- Move description in the SoC dtsi specific file
V1: Initial post
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index d3cdf6f42a30..c41b20888a44 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -76,6 +76,7 @@ cpu_l0: cpu@0 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_l1: cpu@1 {
@@ -88,6 +89,7 @@ cpu_l1: cpu@1 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_l2: cpu@2 {
@@ -100,6 +102,7 @@ cpu_l2: cpu@2 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_l3: cpu@3 {
@@ -112,6 +115,7 @@ cpu_l3: cpu@3 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_b0: cpu@100 {
@@ -124,6 +128,7 @@ cpu_b0: cpu@100 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <436>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
thermal-idle {
#cooling-cells = <2>;
@@ -142,6 +147,7 @@ cpu_b1: cpu@101 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <436>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
thermal-idle {
#cooling-cells = <2>;
@@ -791,6 +797,17 @@ spi5: spi@ff200000 {
status = "disabled";
};
+ powerzones {
+
+ PKG_PZ: pkg {
+ #powerzone-cells = <0>;
+ powerzone = <&SOC_PZ>;
+ };
+
+ SOC_PZ: soc {
+ };
+ };
+
thermal_zones: thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <100>;
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-12-01 16:42 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-01 16:38 [PATCH v3 1/5] dt-bindings: Powerzone new bindings Daniel Lezcano
2021-12-01 16:38 ` Daniel Lezcano [this message]
2021-12-01 16:38 ` [PATCH v3 2/5] arm64: dts: rockchip: Add powerzones definition for rock960 Daniel Lezcano
2021-12-01 16:38 ` Daniel Lezcano
2021-12-02 14:45 ` Ulf Hansson
2021-12-02 14:45 ` Ulf Hansson
2021-12-02 14:45 ` Ulf Hansson
2021-12-01 16:38 ` [PATCH v3 3/5] powercap/drivers/dtpm: Add DT initialization support Daniel Lezcano
2021-12-01 16:38 ` [PATCH v3 4/5] powercap/drivers/dtpm: Add CPU " Daniel Lezcano
2021-12-01 16:38 ` [PATCH v3 5/5] powercap/drivers/dtpm: Add dtpm devfreq with energy model support Daniel Lezcano
2021-12-02 14:42 ` [PATCH v3 1/5] dt-bindings: Powerzone new bindings Ulf Hansson
2021-12-02 16:25 ` Daniel Lezcano
2021-12-03 8:19 ` Daniel Lezcano
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