From: Marek Szyprowski <m.szyprowski@samsung.com> To: linux-pci@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-phy@lists.infradead.org Cc: "Marek Szyprowski" <m.szyprowski@samsung.com>, "Jingoo Han" <jingoohan1@gmail.com>, "Lorenzo Pieralisi" <lpieralisi@kernel.org>, "Rob Herring" <robh@kernel.org>, "Krzysztof Wilczyński" <kw@linux.com>, "Bjorn Helgaas" <bhelgaas@google.com>, "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>, "Alim Akhtar" <alim.akhtar@samsung.com>, "Kishon Vijay Abraham I" <kishon@ti.com>, "Vinod Koul" <vkoul@kernel.org> Subject: [PATCH 2/2] PCI: dwc: exynos: Correct generic PHY usage Date: Wed, 29 Jun 2022 00:04:09 +0200 [thread overview] Message-ID: <20220628220409.26545-2-m.szyprowski@samsung.com> (raw) In-Reply-To: <20220628220409.26545-1-m.szyprowski@samsung.com> The proper initialization for generic PHYs is to call first phy_init(), then phy_power_on(). While touching this, lets remove the phy_reset() call. It is just a left-over from the obsoleted Exynos5440 support and current exynos-pcie PHY driver doesn't even support this function. It is also rarely used by other drivers. Reported-by: Bjorn Helgaas <helgaas@kernel.org> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> --- The exynos-pcie PHY driver has been adjusted for this change in the previous patch. --- drivers/pci/controller/dwc/pci-exynos.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-exynos.c b/drivers/pci/controller/dwc/pci-exynos.c index 467c8d1cd7e4..0d490ae52874 100644 --- a/drivers/pci/controller/dwc/pci-exynos.c +++ b/drivers/pci/controller/dwc/pci-exynos.c @@ -258,9 +258,8 @@ static int exynos_pcie_host_init(struct pcie_port *pp) exynos_pcie_assert_core_reset(ep); - phy_reset(ep->phy); - phy_power_on(ep->phy); phy_init(ep->phy); + phy_power_on(ep->phy); exynos_pcie_deassert_core_reset(ep); exynos_pcie_enable_irq_pulse(ep); -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Marek Szyprowski <m.szyprowski@samsung.com> To: linux-pci@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-phy@lists.infradead.org Cc: "Marek Szyprowski" <m.szyprowski@samsung.com>, "Jingoo Han" <jingoohan1@gmail.com>, "Lorenzo Pieralisi" <lpieralisi@kernel.org>, "Rob Herring" <robh@kernel.org>, "Krzysztof Wilczyński" <kw@linux.com>, "Bjorn Helgaas" <bhelgaas@google.com>, "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>, "Alim Akhtar" <alim.akhtar@samsung.com>, "Kishon Vijay Abraham I" <kishon@ti.com>, "Vinod Koul" <vkoul@kernel.org> Subject: [PATCH 2/2] PCI: dwc: exynos: Correct generic PHY usage Date: Wed, 29 Jun 2022 00:04:09 +0200 [thread overview] Message-ID: <20220628220409.26545-2-m.szyprowski@samsung.com> (raw) In-Reply-To: <20220628220409.26545-1-m.szyprowski@samsung.com> The proper initialization for generic PHYs is to call first phy_init(), then phy_power_on(). While touching this, lets remove the phy_reset() call. It is just a left-over from the obsoleted Exynos5440 support and current exynos-pcie PHY driver doesn't even support this function. It is also rarely used by other drivers. Reported-by: Bjorn Helgaas <helgaas@kernel.org> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> --- The exynos-pcie PHY driver has been adjusted for this change in the previous patch. --- drivers/pci/controller/dwc/pci-exynos.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-exynos.c b/drivers/pci/controller/dwc/pci-exynos.c index 467c8d1cd7e4..0d490ae52874 100644 --- a/drivers/pci/controller/dwc/pci-exynos.c +++ b/drivers/pci/controller/dwc/pci-exynos.c @@ -258,9 +258,8 @@ static int exynos_pcie_host_init(struct pcie_port *pp) exynos_pcie_assert_core_reset(ep); - phy_reset(ep->phy); - phy_power_on(ep->phy); phy_init(ep->phy); + phy_power_on(ep->phy); exynos_pcie_deassert_core_reset(ep); exynos_pcie_enable_irq_pulse(ep); -- 2.17.1 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2022-06-28 22:04 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <CGME20220628220437eucas1p2c478751458323f93a71050c4a949f12e@eucas1p2.samsung.com> 2022-06-28 22:04 ` [PATCH 1/2] phy: samsung: phy-exynos-pcie: sanitize init/power_on callbacks Marek Szyprowski 2022-06-28 22:04 ` Marek Szyprowski [not found] ` <CGME20220628220441eucas1p2098d46abc47ec1888781fdc5319dec67@eucas1p2.samsung.com> 2022-06-28 22:04 ` Marek Szyprowski [this message] 2022-06-28 22:04 ` [PATCH 2/2] PCI: dwc: exynos: Correct generic PHY usage Marek Szyprowski 2022-06-29 2:57 ` Chanho Park 2022-06-29 2:57 ` Chanho Park 2022-06-29 6:05 ` Krzysztof Kozlowski 2022-06-29 6:05 ` Krzysztof Kozlowski 2022-06-29 2:57 ` [PATCH 1/2] phy: samsung: phy-exynos-pcie: sanitize init/power_on callbacks Chanho Park 2022-06-29 2:57 ` Chanho Park 2022-06-29 6:04 ` Krzysztof Kozlowski 2022-06-29 6:04 ` Krzysztof Kozlowski 2022-07-05 6:25 ` Vinod Koul 2022-07-05 6:25 ` Vinod Koul 2022-07-12 20:12 ` Bjorn Helgaas 2022-07-12 20:12 ` Bjorn Helgaas 2022-07-15 11:35 ` Vinod Koul 2022-07-15 11:35 ` Vinod Koul 2022-07-15 22:43 ` Bjorn Helgaas 2022-07-15 22:43 ` Bjorn Helgaas 2022-07-15 23:12 ` Bjorn Helgaas 2022-07-15 23:12 ` Bjorn Helgaas 2022-07-15 11:35 ` Vinod Koul 2022-07-15 11:35 ` Vinod Koul 2022-07-15 23:21 ` Bjorn Helgaas 2022-07-15 23:21 ` Bjorn Helgaas
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