All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>
Subject: [Intel-gfx] [PATCH v4 08/17] drm/i915: Compute clocks earlier
Date: Wed,  7 Sep 2022 12:10:48 +0300	[thread overview]
Message-ID: <20220907091057.11572-9-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20220907091057.11572-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Do the DPLL computation before fastset checks. This should
allow us to get rid of all that horrible fuzzy clock handling
for fastsets. Who knows how many bugs there are caused by our
state not actually matching what the hardware will generate.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 4e8d30ff998b..a532c4d640ad 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2690,6 +2690,10 @@ static int intel_crtc_compute_config(struct intel_atomic_state *state,
 		intel_atomic_get_new_crtc_state(state, crtc);
 	int ret;
 
+	ret = intel_dpll_crtc_compute_clock(state, crtc);
+	if (ret)
+		return ret;
+
 	ret = intel_crtc_compute_pipe_src(crtc_state);
 	if (ret)
 		return ret;
@@ -6894,10 +6898,6 @@ static int intel_atomic_check(struct drm_device *dev,
 		if (intel_crtc_needs_modeset(new_crtc_state)) {
 			any_ms = true;
 
-			ret = intel_dpll_crtc_compute_clock(state, crtc);
-			if (ret)
-				goto fail;
-
 			intel_release_shared_dplls(state, crtc);
 			continue;
 		}
-- 
2.35.1


  parent reply	other threads:[~2022-09-07  9:11 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-07  9:10 [Intel-gfx] [PATCH v4 00/17] drm/i915: Make fastset not suck and allow seamless M/N changes Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 01/17] drm/i915: Relocate intel_crtc_dotclock() Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 02/17] drm/i915: Shuffle some PLL code around Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 03/17] drm/i915: Extract HAS_DOUBLE_BUFFERED_M_N() Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 04/17] drm/i915/dsi: Extract {vlv, bxt}_get_pclk() Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 05/17] drm/i915: Do .crtc_compute_clock() earlier Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 06/17] drm/i915: Reassign DPLLs only for crtcs going throug .compute_config() Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 07/17] drm/i915: Feed the DPLL output freq back into crtc_state Ville Syrjala
2022-09-07  9:10 ` Ville Syrjala [this message]
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 09/17] drm/i915: Make M/N checks non-fuzzy Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 10/17] drm/i915: Make all clock " Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 11/17] drm/i915: Set active dpll early for icl+ Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 12/17] drm/i915: Nuke fastet state copy hacks Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 13/17] drm/i915: Skip intel_modeset_pipe_config_late() if the pipe is not enabled Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 14/17] drm/i915: Add intel_panel_highest_mode() Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 15/17] drm/i915: Allow M/N change during fastset on bdw+ Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 16/17] drm/i915: Use a fixed N value always Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 17/17] drm/i915: Round TMDS clock to nearest Ville Syrjala
2022-09-07 11:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Make fastset not suck and allow seamless M/N changes (rev7) Patchwork
2022-09-07 11:48 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-09-07 12:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-07 17:34 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220907091057.11572-9-ville.syrjala@linux.intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.