From: Johnson Wang <johnson.wang@mediatek.com> To: <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <angelogioacchino.delregno@collabora.com>, <sboyd@kernel.org> Cc: <linux-clk@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <Project_Global_Chrome_Upstream_Group@mediatek.com>, Johnson Wang <johnson.wang@mediatek.com> Subject: [PATCH v2 0/4] Introduce MediaTek frequency hopping driver Date: Wed, 14 Sep 2022 20:45:48 +0800 [thread overview] Message-ID: <20220914124552.16964-1-johnson.wang@mediatek.com> (raw) The purpose of this serie is to enhance frequency hopping and spread spectrum clocking feature for MT8186. We introduce new PLL register APIs and some helpers for FHCTL hardware control. For MT8186 PLL driver, we replace mtk_clk_register_plls() with newly added API to support frequency hopping and SSC function for specific PLLs. Changes in v2: - Use SoC-specific compatible instead of generic one. - Use standard clocks property and vendor-specific property in dt-binding. - Remove some unused arguments and fix some coding style. Johnson Wang (4): clk: mediatek: Export PLL operations symbols dt-bindings: arm: mediatek: Add new bindings of MediaTek frequency hopping clk: mediatek: Add new clock driver to handle FHCTL hardware clk: mediatek: Change PLL register API for MT8186 .../bindings/arm/mediatek/mediatek,fhctl.yaml | 47 +++ drivers/clk/mediatek/Makefile | 2 +- drivers/clk/mediatek/clk-fhctl.c | 244 ++++++++++++++++ drivers/clk/mediatek/clk-fhctl.h | 26 ++ drivers/clk/mediatek/clk-mt8186-apmixedsys.c | 66 ++++- drivers/clk/mediatek/clk-pll.c | 84 +++--- drivers/clk/mediatek/clk-pll.h | 56 ++++ drivers/clk/mediatek/clk-pllfh.c | 268 ++++++++++++++++++ drivers/clk/mediatek/clk-pllfh.h | 82 ++++++ 9 files changed, 821 insertions(+), 54 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml create mode 100644 drivers/clk/mediatek/clk-fhctl.c create mode 100644 drivers/clk/mediatek/clk-fhctl.h create mode 100644 drivers/clk/mediatek/clk-pllfh.c create mode 100644 drivers/clk/mediatek/clk-pllfh.h -- 2.18.0
WARNING: multiple messages have this Message-ID (diff)
From: Johnson Wang <johnson.wang@mediatek.com> To: <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <angelogioacchino.delregno@collabora.com>, <sboyd@kernel.org> Cc: <linux-clk@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <Project_Global_Chrome_Upstream_Group@mediatek.com>, Johnson Wang <johnson.wang@mediatek.com> Subject: [PATCH v2 0/4] Introduce MediaTek frequency hopping driver Date: Wed, 14 Sep 2022 20:45:48 +0800 [thread overview] Message-ID: <20220914124552.16964-1-johnson.wang@mediatek.com> (raw) The purpose of this serie is to enhance frequency hopping and spread spectrum clocking feature for MT8186. We introduce new PLL register APIs and some helpers for FHCTL hardware control. For MT8186 PLL driver, we replace mtk_clk_register_plls() with newly added API to support frequency hopping and SSC function for specific PLLs. Changes in v2: - Use SoC-specific compatible instead of generic one. - Use standard clocks property and vendor-specific property in dt-binding. - Remove some unused arguments and fix some coding style. Johnson Wang (4): clk: mediatek: Export PLL operations symbols dt-bindings: arm: mediatek: Add new bindings of MediaTek frequency hopping clk: mediatek: Add new clock driver to handle FHCTL hardware clk: mediatek: Change PLL register API for MT8186 .../bindings/arm/mediatek/mediatek,fhctl.yaml | 47 +++ drivers/clk/mediatek/Makefile | 2 +- drivers/clk/mediatek/clk-fhctl.c | 244 ++++++++++++++++ drivers/clk/mediatek/clk-fhctl.h | 26 ++ drivers/clk/mediatek/clk-mt8186-apmixedsys.c | 66 ++++- drivers/clk/mediatek/clk-pll.c | 84 +++--- drivers/clk/mediatek/clk-pll.h | 56 ++++ drivers/clk/mediatek/clk-pllfh.c | 268 ++++++++++++++++++ drivers/clk/mediatek/clk-pllfh.h | 82 ++++++ 9 files changed, 821 insertions(+), 54 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml create mode 100644 drivers/clk/mediatek/clk-fhctl.c create mode 100644 drivers/clk/mediatek/clk-fhctl.h create mode 100644 drivers/clk/mediatek/clk-pllfh.c create mode 100644 drivers/clk/mediatek/clk-pllfh.h -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2022-09-14 12:46 UTC|newest] Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-09-14 12:45 Johnson Wang [this message] 2022-09-14 12:45 ` [PATCH v2 0/4] Introduce MediaTek frequency hopping driver Johnson Wang 2022-09-14 12:45 ` [PATCH v2 1/4] clk: mediatek: Export PLL operations symbols Johnson Wang 2022-09-14 12:45 ` Johnson Wang 2022-09-14 12:45 ` [PATCH v2 2/4] dt-bindings: arm: mediatek: Add new bindings of MediaTek frequency hopping Johnson Wang 2022-09-14 12:45 ` Johnson Wang 2022-09-14 13:46 ` AngeloGioacchino Del Regno 2022-09-14 13:46 ` AngeloGioacchino Del Regno 2022-09-15 4:00 ` Johnson Wang 2022-09-15 4:00 ` Johnson Wang 2022-09-15 6:56 ` AngeloGioacchino Del Regno 2022-09-15 6:56 ` AngeloGioacchino Del Regno 2022-09-18 9:38 ` Krzysztof Kozlowski 2022-09-18 9:38 ` Krzysztof Kozlowski 2022-09-28 6:18 ` Johnson Wang (王聖鑫) 2022-09-28 6:18 ` Johnson Wang (王聖鑫) 2022-09-14 12:45 ` [PATCH v2 3/4] clk: mediatek: Add new clock driver to handle FHCTL hardware Johnson Wang 2022-09-14 12:45 ` Johnson Wang 2022-09-27 10:56 ` Edward-JW Yang 2022-09-27 10:56 ` Edward-JW Yang 2022-09-28 6:18 ` Johnson Wang (王聖鑫) 2022-09-28 6:18 ` Johnson Wang (王聖鑫) 2022-09-14 12:45 ` [PATCH v2 4/4] clk: mediatek: Change PLL register API for MT8186 Johnson Wang 2022-09-14 12:45 ` Johnson Wang
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