All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jisheng Zhang <jszhang@kernel.org>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Conor Dooley <conor.dooley@microchip.com>,
	Andrew Jones <ajones@ventanamicro.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Subject: [PATCH v4 07/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely()
Date: Sun, 15 Jan 2023 23:49:47 +0800	[thread overview]
Message-ID: <20230115154953.831-8-jszhang@kernel.org> (raw)
In-Reply-To: <20230115154953.831-1-jszhang@kernel.org>

Switch has_fpu() from static branch to the new helper
riscv_has_extension_likely().

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/include/asm/switch_to.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h
index 11463489fec6..60f8ca01d36e 100644
--- a/arch/riscv/include/asm/switch_to.h
+++ b/arch/riscv/include/asm/switch_to.h
@@ -59,7 +59,8 @@ static inline void __switch_to_aux(struct task_struct *prev,
 
 static __always_inline bool has_fpu(void)
 {
-	return static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_FPU]);
+	return riscv_has_extension_likely(RISCV_ISA_EXT_f) ||
+		riscv_has_extension_likely(RISCV_ISA_EXT_d);
 }
 #else
 static __always_inline bool has_fpu(void) { return false; }
-- 
2.38.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Conor Dooley <conor.dooley@microchip.com>,
	Andrew Jones <ajones@ventanamicro.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Subject: [PATCH v4 07/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely()
Date: Sun, 15 Jan 2023 23:49:47 +0800	[thread overview]
Message-ID: <20230115154953.831-8-jszhang@kernel.org> (raw)
In-Reply-To: <20230115154953.831-1-jszhang@kernel.org>

Switch has_fpu() from static branch to the new helper
riscv_has_extension_likely().

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/include/asm/switch_to.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h
index 11463489fec6..60f8ca01d36e 100644
--- a/arch/riscv/include/asm/switch_to.h
+++ b/arch/riscv/include/asm/switch_to.h
@@ -59,7 +59,8 @@ static inline void __switch_to_aux(struct task_struct *prev,
 
 static __always_inline bool has_fpu(void)
 {
-	return static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_FPU]);
+	return riscv_has_extension_likely(RISCV_ISA_EXT_f) ||
+		riscv_has_extension_likely(RISCV_ISA_EXT_d);
 }
 #else
 static __always_inline bool has_fpu(void) { return false; }
-- 
2.38.1


  parent reply	other threads:[~2023-01-15 16:00 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-15 15:49 [PATCH v4 00/13] riscv: improve boot time isa extensions handling Jisheng Zhang
2023-01-15 15:49 ` Jisheng Zhang
2023-01-15 15:49 ` [PATCH v4 01/13] riscv: fix jal offsets in patched alternatives Jisheng Zhang
2023-01-15 15:49   ` Jisheng Zhang
2023-01-15 15:49 ` [PATCH v4 02/13] riscv: move riscv_noncoherent_supported() out of ZICBOM probe Jisheng Zhang
2023-01-15 15:49   ` Jisheng Zhang
2023-01-15 15:49 ` [PATCH v4 03/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier Jisheng Zhang
2023-01-15 15:49   ` Jisheng Zhang
2023-01-15 15:49 ` [PATCH v4 04/13] riscv: hwcap: make ISA extension ids can be used in asm Jisheng Zhang
2023-01-15 15:49   ` Jisheng Zhang
2023-01-15 15:49 ` [PATCH v4 05/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions Jisheng Zhang
2023-01-15 15:49   ` Jisheng Zhang
2023-01-18 22:28   ` Conor Dooley
2023-01-18 22:28     ` Conor Dooley
2023-01-15 15:49 ` [PATCH v4 06/13] riscv: introduce riscv_has_extension_[un]likely() Jisheng Zhang
2023-01-15 15:49   ` Jisheng Zhang
2023-01-15 16:29   ` Conor Dooley
2023-01-15 16:29     ` Conor Dooley
2023-01-18 22:18   ` Conor Dooley
2023-01-18 22:18     ` Conor Dooley
2023-01-15 15:49 ` Jisheng Zhang [this message]
2023-01-15 15:49   ` [PATCH v4 07/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely() Jisheng Zhang
2023-01-15 15:49 ` [PATCH v4 08/13] riscv: module: move find_section to module.h Jisheng Zhang
2023-01-15 15:49   ` Jisheng Zhang
2023-01-15 15:49 ` [PATCH v4 09/13] riscv: switch to relative alternative entries Jisheng Zhang
2023-01-15 15:49   ` Jisheng Zhang
2023-01-18 22:11   ` Conor Dooley
2023-01-18 22:11     ` Conor Dooley
2023-01-20 18:34   ` Andrew Jones
2023-01-20 18:34     ` Andrew Jones
2023-01-26  7:09     ` Andrew Jones
2023-01-26  7:09       ` Andrew Jones
2023-01-28 16:43       ` Jisheng Zhang
2023-01-28 16:43         ` Jisheng Zhang
2023-01-26 19:33     ` Conor Dooley
2023-01-26 19:33       ` Conor Dooley
2023-01-15 15:49 ` [PATCH v4 10/13] riscv: alternative: patch alternatives in the vDSO Jisheng Zhang
2023-01-15 15:49   ` Jisheng Zhang
2023-01-15 15:49 ` [PATCH v4 11/13] riscv: cpu_relax: switch to riscv_has_extension_likely() Jisheng Zhang
2023-01-15 15:49   ` Jisheng Zhang
2023-01-15 15:49 ` [PATCH v4 12/13] riscv: KVM: Switch has_svinval() to riscv_has_extension_unlikely() Jisheng Zhang
2023-01-15 15:49   ` Jisheng Zhang
2023-01-27  3:51   ` Anup Patel
2023-01-27  3:51     ` Anup Patel
2023-01-15 15:49 ` [PATCH v4 13/13] riscv: remove riscv_isa_ext_keys[] array and related usage Jisheng Zhang
2023-01-15 15:49   ` Jisheng Zhang
2023-01-25  3:50 ` [PATCH v4 00/13] riscv: improve boot time isa extensions handling patchwork-bot+linux-riscv
2023-01-25  3:50   ` patchwork-bot+linux-riscv

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230115154953.831-8-jszhang@kernel.org \
    --to=jszhang@kernel.org \
    --cc=ajones@ventanamicro.com \
    --cc=anup@brainfault.org \
    --cc=aou@eecs.berkeley.edu \
    --cc=atishp@atishpatra.org \
    --cc=conor.dooley@microchip.com \
    --cc=heiko@sntech.de \
    --cc=kvm-riscv@lists.infradead.org \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.