From: Moudy Ho <moudy.ho@mediatek.com>
To: Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: <linux-media@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Moudy Ho <moudy.ho@mediatek.com>
Subject: [RESEND v3 03/13] media: platform: mtk-mdp3: add support second sets of MMSYS
Date: Mon, 16 Jan 2023 11:21:37 +0800 [thread overview]
Message-ID: <20230116032147.23607-4-moudy.ho@mediatek.com> (raw)
In-Reply-To: <20230116032147.23607-1-moudy.ho@mediatek.com>
In MT8195, there are two sets of MMSYS named VPPSYS0 and VPPSYS1,
which are used to coordinate and control the clock, power and
register settings required by the components of MDP3.
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
---
.../mediatek/mdp3/mt8183/mdp3-plat-mt8183.h | 36 ++++++++---------
.../platform/mediatek/mdp3/mtk-mdp3-comp.h | 1 +
.../platform/mediatek/mdp3/mtk-mdp3-core.c | 40 +++++++++++++------
.../platform/mediatek/mdp3/mtk-mdp3-core.h | 3 ++
4 files changed, 49 insertions(+), 31 deletions(-)
diff --git a/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h b/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h
index b1d4cbeda932..6dd06131e256 100644
--- a/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h
+++ b/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h
@@ -89,75 +89,75 @@ enum mt8183_mdp_comp_id {
static const struct mdp_comp_data mt8183_mdp_comp_data[MDP_MAX_COMP_COUNT] = {
[MDP_COMP_WPEI] = {
- {MDP_COMP_TYPE_WPEI, 0, MT8183_MDP_COMP_WPEI},
+ {MDP_COMP_TYPE_WPEI, 0, MT8183_MDP_COMP_WPEI, 0},
{0, 0, 0}
},
[MDP_COMP_WPEO] = {
- {MDP_COMP_TYPE_EXTO, 2, MT8183_MDP_COMP_WPEO},
+ {MDP_COMP_TYPE_EXTO, 2, MT8183_MDP_COMP_WPEO, 0},
{0, 0, 0}
},
[MDP_COMP_WPEI2] = {
- {MDP_COMP_TYPE_WPEI, 1, MT8183_MDP_COMP_WPEI2},
+ {MDP_COMP_TYPE_WPEI, 1, MT8183_MDP_COMP_WPEI2, 0},
{0, 0, 0}
},
[MDP_COMP_WPEO2] = {
- {MDP_COMP_TYPE_EXTO, 3, MT8183_MDP_COMP_WPEO2},
+ {MDP_COMP_TYPE_EXTO, 3, MT8183_MDP_COMP_WPEO2, 0},
{0, 0, 0}
},
[MDP_COMP_ISP_IMGI] = {
- {MDP_COMP_TYPE_IMGI, 0, MT8183_MDP_COMP_ISP_IMGI},
+ {MDP_COMP_TYPE_IMGI, 0, MT8183_MDP_COMP_ISP_IMGI, 0},
{0, 0, 4}
},
[MDP_COMP_ISP_IMGO] = {
- {MDP_COMP_TYPE_EXTO, 0, MT8183_MDP_COMP_ISP_IMGO},
+ {MDP_COMP_TYPE_EXTO, 0, MT8183_MDP_COMP_ISP_IMGO, 0},
{0, 0, 4}
},
[MDP_COMP_ISP_IMG2O] = {
- {MDP_COMP_TYPE_EXTO, 1, MT8183_MDP_COMP_ISP_IMG2O},
+ {MDP_COMP_TYPE_EXTO, 1, MT8183_MDP_COMP_ISP_IMG2O, 0},
{0, 0, 0}
},
[MDP_COMP_CAMIN] = {
- {MDP_COMP_TYPE_DL_PATH, 0, MT8183_MDP_COMP_CAMIN},
+ {MDP_COMP_TYPE_DL_PATH, 0, MT8183_MDP_COMP_CAMIN, 0},
{2, 2, 1}
},
[MDP_COMP_CAMIN2] = {
- {MDP_COMP_TYPE_DL_PATH, 1, MT8183_MDP_COMP_CAMIN2},
+ {MDP_COMP_TYPE_DL_PATH, 1, MT8183_MDP_COMP_CAMIN2, 0},
{2, 4, 1}
},
[MDP_COMP_RDMA0] = {
- {MDP_COMP_TYPE_RDMA, 0, MT8183_MDP_COMP_RDMA0},
+ {MDP_COMP_TYPE_RDMA, 0, MT8183_MDP_COMP_RDMA0, 0},
{2, 0, 0}
},
[MDP_COMP_CCORR0] = {
- {MDP_COMP_TYPE_CCORR, 0, MT8183_MDP_COMP_CCORR0},
+ {MDP_COMP_TYPE_CCORR, 0, MT8183_MDP_COMP_CCORR0, 0},
{1, 0, 0}
},
[MDP_COMP_RSZ0] = {
- {MDP_COMP_TYPE_RSZ, 0, MT8183_MDP_COMP_RSZ0},
+ {MDP_COMP_TYPE_RSZ, 0, MT8183_MDP_COMP_RSZ0, 0},
{1, 0, 0}
},
[MDP_COMP_RSZ1] = {
- {MDP_COMP_TYPE_RSZ, 1, MT8183_MDP_COMP_RSZ1},
+ {MDP_COMP_TYPE_RSZ, 1, MT8183_MDP_COMP_RSZ1, 0},
{1, 0, 0}
},
[MDP_COMP_TDSHP0] = {
- {MDP_COMP_TYPE_TDSHP, 0, MT8183_MDP_COMP_TDSHP0},
+ {MDP_COMP_TYPE_TDSHP, 0, MT8183_MDP_COMP_TDSHP0, 0},
{0, 0, 0}
},
[MDP_COMP_PATH0_SOUT] = {
- {MDP_COMP_TYPE_PATH, 0, MT8183_MDP_COMP_PATH0_SOUT},
+ {MDP_COMP_TYPE_PATH, 0, MT8183_MDP_COMP_PATH0_SOUT, 0},
{0, 0, 0}
},
[MDP_COMP_PATH1_SOUT] = {
- {MDP_COMP_TYPE_PATH, 1, MT8183_MDP_COMP_PATH1_SOUT},
+ {MDP_COMP_TYPE_PATH, 1, MT8183_MDP_COMP_PATH1_SOUT, 0},
{0, 0, 0}
},
[MDP_COMP_WROT0] = {
- {MDP_COMP_TYPE_WROT, 0, MT8183_MDP_COMP_WROT0},
+ {MDP_COMP_TYPE_WROT, 0, MT8183_MDP_COMP_WROT0, 0},
{1, 0, 0}
},
[MDP_COMP_WDMA] = {
- {MDP_COMP_TYPE_WDMA, 0, MT8183_MDP_COMP_WDMA},
+ {MDP_COMP_TYPE_WDMA, 0, MT8183_MDP_COMP_WDMA, 0},
{1, 0, 0}
},
};
diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h
index 8d2ab9184f58..acb7ce69dbf3 100644
--- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h
+++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h
@@ -138,6 +138,7 @@ struct mdp_comp_match {
enum mdp_comp_type type;
u32 alias_id;
s32 inner_id;
+ u32 mmsys_id;
};
/* Used to describe the item order in MDP property */
diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c
index 8daa7245c90b..927d3d65751a 100644
--- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c
+++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c
@@ -41,39 +41,45 @@ static const struct of_device_id mdp_of_ids[] = {
MODULE_DEVICE_TABLE(of, mdp_of_ids);
static struct platform_device *__get_pdev_by_id(struct platform_device *pdev,
+ struct platform_device *from,
enum mdp_infra_id id)
{
- struct device_node *node;
+ struct device_node *node, *f = NULL;
struct platform_device *mdp_pdev = NULL;
const struct mtk_mdp_driver_data *mdp_data;
const char *compat;
if (!pdev)
- return NULL;
+ return ERR_PTR(-ENODEV);
if (id < MDP_INFRA_MMSYS || id >= MDP_INFRA_MAX) {
dev_err(&pdev->dev, "Illegal infra id %d\n", id);
- return NULL;
+ return ERR_PTR(-ENODEV);
}
mdp_data = of_device_get_match_data(&pdev->dev);
if (!mdp_data) {
dev_err(&pdev->dev, "have no driver data to find node\n");
- return NULL;
+ return ERR_PTR(-ENODEV);
}
+
compat = mdp_data->mdp_probe_infra[id].compatible;
+ if (strlen(compat) == 0)
+ return NULL;
- node = of_find_compatible_node(NULL, NULL, compat);
+ if (from)
+ f = from->dev.of_node;
+ node = of_find_compatible_node(f, NULL, compat);
if (WARN_ON(!node)) {
dev_err(&pdev->dev, "find node from id %d failed\n", id);
- return NULL;
+ return ERR_PTR(-ENODEV);
}
mdp_pdev = of_find_device_by_node(node);
of_node_put(node);
if (WARN_ON(!mdp_pdev)) {
dev_err(&pdev->dev, "find pdev from id %d failed\n", id);
- return NULL;
+ return ERR_PTR(-ENODEV);
}
return mdp_pdev;
@@ -167,7 +173,7 @@ static int mdp_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct mdp_dev *mdp;
- struct platform_device *mm_pdev;
+ struct platform_device *mm_pdev, *mm2_pdev;
int ret, i, mutex_id;
mdp = kzalloc(sizeof(*mdp), GFP_KERNEL);
@@ -179,15 +185,23 @@ static int mdp_probe(struct platform_device *pdev)
mdp->pdev = pdev;
mdp->mdp_data = of_device_get_match_data(&pdev->dev);
- mm_pdev = __get_pdev_by_id(pdev, MDP_INFRA_MMSYS);
- if (!mm_pdev) {
+ mm_pdev = __get_pdev_by_id(pdev, NULL, MDP_INFRA_MMSYS);
+ if (IS_ERR_OR_NULL(mm_pdev)) {
ret = -ENODEV;
goto err_destroy_device;
}
mdp->mdp_mmsys = &mm_pdev->dev;
- mm_pdev = __get_pdev_by_id(pdev, MDP_INFRA_MUTEX);
- if (WARN_ON(!mm_pdev)) {
+ /* Not all chips have MMSYS2, config may be null */
+ mm2_pdev = __get_pdev_by_id(pdev, mm_pdev, MDP_INFRA_MMSYS2);
+ if (IS_ERR(mm2_pdev)) {
+ ret = PTR_ERR(mm2_pdev);
+ goto err_destroy_device;
+ }
+ mdp->mdp_mmsys2 = &mm2_pdev->dev;
+
+ mm_pdev = __get_pdev_by_id(pdev, NULL, MDP_INFRA_MUTEX);
+ if (IS_ERR_OR_NULL(mm_pdev)) {
ret = -ENODEV;
goto err_destroy_device;
}
@@ -223,7 +237,7 @@ static int mdp_probe(struct platform_device *pdev)
goto err_destroy_job_wq;
}
- mm_pdev = __get_pdev_by_id(pdev, MDP_INFRA_SCP);
+ mm_pdev = __get_pdev_by_id(pdev, NULL, MDP_INFRA_SCP);
if (WARN_ON(!mm_pdev)) {
dev_err(&pdev->dev, "Could not get scp device\n");
ret = -ENODEV;
diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h
index b7288fe15134..0b40ccfd376c 100644
--- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h
+++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h
@@ -20,6 +20,7 @@
enum mdp_infra_id {
MDP_INFRA_MMSYS,
+ MDP_INFRA_MMSYS2,
MDP_INFRA_MUTEX,
MDP_INFRA_SCP,
MDP_INFRA_MAX
@@ -68,6 +69,7 @@ struct mtk_mdp_driver_data {
struct mdp_dev {
struct platform_device *pdev;
struct device *mdp_mmsys;
+ struct device *mdp_mmsys2;
struct mtk_mutex *mdp_mutex[MDP_PIPE_MAX];
struct mdp_comp *comp[MDP_MAX_COMP_COUNT];
const struct mtk_mdp_driver_data *mdp_data;
@@ -96,6 +98,7 @@ struct mdp_dev {
struct mdp_pipe_info {
enum mdp_pipe_id pipe_id;
+ u32 mmsys_id;
u32 mutex_id;
};
--
2.18.0
WARNING: multiple messages have this Message-ID (diff)
From: Moudy Ho <moudy.ho@mediatek.com>
To: Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: <linux-media@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Moudy Ho <moudy.ho@mediatek.com>
Subject: [RESEND v3 03/13] media: platform: mtk-mdp3: add support second sets of MMSYS
Date: Mon, 16 Jan 2023 11:21:37 +0800 [thread overview]
Message-ID: <20230116032147.23607-4-moudy.ho@mediatek.com> (raw)
In-Reply-To: <20230116032147.23607-1-moudy.ho@mediatek.com>
In MT8195, there are two sets of MMSYS named VPPSYS0 and VPPSYS1,
which are used to coordinate and control the clock, power and
register settings required by the components of MDP3.
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
---
.../mediatek/mdp3/mt8183/mdp3-plat-mt8183.h | 36 ++++++++---------
.../platform/mediatek/mdp3/mtk-mdp3-comp.h | 1 +
.../platform/mediatek/mdp3/mtk-mdp3-core.c | 40 +++++++++++++------
.../platform/mediatek/mdp3/mtk-mdp3-core.h | 3 ++
4 files changed, 49 insertions(+), 31 deletions(-)
diff --git a/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h b/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h
index b1d4cbeda932..6dd06131e256 100644
--- a/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h
+++ b/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h
@@ -89,75 +89,75 @@ enum mt8183_mdp_comp_id {
static const struct mdp_comp_data mt8183_mdp_comp_data[MDP_MAX_COMP_COUNT] = {
[MDP_COMP_WPEI] = {
- {MDP_COMP_TYPE_WPEI, 0, MT8183_MDP_COMP_WPEI},
+ {MDP_COMP_TYPE_WPEI, 0, MT8183_MDP_COMP_WPEI, 0},
{0, 0, 0}
},
[MDP_COMP_WPEO] = {
- {MDP_COMP_TYPE_EXTO, 2, MT8183_MDP_COMP_WPEO},
+ {MDP_COMP_TYPE_EXTO, 2, MT8183_MDP_COMP_WPEO, 0},
{0, 0, 0}
},
[MDP_COMP_WPEI2] = {
- {MDP_COMP_TYPE_WPEI, 1, MT8183_MDP_COMP_WPEI2},
+ {MDP_COMP_TYPE_WPEI, 1, MT8183_MDP_COMP_WPEI2, 0},
{0, 0, 0}
},
[MDP_COMP_WPEO2] = {
- {MDP_COMP_TYPE_EXTO, 3, MT8183_MDP_COMP_WPEO2},
+ {MDP_COMP_TYPE_EXTO, 3, MT8183_MDP_COMP_WPEO2, 0},
{0, 0, 0}
},
[MDP_COMP_ISP_IMGI] = {
- {MDP_COMP_TYPE_IMGI, 0, MT8183_MDP_COMP_ISP_IMGI},
+ {MDP_COMP_TYPE_IMGI, 0, MT8183_MDP_COMP_ISP_IMGI, 0},
{0, 0, 4}
},
[MDP_COMP_ISP_IMGO] = {
- {MDP_COMP_TYPE_EXTO, 0, MT8183_MDP_COMP_ISP_IMGO},
+ {MDP_COMP_TYPE_EXTO, 0, MT8183_MDP_COMP_ISP_IMGO, 0},
{0, 0, 4}
},
[MDP_COMP_ISP_IMG2O] = {
- {MDP_COMP_TYPE_EXTO, 1, MT8183_MDP_COMP_ISP_IMG2O},
+ {MDP_COMP_TYPE_EXTO, 1, MT8183_MDP_COMP_ISP_IMG2O, 0},
{0, 0, 0}
},
[MDP_COMP_CAMIN] = {
- {MDP_COMP_TYPE_DL_PATH, 0, MT8183_MDP_COMP_CAMIN},
+ {MDP_COMP_TYPE_DL_PATH, 0, MT8183_MDP_COMP_CAMIN, 0},
{2, 2, 1}
},
[MDP_COMP_CAMIN2] = {
- {MDP_COMP_TYPE_DL_PATH, 1, MT8183_MDP_COMP_CAMIN2},
+ {MDP_COMP_TYPE_DL_PATH, 1, MT8183_MDP_COMP_CAMIN2, 0},
{2, 4, 1}
},
[MDP_COMP_RDMA0] = {
- {MDP_COMP_TYPE_RDMA, 0, MT8183_MDP_COMP_RDMA0},
+ {MDP_COMP_TYPE_RDMA, 0, MT8183_MDP_COMP_RDMA0, 0},
{2, 0, 0}
},
[MDP_COMP_CCORR0] = {
- {MDP_COMP_TYPE_CCORR, 0, MT8183_MDP_COMP_CCORR0},
+ {MDP_COMP_TYPE_CCORR, 0, MT8183_MDP_COMP_CCORR0, 0},
{1, 0, 0}
},
[MDP_COMP_RSZ0] = {
- {MDP_COMP_TYPE_RSZ, 0, MT8183_MDP_COMP_RSZ0},
+ {MDP_COMP_TYPE_RSZ, 0, MT8183_MDP_COMP_RSZ0, 0},
{1, 0, 0}
},
[MDP_COMP_RSZ1] = {
- {MDP_COMP_TYPE_RSZ, 1, MT8183_MDP_COMP_RSZ1},
+ {MDP_COMP_TYPE_RSZ, 1, MT8183_MDP_COMP_RSZ1, 0},
{1, 0, 0}
},
[MDP_COMP_TDSHP0] = {
- {MDP_COMP_TYPE_TDSHP, 0, MT8183_MDP_COMP_TDSHP0},
+ {MDP_COMP_TYPE_TDSHP, 0, MT8183_MDP_COMP_TDSHP0, 0},
{0, 0, 0}
},
[MDP_COMP_PATH0_SOUT] = {
- {MDP_COMP_TYPE_PATH, 0, MT8183_MDP_COMP_PATH0_SOUT},
+ {MDP_COMP_TYPE_PATH, 0, MT8183_MDP_COMP_PATH0_SOUT, 0},
{0, 0, 0}
},
[MDP_COMP_PATH1_SOUT] = {
- {MDP_COMP_TYPE_PATH, 1, MT8183_MDP_COMP_PATH1_SOUT},
+ {MDP_COMP_TYPE_PATH, 1, MT8183_MDP_COMP_PATH1_SOUT, 0},
{0, 0, 0}
},
[MDP_COMP_WROT0] = {
- {MDP_COMP_TYPE_WROT, 0, MT8183_MDP_COMP_WROT0},
+ {MDP_COMP_TYPE_WROT, 0, MT8183_MDP_COMP_WROT0, 0},
{1, 0, 0}
},
[MDP_COMP_WDMA] = {
- {MDP_COMP_TYPE_WDMA, 0, MT8183_MDP_COMP_WDMA},
+ {MDP_COMP_TYPE_WDMA, 0, MT8183_MDP_COMP_WDMA, 0},
{1, 0, 0}
},
};
diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h
index 8d2ab9184f58..acb7ce69dbf3 100644
--- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h
+++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h
@@ -138,6 +138,7 @@ struct mdp_comp_match {
enum mdp_comp_type type;
u32 alias_id;
s32 inner_id;
+ u32 mmsys_id;
};
/* Used to describe the item order in MDP property */
diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c
index 8daa7245c90b..927d3d65751a 100644
--- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c
+++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c
@@ -41,39 +41,45 @@ static const struct of_device_id mdp_of_ids[] = {
MODULE_DEVICE_TABLE(of, mdp_of_ids);
static struct platform_device *__get_pdev_by_id(struct platform_device *pdev,
+ struct platform_device *from,
enum mdp_infra_id id)
{
- struct device_node *node;
+ struct device_node *node, *f = NULL;
struct platform_device *mdp_pdev = NULL;
const struct mtk_mdp_driver_data *mdp_data;
const char *compat;
if (!pdev)
- return NULL;
+ return ERR_PTR(-ENODEV);
if (id < MDP_INFRA_MMSYS || id >= MDP_INFRA_MAX) {
dev_err(&pdev->dev, "Illegal infra id %d\n", id);
- return NULL;
+ return ERR_PTR(-ENODEV);
}
mdp_data = of_device_get_match_data(&pdev->dev);
if (!mdp_data) {
dev_err(&pdev->dev, "have no driver data to find node\n");
- return NULL;
+ return ERR_PTR(-ENODEV);
}
+
compat = mdp_data->mdp_probe_infra[id].compatible;
+ if (strlen(compat) == 0)
+ return NULL;
- node = of_find_compatible_node(NULL, NULL, compat);
+ if (from)
+ f = from->dev.of_node;
+ node = of_find_compatible_node(f, NULL, compat);
if (WARN_ON(!node)) {
dev_err(&pdev->dev, "find node from id %d failed\n", id);
- return NULL;
+ return ERR_PTR(-ENODEV);
}
mdp_pdev = of_find_device_by_node(node);
of_node_put(node);
if (WARN_ON(!mdp_pdev)) {
dev_err(&pdev->dev, "find pdev from id %d failed\n", id);
- return NULL;
+ return ERR_PTR(-ENODEV);
}
return mdp_pdev;
@@ -167,7 +173,7 @@ static int mdp_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct mdp_dev *mdp;
- struct platform_device *mm_pdev;
+ struct platform_device *mm_pdev, *mm2_pdev;
int ret, i, mutex_id;
mdp = kzalloc(sizeof(*mdp), GFP_KERNEL);
@@ -179,15 +185,23 @@ static int mdp_probe(struct platform_device *pdev)
mdp->pdev = pdev;
mdp->mdp_data = of_device_get_match_data(&pdev->dev);
- mm_pdev = __get_pdev_by_id(pdev, MDP_INFRA_MMSYS);
- if (!mm_pdev) {
+ mm_pdev = __get_pdev_by_id(pdev, NULL, MDP_INFRA_MMSYS);
+ if (IS_ERR_OR_NULL(mm_pdev)) {
ret = -ENODEV;
goto err_destroy_device;
}
mdp->mdp_mmsys = &mm_pdev->dev;
- mm_pdev = __get_pdev_by_id(pdev, MDP_INFRA_MUTEX);
- if (WARN_ON(!mm_pdev)) {
+ /* Not all chips have MMSYS2, config may be null */
+ mm2_pdev = __get_pdev_by_id(pdev, mm_pdev, MDP_INFRA_MMSYS2);
+ if (IS_ERR(mm2_pdev)) {
+ ret = PTR_ERR(mm2_pdev);
+ goto err_destroy_device;
+ }
+ mdp->mdp_mmsys2 = &mm2_pdev->dev;
+
+ mm_pdev = __get_pdev_by_id(pdev, NULL, MDP_INFRA_MUTEX);
+ if (IS_ERR_OR_NULL(mm_pdev)) {
ret = -ENODEV;
goto err_destroy_device;
}
@@ -223,7 +237,7 @@ static int mdp_probe(struct platform_device *pdev)
goto err_destroy_job_wq;
}
- mm_pdev = __get_pdev_by_id(pdev, MDP_INFRA_SCP);
+ mm_pdev = __get_pdev_by_id(pdev, NULL, MDP_INFRA_SCP);
if (WARN_ON(!mm_pdev)) {
dev_err(&pdev->dev, "Could not get scp device\n");
ret = -ENODEV;
diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h
index b7288fe15134..0b40ccfd376c 100644
--- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h
+++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h
@@ -20,6 +20,7 @@
enum mdp_infra_id {
MDP_INFRA_MMSYS,
+ MDP_INFRA_MMSYS2,
MDP_INFRA_MUTEX,
MDP_INFRA_SCP,
MDP_INFRA_MAX
@@ -68,6 +69,7 @@ struct mtk_mdp_driver_data {
struct mdp_dev {
struct platform_device *pdev;
struct device *mdp_mmsys;
+ struct device *mdp_mmsys2;
struct mtk_mutex *mdp_mutex[MDP_PIPE_MAX];
struct mdp_comp *comp[MDP_MAX_COMP_COUNT];
const struct mtk_mdp_driver_data *mdp_data;
@@ -96,6 +98,7 @@ struct mdp_dev {
struct mdp_pipe_info {
enum mdp_pipe_id pipe_id;
+ u32 mmsys_id;
u32 mutex_id;
};
--
2.18.0
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next prev parent reply other threads:[~2023-01-16 3:22 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-16 3:21 [RESEND v3 00/13] add support MDP3 on MT8195 platform Moudy Ho
2023-01-16 3:21 ` Moudy Ho
2023-01-16 3:21 ` [RESEND v3 01/13] dt-binding: mediatek: add bindings for MediaTek mt8195 MDP3 components Moudy Ho
2023-01-16 3:21 ` Moudy Ho
2023-01-16 8:10 ` Krzysztof Kozlowski
2023-01-16 8:10 ` Krzysztof Kozlowski
2023-01-16 9:39 ` Moudy Ho (何宗原)
2023-01-16 9:39 ` Moudy Ho (何宗原)
2023-01-16 10:01 ` Krzysztof Kozlowski
2023-01-16 10:01 ` Krzysztof Kozlowski
2023-01-18 8:52 ` Moudy Ho (何宗原)
2023-01-18 8:52 ` Moudy Ho (何宗原)
2023-01-18 12:47 ` Krzysztof Kozlowski
2023-01-18 12:47 ` Krzysztof Kozlowski
2023-01-16 3:21 ` [RESEND v3 02/13] arm64: dts: mediatek: mt8195: add MDP3 nodes Moudy Ho
2023-01-16 3:21 ` Moudy Ho
2023-01-16 8:11 ` Krzysztof Kozlowski
2023-01-16 8:11 ` Krzysztof Kozlowski
2023-01-16 9:14 ` Moudy Ho (何宗原)
2023-01-16 9:14 ` Moudy Ho (何宗原)
2023-01-16 9:17 ` Krzysztof Kozlowski
2023-01-16 9:17 ` Krzysztof Kozlowski
2023-01-16 9:56 ` Moudy Ho (何宗原)
2023-01-16 9:56 ` Moudy Ho (何宗原)
2023-01-16 3:21 ` Moudy Ho [this message]
2023-01-16 3:21 ` [RESEND v3 03/13] media: platform: mtk-mdp3: add support second sets of MMSYS Moudy Ho
2023-01-16 3:21 ` [RESEND v3 04/13] media: platform: mtk-mdp3: add support second sets of MUTEX Moudy Ho
2023-01-16 3:21 ` Moudy Ho
2023-01-16 3:21 ` [RESEND v3 05/13] media: platform: mtk-mdp3: introduce more MDP3 components Moudy Ho
2023-01-16 3:21 ` Moudy Ho
2023-01-16 3:21 ` [RESEND v3 06/13] media: platform: mtk-mdp3: add checks for dummy components Moudy Ho
2023-01-16 3:21 ` Moudy Ho
2023-01-16 3:21 ` [RESEND v3 07/13] media: platform: mtk-mdp3: avoid multiple driver registrations Moudy Ho
2023-01-16 3:21 ` Moudy Ho
2023-01-16 3:21 ` [RESEND v3 08/13] media: platform: mtk-mdp3: extend GCE event waiting in RDMA and WROT Moudy Ho
2023-01-16 3:21 ` Moudy Ho
2023-01-16 3:21 ` [RESEND v3 09/13] media: platform: mtk-mdp3: add the blend of component in MUTEX MOD Moudy Ho
2023-01-16 3:21 ` Moudy Ho
2023-01-16 3:21 ` [RESEND v3 10/13] media: platform: mtk-mdp3: add mt8195 platform configuration Moudy Ho
2023-01-16 3:21 ` Moudy Ho
2023-01-16 3:21 ` [RESEND v3 11/13] media: platform: mtk-mdp3: add mt8195 shared memory configurations Moudy Ho
2023-01-16 3:21 ` Moudy Ho
2023-01-16 3:21 ` [RESEND v3 12/13] media: platform: mtk-mdp3: add mt8195 MDP3 component settings Moudy Ho
2023-01-16 3:21 ` Moudy Ho
2023-01-16 3:21 ` [RESEND v3 13/13] media: platform: mtk-mdp3: add support for parallel pipe to improve FPS Moudy Ho
2023-01-16 3:21 ` Moudy Ho
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