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From: qianfanguijin@163.com
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Strahinja Jankovic" <strahinja.p.jankovic@gmail.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Beniamino Galvani" <b.galvani@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Niek Linnenbank" <nieklinnenbank@gmail.com>,
	"qianfan Zhao" <qianfanguijin@163.com>
Subject: [PATCH v2 04/12] hw: arm: allwinner-r40: Add i2c0 device
Date: Tue, 28 Mar 2023 13:46:44 +0800	[thread overview]
Message-ID: <20230328054654.18620-5-qianfanguijin@163.com> (raw)
In-Reply-To: <20230328054654.18620-1-qianfanguijin@163.com>

From: qianfan Zhao <qianfanguijin@163.com>

TWI(i2c) is designed to be used as an interface between CPU host and the
serial 2-Wire bus. It can support all standard 2-Wire transfer, can be
operated in standard mode(100kbit/s) or fast-mode, supporting data rate
up to 400kbit/s.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
---
 hw/arm/allwinner-r40.c         | 11 ++++++++++-
 include/hw/arm/allwinner-r40.h |  3 +++
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c
index 537a90b23d..4bc582630c 100644
--- a/hw/arm/allwinner-r40.c
+++ b/hw/arm/allwinner-r40.c
@@ -52,6 +52,7 @@ const hwaddr allwinner_r40_memmap[] = {
     [AW_R40_DEV_UART5]      = 0x01c29400,
     [AW_R40_DEV_UART6]      = 0x01c29800,
     [AW_R40_DEV_UART7]      = 0x01c29c00,
+    [AW_R40_DEV_TWI0]       = 0x01c2ac00,
     [AW_R40_DEV_GIC_DIST]   = 0x01c81000,
     [AW_R40_DEV_GIC_CPU]    = 0x01c82000,
     [AW_R40_DEV_GIC_HYP]    = 0x01c84000,
@@ -115,7 +116,6 @@ static struct AwR40Unimplemented r40_unimplemented[] = {
     { "uart7",      0x01c29c00, 1 * KiB },
     { "ps20",       0x01c2a000, 1 * KiB },
     { "ps21",       0x01c2a400, 1 * KiB },
-    { "twi0",       0x01c2ac00, 1 * KiB },
     { "twi1",       0x01c2b000, 1 * KiB },
     { "twi2",       0x01c2b400, 1 * KiB },
     { "twi3",       0x01c2b800, 1 * KiB },
@@ -167,6 +167,7 @@ enum {
     AW_R40_GIC_SPI_UART1     =  2,
     AW_R40_GIC_SPI_UART2     =  3,
     AW_R40_GIC_SPI_UART3     =  4,
+    AW_R40_GIC_SPI_TWI0      =  7,
     AW_R40_GIC_SPI_UART4     = 17,
     AW_R40_GIC_SPI_UART5     = 18,
     AW_R40_GIC_SPI_UART6     = 19,
@@ -270,6 +271,8 @@ static void allwinner_r40_init(Object *obj)
         object_initialize_child(obj, mmc_names[i], &s->mmc[i],
                                 TYPE_AW_SDHOST_SUN5I);
     }
+
+    object_initialize_child(obj, "twi0", &s->i2c0, TYPE_AW_I2C_SUN6I);
 }
 
 static void allwinner_r40_realize(DeviceState *dev, Error **errp)
@@ -416,6 +419,12 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp)
                        115200, serial_hd(i), DEVICE_NATIVE_ENDIAN);
     }
 
+    /* I2C */
+    sysbus_realize(SYS_BUS_DEVICE(&s->i2c0), &error_fatal);
+    sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c0), 0, s->memmap[AW_R40_DEV_TWI0]);
+    sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c0), 0,
+                       qdev_get_gpio_in(DEVICE(&s->gic), AW_R40_GIC_SPI_TWI0));
+
     /* Unimplemented devices */
     for (i = 0; i < ARRAY_SIZE(r40_unimplemented); i++) {
         create_unimplemented_device(r40_unimplemented[i].device_name,
diff --git a/include/hw/arm/allwinner-r40.h b/include/hw/arm/allwinner-r40.h
index 959b5dc4e0..95366f4eee 100644
--- a/include/hw/arm/allwinner-r40.h
+++ b/include/hw/arm/allwinner-r40.h
@@ -26,6 +26,7 @@
 #include "hw/intc/arm_gic.h"
 #include "hw/sd/allwinner-sdhost.h"
 #include "hw/misc/allwinner-r40-ccu.h"
+#include "hw/i2c/allwinner-i2c.h"
 #include "target/arm/cpu.h"
 #include "sysemu/block-backend.h"
 
@@ -48,6 +49,7 @@ enum {
     AW_R40_DEV_UART5,
     AW_R40_DEV_UART6,
     AW_R40_DEV_UART7,
+    AW_R40_DEV_TWI0,
     AW_R40_DEV_GIC_DIST,
     AW_R40_DEV_GIC_CPU,
     AW_R40_DEV_GIC_HYP,
@@ -89,6 +91,7 @@ struct AwR40State {
     AwA10PITState timer;
     AwSdHostState mmc[AW_R40_NUM_MMCS];
     AwR40ClockCtlState ccu;
+    AWI2CState i2c0;
     GICState gic;
     MemoryRegion sram_a1;
     MemoryRegion sram_a2;
-- 
2.25.1



  parent reply	other threads:[~2023-03-28  5:48 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-28  5:46 [PATCH v2 00/12] *** add allwinner-r40 support *** qianfanguijin
2023-03-28  5:46 ` [PATCH v2 01/12] hw: arm: Add bananapi M2-Ultra and allwinner-r40 support qianfanguijin
2023-04-06 19:12   ` Niek Linnenbank
2023-03-28  5:46 ` [PATCH v2 02/12] hw/arm/allwinner-r40: add Clock Control Unit qianfanguijin
2023-04-06 19:17   ` Niek Linnenbank
2023-03-28  5:46 ` [PATCH v2 03/12] hw: allwinner-r40: Complete uart devices qianfanguijin
2023-04-11 18:06   ` Strahinja Jankovic
2023-03-28  5:46 ` qianfanguijin [this message]
2023-04-11 18:02   ` [PATCH v2 04/12] hw: arm: allwinner-r40: Add i2c0 device Strahinja Jankovic
2023-03-28  5:46 ` [PATCH v2 05/12] hw/misc: Rename axp209 to axp22x and add support AXP221 PMU qianfanguijin
2023-03-28  5:46 ` [PATCH v2 06/12] hw/arm/allwinner-r40: add SDRAM controller device qianfanguijin
2023-03-28  5:46 ` [PATCH v2 07/12] hw: sd: allwinner-sdhost: Add sun50i-a64 SoC support qianfanguijin
2023-04-06 20:18   ` Niek Linnenbank
2023-04-18 10:58     ` qianfan
2023-03-28  5:46 ` [PATCH v2 08/12] hw: arm: allwinner-r40: Fix the mmc controller's type qianfanguijin
2023-04-06 19:22   ` Niek Linnenbank
2023-04-18 10:56     ` qianfan
2023-03-28  5:46 ` [PATCH v2 09/12] hw: arm: allwinner-r40: Add emac and gmac support qianfanguijin
2023-03-28  5:46 ` [PATCH v2 10/12] hw: arm: allwinner-sramc: Add SRAM Controller support for R40 qianfanguijin

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