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From: Andy Chiu <andy.chiu@sifive.com>
To: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
	anup@brainfault.org, atishp@atishpatra.org,
	kvm-riscv@lists.infradead.org, kvm@vger.kernel.org
Cc: vineetg@rivosinc.com, greentime.hu@sifive.com,
	guoren@linux.alibaba.com, Andy Chiu <andy.chiu@sifive.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Heiko Stuebner <heiko.stuebner@vrull.eu>,
	Conor Dooley <conor.dooley@microchip.com>,
	Vincent Chen <vincent.chen@sifive.com>,
	Al Viro <viro@zeniv.linux.org.uk>,
	Andrew Bresticker <abrestic@rivosinc.com>,
	Guo Ren <guoren@kernel.org>
Subject: [PATCH -next v20 16/26] riscv: signal: validate altstack to reflect Vector
Date: Thu, 18 May 2023 16:19:39 +0000	[thread overview]
Message-ID: <20230518161949.11203-17-andy.chiu@sifive.com> (raw)
In-Reply-To: <20230518161949.11203-1-andy.chiu@sifive.com>

Some extensions, such as Vector, dynamically change footprint on a
signal frame, so MINSIGSTKSZ is no longer accurate. For example, an
RV64V implementation with vlen = 512 may occupy 2K + 40 + 12 Bytes of a
signal frame with the upcoming support. And processes that do not
execute any vector instructions do not need to reserve the extra
sigframe. So we need a way to guard the allocation size of the sigframe
at process runtime according to current status of V.

Thus, provide the function sigaltstack_size_valid() to validate its size
based on current allocation status of supported extensions.

Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
---
 arch/riscv/kernel/signal.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/riscv/kernel/signal.c b/arch/riscv/kernel/signal.c
index f117641c1c49..180d951d3624 100644
--- a/arch/riscv/kernel/signal.c
+++ b/arch/riscv/kernel/signal.c
@@ -476,3 +476,10 @@ void __init init_rt_signal_env(void)
 	 */
 	signal_minsigstksz = get_rt_frame_size(true);
 }
+
+#ifdef CONFIG_DYNAMIC_SIGFRAME
+bool sigaltstack_size_valid(size_t ss_size)
+{
+	return ss_size > get_rt_frame_size(false);
+}
+#endif /* CONFIG_DYNAMIC_SIGFRAME */
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Andy Chiu <andy.chiu@sifive.com>
To: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
	anup@brainfault.org, atishp@atishpatra.org,
	kvm-riscv@lists.infradead.org, kvm@vger.kernel.org
Cc: vineetg@rivosinc.com, greentime.hu@sifive.com,
	guoren@linux.alibaba.com, Andy Chiu <andy.chiu@sifive.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Heiko Stuebner <heiko.stuebner@vrull.eu>,
	Conor Dooley <conor.dooley@microchip.com>,
	Vincent Chen <vincent.chen@sifive.com>,
	Al Viro <viro@zeniv.linux.org.uk>,
	Andrew Bresticker <abrestic@rivosinc.com>,
	Guo Ren <guoren@kernel.org>
Subject: [PATCH -next v20 16/26] riscv: signal: validate altstack to reflect Vector
Date: Thu, 18 May 2023 16:19:39 +0000	[thread overview]
Message-ID: <20230518161949.11203-17-andy.chiu@sifive.com> (raw)
In-Reply-To: <20230518161949.11203-1-andy.chiu@sifive.com>

Some extensions, such as Vector, dynamically change footprint on a
signal frame, so MINSIGSTKSZ is no longer accurate. For example, an
RV64V implementation with vlen = 512 may occupy 2K + 40 + 12 Bytes of a
signal frame with the upcoming support. And processes that do not
execute any vector instructions do not need to reserve the extra
sigframe. So we need a way to guard the allocation size of the sigframe
at process runtime according to current status of V.

Thus, provide the function sigaltstack_size_valid() to validate its size
based on current allocation status of supported extensions.

Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
---
 arch/riscv/kernel/signal.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/riscv/kernel/signal.c b/arch/riscv/kernel/signal.c
index f117641c1c49..180d951d3624 100644
--- a/arch/riscv/kernel/signal.c
+++ b/arch/riscv/kernel/signal.c
@@ -476,3 +476,10 @@ void __init init_rt_signal_env(void)
 	 */
 	signal_minsigstksz = get_rt_frame_size(true);
 }
+
+#ifdef CONFIG_DYNAMIC_SIGFRAME
+bool sigaltstack_size_valid(size_t ss_size)
+{
+	return ss_size > get_rt_frame_size(false);
+}
+#endif /* CONFIG_DYNAMIC_SIGFRAME */
-- 
2.17.1


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http://lists.infradead.org/mailman/listinfo/linux-riscv

  parent reply	other threads:[~2023-05-18 16:22 UTC|newest]

Thread overview: 116+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-18 16:19 [PATCH -next v20 00/26] riscv: Add vector ISA support Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 01/26] riscv: Rename __switch_to_aux() -> fpu Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 02/26] riscv: Extending cpufeature.c to detect V-extension Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 03/26] riscv: hwprobe: Add support for probing V in RISCV_HWPROBE_KEY_IMA_EXT_0 Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 17:28   ` Conor Dooley
2023-05-18 17:28     ` Conor Dooley
2023-05-19 16:50   ` Evan Green
2023-05-19 16:50     ` Evan Green
2023-05-24  0:48   ` Palmer Dabbelt
2023-05-24  0:48     ` Palmer Dabbelt
2023-06-01  4:46   ` Guo Ren
2023-06-01  4:46     ` Guo Ren
2023-05-18 16:19 ` [PATCH -next v20 04/26] riscv: Add new csr defines related to vector extension Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 05/26] riscv: Clear vector regfile on bootup Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 06/26] riscv: Disable Vector Instructions for kernel itself Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 07/26] riscv: Introduce Vector enable/disable helpers Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 08/26] riscv: Introduce riscv_v_vsize to record size of Vector context Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 09/26] riscv: Introduce struct/helpers to save/restore per-task Vector state Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-24  0:49   ` Palmer Dabbelt
2023-05-24  0:49     ` Palmer Dabbelt
2023-05-18 16:19 ` [PATCH -next v20 10/26] riscv: Add task switch support for vector Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-24  0:49   ` Palmer Dabbelt
2023-05-24  0:49     ` Palmer Dabbelt
2023-05-30 10:11     ` Andy Chiu
2023-05-30 10:11       ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 11/26] riscv: Allocate user's vector context in the first-use trap Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 17:47   ` Conor Dooley
2023-05-18 17:47     ` Conor Dooley
2023-05-22  9:40     ` Andy Chiu
2023-05-22  9:40       ` Andy Chiu
2023-05-24  0:49   ` Palmer Dabbelt
2023-05-24  0:49     ` Palmer Dabbelt
2023-05-24 14:21     ` Darius Rad
2023-05-24 14:21       ` Darius Rad
2023-05-30 16:51   ` Guo Ren
2023-05-30 16:51     ` Guo Ren
2023-05-18 16:19 ` [PATCH -next v20 12/26] riscv: Add ptrace vector support Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-24  0:49   ` Palmer Dabbelt
2023-05-24  0:49     ` Palmer Dabbelt
2023-05-24  6:32     ` Arnd Bergmann
2023-05-24  6:32       ` Arnd Bergmann
2023-05-24  7:50       ` Andreas Schwab
2023-05-24  7:50         ` Andreas Schwab
2023-05-18 16:19 ` [PATCH -next v20 13/26] riscv: signal: check fp-reserved words unconditionally Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 14/26] riscv: signal: Add sigcontext save/restore for vector Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 15/26] riscv: signal: Report signal frame size to userspace via auxv Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu [this message]
2023-05-18 16:19   ` [PATCH -next v20 16/26] riscv: signal: validate altstack to reflect Vector Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 17/26] riscv: prevent stack corruption by reserving task_pt_regs(p) early Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 18/26] riscv: kvm: Add V extension to KVM ISA Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 19/26] riscv: KVM: Add vector lazy save/restore support Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 20/26] riscv: Add prctl controls for userspace vector management Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-20 14:11   ` kernel test robot
2023-05-20 14:11     ` kernel test robot
2023-05-21  1:50   ` kernel test robot
2023-05-21  1:50     ` kernel test robot
2023-05-22  4:12     ` Andy Chiu
2023-05-21  5:38   ` Rémi Denis-Courmont
2023-05-21  5:38     ` Rémi Denis-Courmont
2023-05-22  8:28     ` Andy Chiu
2023-05-22  8:28       ` Andy Chiu
2023-05-22  9:58       ` Rémi Denis-Courmont
2023-05-24  0:18         ` Palmer Dabbelt
2023-05-24  0:18           ` Palmer Dabbelt
2023-05-24  9:25           ` Andy Chiu
2023-05-24  9:25             ` Andy Chiu
2023-05-24 16:16             ` Rémi Denis-Courmont
2023-05-24 16:16               ` Rémi Denis-Courmont
2023-05-30 14:14               ` Andy Chiu
2023-05-30 14:14                 ` Andy Chiu
2023-05-24 16:13           ` Rémi Denis-Courmont
2023-05-24 16:13             ` Rémi Denis-Courmont
2023-05-23 13:56   ` Björn Töpel
2023-05-23 13:56     ` Björn Töpel
2023-05-18 16:19 ` [PATCH -next v20 21/26] riscv: Add sysctl to set the default vector rule for new processes Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-23 13:45   ` Björn Töpel
2023-05-23 13:45     ` Björn Töpel
2023-05-18 16:19 ` [PATCH -next v20 22/26] riscv: detect assembler support for .option arch Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 23/26] riscv: Enable Vector code to be built Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 17:31   ` Conor Dooley
2023-05-18 17:31     ` Conor Dooley
2023-05-24  0:22     ` Palmer Dabbelt
2023-05-24  0:22       ` Palmer Dabbelt
2023-05-18 16:19 ` [PATCH -next v20 24/26] riscv: Add documentation for Vector Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-19  8:09   ` Bagas Sanjaya
2023-05-19  8:09     ` Bagas Sanjaya
2023-05-21  5:20   ` Rémi Denis-Courmont
2023-05-21  5:20     ` Rémi Denis-Courmont
2023-05-18 16:19 ` [PATCH -next v20 25/26] selftests: Test RISC-V Vector prctl interface Andy Chiu
2023-05-18 16:19   ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 26/26] selftests: add .gitignore file for RISC-V hwprobe Andy Chiu
2023-05-18 16:19   ` Andy Chiu

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