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From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: linux-usb@vger.kernel.org
Cc: Yehezkel Bernat <YehezkelShB@gmail.com>,
	Michael Jamet <michael.jamet@intel.com>,
	Lukas Wunner <lukas@wunner.de>,
	Andreas Noever <andreas.noever@gmail.com>,
	Gil Fine <gil.fine@linux.intel.com>,
	Christian Kellner <ckellner@redhat.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>
Subject: [PATCH 13/20] thunderbolt: Limit Intel Barlow Ridge USB3 bandwidth
Date: Wed, 31 May 2023 12:06:38 +0300	[thread overview]
Message-ID: <20230531090645.5573-14-mika.westerberg@linux.intel.com> (raw)
In-Reply-To: <20230531090645.5573-1-mika.westerberg@linux.intel.com>

Intel Barlow Ridge discrete USB4 host router has the same limitation as
the previous generations so make sure the USB3 bandwidth limitation
quirk is applied to Barlow Ridge too.

Signed-off-by: Gil Fine <gil.fine@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
 drivers/thunderbolt/nhi.h    | 2 ++
 drivers/thunderbolt/quirks.c | 8 ++++++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/thunderbolt/nhi.h b/drivers/thunderbolt/nhi.h
index c15a0c46c9cf..0f029ce75882 100644
--- a/drivers/thunderbolt/nhi.h
+++ b/drivers/thunderbolt/nhi.h
@@ -77,6 +77,8 @@ extern const struct tb_nhi_ops icl_nhi_ops;
 #define PCI_DEVICE_ID_INTEL_ADL_NHI1			0x466d
 #define PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_80G_NHI	0x5781
 #define PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_40G_NHI	0x5784
+#define PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_80G_BRIDGE 0x5786
+#define PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_40G_BRIDGE 0x57a4
 #define PCI_DEVICE_ID_INTEL_MTL_M_NHI0			0x7eb2
 #define PCI_DEVICE_ID_INTEL_MTL_P_NHI0			0x7ec2
 #define PCI_DEVICE_ID_INTEL_MTL_P_NHI1			0x7ec3
diff --git a/drivers/thunderbolt/quirks.c b/drivers/thunderbolt/quirks.c
index 854d84148850..488138a28ae1 100644
--- a/drivers/thunderbolt/quirks.c
+++ b/drivers/thunderbolt/quirks.c
@@ -75,6 +75,14 @@ static const struct tb_quirk tb_quirks[] = {
 		  quirk_usb3_maximum_bandwidth },
 	{ 0x8087, PCI_DEVICE_ID_INTEL_MTL_P_NHI1, 0x0000, 0x0000,
 		  quirk_usb3_maximum_bandwidth },
+	{ 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_80G_NHI, 0x0000, 0x0000,
+		  quirk_usb3_maximum_bandwidth },
+	{ 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_40G_NHI, 0x0000, 0x0000,
+		  quirk_usb3_maximum_bandwidth },
+	{ 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_80G_BRIDGE, 0x0000, 0x0000,
+		  quirk_usb3_maximum_bandwidth },
+	{ 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_40G_BRIDGE, 0x0000, 0x0000,
+		  quirk_usb3_maximum_bandwidth },
 	/*
 	 * CLx is not supported on AMD USB4 Yellow Carp and Pink Sardine platforms.
 	 */
-- 
2.39.2


  parent reply	other threads:[~2023-05-31  9:07 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-31  9:06 [PATCH 00/20] thunderbolt: Initial USB4 v2 support Mika Westerberg
2023-05-31  9:06 ` [PATCH 01/20] thunderbolt: Ignore data CRC mismatch for USB4 routers Mika Westerberg
2023-05-31  9:06 ` [PATCH 02/20] thunderbolt: Do not touch lane 1 adapter path config space Mika Westerberg
2023-05-31  9:06 ` [PATCH 03/20] thunderbolt: Identify USB4 v2 routers Mika Westerberg
2023-05-31 12:00   ` Yehezkel Bernat
2023-06-02  8:18     ` Mika Westerberg
2023-05-31  9:06 ` [PATCH 04/20] thunderbolt: Add support for USB4 v2 80 Gb/s link Mika Westerberg
2023-05-31  9:06 ` [PATCH 05/20] thunderbolt: Add the new USB4 v2 notification types Mika Westerberg
2023-05-31  9:06 ` [PATCH 06/20] thunderbolt: Reset USB4 v2 host router Mika Westerberg
2023-05-31  9:06 ` [PATCH 07/20] thunderbolt: Announce USB4 v2 connection manager support Mika Westerberg
2023-05-31  9:06 ` [PATCH 08/20] thunderbolt: Enable USB4 v2 PCIe TLP/DLLP extended encapsulation Mika Westerberg
2023-05-31  9:06 ` [PATCH 09/20] thunderbolt: Add two additional double words for adapters TMU for USB4 v2 routers Mika Westerberg
2023-05-31  9:06 ` [PATCH 10/20] thunderbolt: Fix DisplayPort IN adapter capability length " Mika Westerberg
2023-05-31  9:06 ` [PATCH 11/20] thunderbolt: Fix PCIe " Mika Westerberg
2023-05-31  9:06 ` [PATCH 12/20] thunderbolt: Add Intel Barlow Ridge PCI ID Mika Westerberg
2023-05-31  9:06 ` Mika Westerberg [this message]
2023-05-31  9:06 ` [PATCH 14/20] thunderbolt: Move constants related to NVM into nvm.c Mika Westerberg
2023-05-31  9:06 ` [PATCH 15/20] thunderbolt: Increase NVM_MAX_SIZE to support Intel Barlow Ridge controller Mika Westerberg
2023-05-31  9:06 ` [PATCH 16/20] thunderbolt: Add support for enhanced uni-directional TMU mode Mika Westerberg
2023-05-31  9:06 ` [PATCH 17/20] thunderbolt: Enable CL2 low power state Mika Westerberg
2023-05-31  9:06 ` [PATCH 18/20] thunderbolt: Make bandwidth allocation mode function names consistent Mika Westerberg
2023-05-31  9:06 ` [PATCH 19/20] thunderbolt: Add DisplayPort 2.x tunneling support Mika Westerberg
2023-05-31  9:06 ` [PATCH 20/20] thunderbolt: Add test case for 3 DisplayPort tunnels Mika Westerberg

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