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From: Mateusz Majewski <m.majewski2@samsung.com>
To: linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Mateusz Majewski <m.majewski2@samsung.com>,
	Tomasz Figa <tomasz.figa@gmail.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Sylwester Nawrocki <s.nawrocki@samsung.com>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Marek Szyprowski <m.szyprowski@samsung.com>
Subject: [PATCH 4/4] pinctrl: samsung: do not offset pinctrl numberspaces
Date: Fri,  6 Oct 2023 14:55:57 +0200	[thread overview]
Message-ID: <20231006125557.212681-5-m.majewski2@samsung.com> (raw)
In-Reply-To: <20231006125557.212681-1-m.majewski2@samsung.com>

Past versions of this driver have manually calculated base values for
both the pinctrl numberspace and the global GPIO numberspace, giving
both the same values. This was necessary for the global GPIO
numberspace, since its values need to be unique system-wide. However, it
was not necessary for the pinctrl numberspace, since its values only
need to be unique for a single instance of the pinctrl device. It was
just convenient to use the same values for both spaces.

Right now those calculations are only used for the pinctrl numberspace,
since GPIO numberspace bases are selected by the GPIO subsystem.
Therefore, those calculations are unnecessary.

Signed-off-by: Mateusz Majewski <m.majewski2@samsung.com>
---
 drivers/pinctrl/samsung/pinctrl-samsung.c | 15 ++++-----------
 drivers/pinctrl/samsung/pinctrl-samsung.h |  2 --
 2 files changed, 4 insertions(+), 13 deletions(-)

diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c
index 952aeeebb679..79babbb39ced 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.c
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.c
@@ -45,8 +45,6 @@ static struct pin_config {
 	{ "samsung,pin-val", PINCFG_TYPE_DAT },
 };
 
-static unsigned int pin_base;
-
 static int samsung_get_group_count(struct pinctrl_dev *pctldev)
 {
 	struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
@@ -389,8 +387,7 @@ static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
 	func = &drvdata->pmx_functions[selector];
 	grp = &drvdata->pin_groups[group];
 
-	pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base,
-			&reg, &pin_offset, &bank);
+	pin_to_reg_bank(drvdata, grp->pins[0], &reg, &pin_offset, &bank);
 	type = bank->type;
 	mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
 	shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
@@ -441,8 +438,7 @@ static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin,
 	unsigned long flags;
 
 	drvdata = pinctrl_dev_get_drvdata(pctldev);
-	pin_to_reg_bank(drvdata, pin - drvdata->pin_base, &reg_base,
-					&pin_offset, &bank);
+	pin_to_reg_bank(drvdata, pin, &reg_base, &pin_offset, &bank);
 	type = bank->type;
 
 	if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type])
@@ -671,7 +667,7 @@ static int samsung_add_pin_ranges(struct gpio_chip *gc)
 
 	bank->grange.name = bank->name;
 	bank->grange.id = bank->id;
-	bank->grange.pin_base = bank->drvdata->pin_base + bank->pin_base;
+	bank->grange.pin_base = bank->pin_base;
 	bank->grange.base = gc->base;
 	bank->grange.npins = bank->nr_pins;
 	bank->grange.gc = &bank->gpio_chip;
@@ -891,7 +887,7 @@ static int samsung_pinctrl_register(struct platform_device *pdev,
 
 	/* dynamically populate the pin number and pin name for pindesc */
 	for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++)
-		pdesc->number = pin + drvdata->pin_base;
+		pdesc->number = pin;
 
 	/*
 	 * allocate space for storing the dynamically generated names for all
@@ -1129,9 +1125,6 @@ samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d,
 
 	samsung_banks_node_get(&pdev->dev, d);
 
-	d->pin_base = pin_base;
-	pin_base += d->nr_pins;
-
 	return ctrl;
 }
 
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h
index 173db20f70d3..9b3db50adef3 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.h
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.h
@@ -269,7 +269,6 @@ struct samsung_pin_ctrl {
  * @nr_groups: number of such pin groups.
  * @pmx_functions: list of pin functions available to the driver.
  * @nr_function: number of such pin functions.
- * @pin_base: starting system wide pin number.
  * @nr_pins: number of pins supported by the controller.
  * @retention_ctrl: retention control runtime data.
  * @suspend: platform specific suspend callback, executed during pin controller
@@ -293,7 +292,6 @@ struct samsung_pinctrl_drv_data {
 
 	struct samsung_pin_bank		*pin_banks;
 	unsigned int			nr_banks;
-	unsigned int			pin_base;
 	unsigned int			nr_pins;
 
 	struct samsung_retention_ctrl	*retention_ctrl;
-- 
2.42.0


WARNING: multiple messages have this Message-ID (diff)
From: Mateusz Majewski <m.majewski2@samsung.com>
To: linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Mateusz Majewski <m.majewski2@samsung.com>,
	Tomasz Figa <tomasz.figa@gmail.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Sylwester Nawrocki <s.nawrocki@samsung.com>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Marek Szyprowski <m.szyprowski@samsung.com>
Subject: [PATCH 4/4] pinctrl: samsung: do not offset pinctrl numberspaces
Date: Fri,  6 Oct 2023 14:55:57 +0200	[thread overview]
Message-ID: <20231006125557.212681-5-m.majewski2@samsung.com> (raw)
In-Reply-To: <20231006125557.212681-1-m.majewski2@samsung.com>

Past versions of this driver have manually calculated base values for
both the pinctrl numberspace and the global GPIO numberspace, giving
both the same values. This was necessary for the global GPIO
numberspace, since its values need to be unique system-wide. However, it
was not necessary for the pinctrl numberspace, since its values only
need to be unique for a single instance of the pinctrl device. It was
just convenient to use the same values for both spaces.

Right now those calculations are only used for the pinctrl numberspace,
since GPIO numberspace bases are selected by the GPIO subsystem.
Therefore, those calculations are unnecessary.

Signed-off-by: Mateusz Majewski <m.majewski2@samsung.com>
---
 drivers/pinctrl/samsung/pinctrl-samsung.c | 15 ++++-----------
 drivers/pinctrl/samsung/pinctrl-samsung.h |  2 --
 2 files changed, 4 insertions(+), 13 deletions(-)

diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c
index 952aeeebb679..79babbb39ced 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.c
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.c
@@ -45,8 +45,6 @@ static struct pin_config {
 	{ "samsung,pin-val", PINCFG_TYPE_DAT },
 };
 
-static unsigned int pin_base;
-
 static int samsung_get_group_count(struct pinctrl_dev *pctldev)
 {
 	struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
@@ -389,8 +387,7 @@ static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
 	func = &drvdata->pmx_functions[selector];
 	grp = &drvdata->pin_groups[group];
 
-	pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base,
-			&reg, &pin_offset, &bank);
+	pin_to_reg_bank(drvdata, grp->pins[0], &reg, &pin_offset, &bank);
 	type = bank->type;
 	mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
 	shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
@@ -441,8 +438,7 @@ static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin,
 	unsigned long flags;
 
 	drvdata = pinctrl_dev_get_drvdata(pctldev);
-	pin_to_reg_bank(drvdata, pin - drvdata->pin_base, &reg_base,
-					&pin_offset, &bank);
+	pin_to_reg_bank(drvdata, pin, &reg_base, &pin_offset, &bank);
 	type = bank->type;
 
 	if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type])
@@ -671,7 +667,7 @@ static int samsung_add_pin_ranges(struct gpio_chip *gc)
 
 	bank->grange.name = bank->name;
 	bank->grange.id = bank->id;
-	bank->grange.pin_base = bank->drvdata->pin_base + bank->pin_base;
+	bank->grange.pin_base = bank->pin_base;
 	bank->grange.base = gc->base;
 	bank->grange.npins = bank->nr_pins;
 	bank->grange.gc = &bank->gpio_chip;
@@ -891,7 +887,7 @@ static int samsung_pinctrl_register(struct platform_device *pdev,
 
 	/* dynamically populate the pin number and pin name for pindesc */
 	for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++)
-		pdesc->number = pin + drvdata->pin_base;
+		pdesc->number = pin;
 
 	/*
 	 * allocate space for storing the dynamically generated names for all
@@ -1129,9 +1125,6 @@ samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d,
 
 	samsung_banks_node_get(&pdev->dev, d);
 
-	d->pin_base = pin_base;
-	pin_base += d->nr_pins;
-
 	return ctrl;
 }
 
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h
index 173db20f70d3..9b3db50adef3 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.h
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.h
@@ -269,7 +269,6 @@ struct samsung_pin_ctrl {
  * @nr_groups: number of such pin groups.
  * @pmx_functions: list of pin functions available to the driver.
  * @nr_function: number of such pin functions.
- * @pin_base: starting system wide pin number.
  * @nr_pins: number of pins supported by the controller.
  * @retention_ctrl: retention control runtime data.
  * @suspend: platform specific suspend callback, executed during pin controller
@@ -293,7 +292,6 @@ struct samsung_pinctrl_drv_data {
 
 	struct samsung_pin_bank		*pin_banks;
 	unsigned int			nr_banks;
-	unsigned int			pin_base;
 	unsigned int			nr_pins;
 
 	struct samsung_retention_ctrl	*retention_ctrl;
-- 
2.42.0


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linux-arm-kernel@lists.infradead.org
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  parent reply	other threads:[~2023-10-06 13:01 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20231006130032eucas1p18c6f5c39614768911730fa6ed0201ee3@eucas1p1.samsung.com>
2023-10-06 12:55 ` [PATCH 0/4] Fix Samsung pinctrl driver static allocation of GPIO base warning Mateusz Majewski
2023-10-06 12:55   ` Mateusz Majewski
     [not found]   ` <CGME20231006130038eucas1p1c849a21714227a11759681ef909ffd94@eucas1p1.samsung.com>
2023-10-06 12:55     ` [PATCH 1/4] pinctrl: samsung: defer pinctrl_enable Mateusz Majewski
2023-10-06 12:55       ` Mateusz Majewski
2023-10-07  2:14       ` Sam Protsenko
2023-10-07  2:14         ` Sam Protsenko
     [not found]   ` <CGME20231006130041eucas1p1fd945c734c0d35067107e7c699201bdb@eucas1p1.samsung.com>
2023-10-06 12:55     ` [PATCH 2/4] pinctrl: samsung: use add_pin_ranges method to add pinctrl ranges Mateusz Majewski
2023-10-06 12:55       ` Mateusz Majewski
     [not found]   ` <CGME20231006130042eucas1p10679037ebd812183a5edff0b7c1e8b6a@eucas1p1.samsung.com>
2023-10-06 12:55     ` [PATCH 3/4] pinctrl: samsung: choose GPIO numberspace base dynamically Mateusz Majewski
2023-10-06 12:55       ` Mateusz Majewski
     [not found]   ` <CGME20231006130044eucas1p17a141ec5aafca3d5af5295049f8b1651@eucas1p1.samsung.com>
2023-10-06 12:55     ` Mateusz Majewski [this message]
2023-10-06 12:55       ` [PATCH 4/4] pinctrl: samsung: do not offset pinctrl numberspaces Mateusz Majewski
2023-10-07  2:14   ` [PATCH 0/4] Fix Samsung pinctrl driver static allocation of GPIO base warning Sam Protsenko
2023-10-07  2:14     ` Sam Protsenko
2023-10-08 13:09     ` Krzysztof Kozlowski
2023-10-08 13:09       ` Krzysztof Kozlowski
2023-10-08 18:45       ` Sam Protsenko
2023-10-08 18:45         ` Sam Protsenko
2023-10-09  9:42         ` Krzysztof Kozlowski
2023-10-09  9:42           ` Krzysztof Kozlowski
2023-10-09  9:52           ` Marek Szyprowski
2023-10-09  9:52             ` Marek Szyprowski
2023-10-09 10:02   ` Marek Szyprowski
2023-10-09 10:02     ` Marek Szyprowski
2023-10-09 10:38   ` Krzysztof Kozlowski
2023-10-09 10:38     ` Krzysztof Kozlowski
2023-10-10 12:09   ` Linus Walleij
2023-10-10 12:09     ` Linus Walleij

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