From: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> To: Bjorn Andersson <andersson@kernel.org>, Andy Gross <agross@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Richard Cochran <richardcochran@gmail.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org> Cc: <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <netdev@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, "Kathiravan Thirumoorthy" <quic_kathirav@quicinc.com> Subject: [PATCH 4/8] clk: qcom: ipq5332: add gpll0_out_aux clock Date: Mon, 30 Oct 2023 15:17:19 +0530 [thread overview] Message-ID: <20231030-ipq5332-nsscc-v1-4-6162a2c65f0a@quicinc.com> (raw) In-Reply-To: <20231030-ipq5332-nsscc-v1-0-6162a2c65f0a@quicinc.com> Add support for gpll0_out_aux clock which acts as the parent for certain networking subsystem (NSS) clocks. Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> --- drivers/clk/qcom/gcc-ipq5332.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c index 235849876a9a..966bb7ca8854 100644 --- a/drivers/clk/qcom/gcc-ipq5332.c +++ b/drivers/clk/qcom/gcc-ipq5332.c @@ -87,6 +87,19 @@ static struct clk_alpha_pll_postdiv gpll0 = { }, }; +static struct clk_alpha_pll_postdiv gpll0_out_aux = { + .offset = 0x20000, + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_STROMER_PLUS], + .width = 4, + .clkr.hw.init = &(struct clk_init_data) { + .name = "gpll0_out_aux", + .parent_hws = (const struct clk_hw *[]) { + &gpll0_main.clkr.hw }, + .num_parents = 1, + .ops = &clk_alpha_pll_postdiv_ro_ops, + }, +}; + static struct clk_alpha_pll gpll2_main = { .offset = 0x21000, .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_STROMER_PLUS], @@ -3393,6 +3406,7 @@ static struct clk_regmap *gcc_ipq5332_clocks[] = { [GCC_PCIE3X1_0_PIPE_CLK_SRC] = &gcc_pcie3x1_0_pipe_clk_src.clkr, [GCC_PCIE3X1_1_PIPE_CLK_SRC] = &gcc_pcie3x1_1_pipe_clk_src.clkr, [GCC_USB0_PIPE_CLK_SRC] = &gcc_usb0_pipe_clk_src.clkr, + [GPLL0_OUT_AUX] = &gpll0_out_aux.clkr, }; static const struct qcom_reset_map gcc_ipq5332_resets[] = { -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> To: Bjorn Andersson <andersson@kernel.org>, Andy Gross <agross@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Richard Cochran <richardcochran@gmail.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org> Cc: <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <netdev@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, "Kathiravan Thirumoorthy" <quic_kathirav@quicinc.com> Subject: [PATCH 4/8] clk: qcom: ipq5332: add gpll0_out_aux clock Date: Mon, 30 Oct 2023 15:17:19 +0530 [thread overview] Message-ID: <20231030-ipq5332-nsscc-v1-4-6162a2c65f0a@quicinc.com> (raw) In-Reply-To: <20231030-ipq5332-nsscc-v1-0-6162a2c65f0a@quicinc.com> Add support for gpll0_out_aux clock which acts as the parent for certain networking subsystem (NSS) clocks. Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> --- drivers/clk/qcom/gcc-ipq5332.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c index 235849876a9a..966bb7ca8854 100644 --- a/drivers/clk/qcom/gcc-ipq5332.c +++ b/drivers/clk/qcom/gcc-ipq5332.c @@ -87,6 +87,19 @@ static struct clk_alpha_pll_postdiv gpll0 = { }, }; +static struct clk_alpha_pll_postdiv gpll0_out_aux = { + .offset = 0x20000, + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_STROMER_PLUS], + .width = 4, + .clkr.hw.init = &(struct clk_init_data) { + .name = "gpll0_out_aux", + .parent_hws = (const struct clk_hw *[]) { + &gpll0_main.clkr.hw }, + .num_parents = 1, + .ops = &clk_alpha_pll_postdiv_ro_ops, + }, +}; + static struct clk_alpha_pll gpll2_main = { .offset = 0x21000, .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_STROMER_PLUS], @@ -3393,6 +3406,7 @@ static struct clk_regmap *gcc_ipq5332_clocks[] = { [GCC_PCIE3X1_0_PIPE_CLK_SRC] = &gcc_pcie3x1_0_pipe_clk_src.clkr, [GCC_PCIE3X1_1_PIPE_CLK_SRC] = &gcc_pcie3x1_1_pipe_clk_src.clkr, [GCC_USB0_PIPE_CLK_SRC] = &gcc_usb0_pipe_clk_src.clkr, + [GPLL0_OUT_AUX] = &gpll0_out_aux.clkr, }; static const struct qcom_reset_map gcc_ipq5332_resets[] = { -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-10-30 9:48 UTC|newest] Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-10-30 9:47 [PATCH 0/8] Add NSS clock controller support for IPQ5332 Kathiravan Thirumoorthy 2023-10-30 9:47 ` Kathiravan Thirumoorthy 2023-10-30 9:47 ` [PATCH 1/8] clk: qcom: ipq5332: drop the few nssnoc clocks Kathiravan Thirumoorthy 2023-10-30 9:47 ` Kathiravan Thirumoorthy 2023-10-30 18:42 ` Konrad Dybcio 2023-10-30 18:42 ` Konrad Dybcio 2023-10-30 9:47 ` [PATCH 2/8] dt-bindings: clock: ipq5332: drop the few nss clocks definition Kathiravan Thirumoorthy 2023-10-30 9:47 ` Kathiravan Thirumoorthy 2023-10-30 11:07 ` Krzysztof Kozlowski 2023-10-30 11:07 ` Krzysztof Kozlowski 2023-10-30 18:56 ` Stephen Boyd 2023-10-30 18:56 ` Stephen Boyd 2023-10-31 4:20 ` Kathiravan Thirumoorthy 2023-10-31 4:20 ` Kathiravan Thirumoorthy 2023-10-30 9:47 ` [PATCH 3/8] dt-bindings: clock: ipq5332: add definition for GPLL0_OUT_AUX clock Kathiravan Thirumoorthy 2023-10-30 9:47 ` Kathiravan Thirumoorthy 2023-10-30 11:08 ` Krzysztof Kozlowski 2023-10-30 11:08 ` Krzysztof Kozlowski 2023-10-30 9:47 ` Kathiravan Thirumoorthy [this message] 2023-10-30 9:47 ` [PATCH 4/8] clk: qcom: ipq5332: add gpll0_out_aux clock Kathiravan Thirumoorthy 2023-10-30 18:57 ` Stephen Boyd 2023-10-30 18:57 ` Stephen Boyd 2023-10-31 4:24 ` Kathiravan Thirumoorthy 2023-10-31 4:24 ` Kathiravan Thirumoorthy 2023-10-30 9:47 ` [PATCH 5/8] dt-bindings: clock: add IPQ5332 NSSCC clock and reset definitions Kathiravan Thirumoorthy 2023-10-30 9:47 ` Kathiravan Thirumoorthy 2023-10-30 11:11 ` Krzysztof Kozlowski 2023-10-30 11:11 ` Krzysztof Kozlowski 2023-10-31 4:17 ` Kathiravan Thirumoorthy 2023-10-31 4:17 ` Kathiravan Thirumoorthy 2023-10-30 9:47 ` [PATCH 6/8] clk: qcom: add NSS clock Controller driver for IPQ5332 Kathiravan Thirumoorthy 2023-10-30 9:47 ` Kathiravan Thirumoorthy 2023-10-30 9:47 ` [PATCH 7/8] arm64: dts: qcom: ipq5332: add support for the NSSCC Kathiravan Thirumoorthy 2023-10-30 9:47 ` Kathiravan Thirumoorthy 2023-10-30 11:13 ` Krzysztof Kozlowski 2023-10-30 11:13 ` Krzysztof Kozlowski 2023-10-31 4:18 ` Kathiravan Thirumoorthy 2023-10-31 4:18 ` Kathiravan Thirumoorthy 2023-10-30 9:47 ` [PATCH 8/8] arm64: defconfig: build NSS Clock Controller driver for IPQ5332 Kathiravan Thirumoorthy 2023-10-30 9:47 ` Kathiravan Thirumoorthy 2023-10-30 10:26 ` Kathiravan Thirumoorthy 2023-10-30 10:26 ` Kathiravan Thirumoorthy 2023-10-30 11:08 ` Krzysztof Kozlowski 2023-10-30 11:08 ` Krzysztof Kozlowski 2023-10-31 4:16 ` Kathiravan Thirumoorthy 2023-10-31 4:16 ` Kathiravan Thirumoorthy
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