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From: Biju Das <biju.das.jz@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
	Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
	Pavel Machek <pavel@denx.de>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH 6.1.y-cip 3/6] clk: versaclock3: Avoid unnecessary padding
Date: Fri,  2 Feb 2024 11:37:51 +0000	[thread overview]
Message-ID: <20240202113754.202827-4-biju.das.jz@bp.renesas.com> (raw)
In-Reply-To: <20240202113754.202827-1-biju.das.jz@bp.renesas.com>

commit 1e8ce92afdbf2dafa345a9b1d91fb14a1487dc7f upstream.

Move long/pointer variables at the beginning of struct to avoid
unnecessary padding.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20231122142310.203169-3-biju.das.jz@bp.renesas.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 drivers/clk/clk-versaclock3.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/clk-versaclock3.c b/drivers/clk/clk-versaclock3.c
index 2aa5f5f34ddd..ac5f2c43b595 100644
--- a/drivers/clk/clk-versaclock3.c
+++ b/drivers/clk/clk-versaclock3.c
@@ -148,16 +148,16 @@ struct vc3_pfd_data {
 };
 
 struct vc3_pll_data {
+	unsigned long vco_min;
+	unsigned long vco_max;
 	u8 num;
 	u8 int_div_msb_offs;
 	u8 int_div_lsb_offs;
-	unsigned long vco_min;
-	unsigned long vco_max;
 };
 
 struct vc3_div_data {
-	u8 offs;
 	const struct clk_div_table *table;
+	u8 offs;
 	u8 shift;
 	u8 width;
 	u8 flags;
-- 
2.25.1



  parent reply	other threads:[~2024-02-02 11:38 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-02 11:37 [PATCH 6.1.y-cip 0/6] Versa3 clk driver improvements Biju Das
2024-02-02 11:37 ` [PATCH 6.1.y-cip 1/6] arm64: defconfig: Enable Renesas VersaClock 3 clock generator config Biju Das
2024-02-02 11:37 ` [PATCH 6.1.y-cip 2/6] clk: versaclock3: Update vc3_get_div() to avoid divide by zero Biju Das
2024-02-02 11:37 ` Biju Das [this message]
2024-02-02 11:37 ` [PATCH 6.1.y-cip 4/6] clk: versaclock3: Use u8 return type for get_parent() callback Biju Das
2024-02-02 11:37 ` [PATCH 6.1.y-cip 5/6] clk: versaclock3: Add missing space between ')' and '{' Biju Das
2024-02-02 11:37 ` [PATCH 6.1.y-cip 6/6] clk: versaclock3: Drop ret variable Biju Das
2024-02-02 11:45 ` [PATCH 6.1.y-cip 0/6] Versa3 clk driver improvements Pavel Machek
2024-02-02 12:08 ` nobuhiro1.iwamatsu
2024-02-05 11:23   ` Pavel Machek

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