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From: Alexander Stein <alexander.stein@ew.tq-group.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	Michael Walle <michael@walle.cc>,
	Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Jonathan Corbet <corbet@lwn.net>,
	Rob Herring <robh+dt@kernel.org>,
	Frank Rowand <frowand.list@gmail.com>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	Dan Carpenter <error27@gmail.com>
Subject: Re: [PATCH v5 00/21] nvmem: core: introduce NVMEM layouts
Date: Thu, 05 Jan 2023 12:04:52 +0100	[thread overview]
Message-ID: <2143916.GUh0CODmnK@steina-w> (raw)
In-Reply-To: <cf00e248-1f2c-d4ce-868d-9f77b2c9b76f@linaro.org>

Am Dienstag, 3. Januar 2023, 16:51:31 CET schrieb Srinivas Kandagatla:
> Hi Miquel,
> 
> On 03/01/2023 15:39, Miquel Raynal wrote:
> > Hi Srinivas,
> > 
> > michael@walle.cc wrote on Tue,  6 Dec 2022 21:07:19 +0100:
> >> This is now the third attempt to fetch the MAC addresses from the VPD
> >> for the Kontron sl28 boards. Previous discussions can be found here:
> >> https://lore.kernel.org/lkml/20211228142549.1275412-1-michael@walle.cc/
> >> 
> >> 
> >> NVMEM cells are typically added by board code or by the devicetree. But
> >> as the cells get more complex, there is (valid) push back from the
> >> devicetree maintainers to not put that handling in the devicetree.
> >> 
> >> Therefore, introduce NVMEM layouts. They operate on the NVMEM device and
> >> can add cells during runtime. That way it is possible to add more complex
> >> cells than it is possible right now with the offset/length/bits
> >> description in the device tree. For example, you can have post processing
> >> for individual cells (think of endian swapping, or ethernet offset
> >> handling).
> >> 
> >> The imx-ocotp driver is the only user of the global post processing hook,
> >> convert it to nvmem layouts and drop the global post pocessing hook.
> >> 
> >> For now, the layouts are selected by the device tree. But the idea is
> >> that also board files or other drivers could set a layout. Although no
> >> code for that exists yet.
> >> 
> >> Thanks to Miquel, the device tree bindings are already approved and
> >> merged.
> >> 
> >> NVMEM layouts as modules?
> >> While possible in principle, it doesn't make any sense because the NVMEM
> >> core can't be compiled as a module. The layouts needs to be available at
> >> probe time. (That is also the reason why they get registered with
> >> subsys_initcall().) So if the NVMEM core would be a module, the layouts
> >> could be modules, too.
> > 
> > I believe this series still applies even though -rc1 (and -rc2) are out
> > now, may we know if you consider merging it anytime soon or if there
> > are still discrepancies in the implementation you would like to
> > discuss? Otherwise I would really like to see this laying in -next a
> > few weeks before being sent out to Linus, just in case.
> 
> Thanks for the work!
> 
> Lets get some testing in -next.

This causes the following errors on existing boards (imx8mq-tqma8mq-
mba8mx.dtb):
root@tqma8-common:~# uname -r
6.2.0-rc2-next-20230105

> OF: /soc@0: could not get #nvmem-cell-cells for /soc@0/bus@30000000/
efuse@30350000/soc-uid@4
> OF: /soc@0/bus@30800000/ethernet@30be0000: could not get #nvmem-cell-cells 
for /soc@0/bus@30000000/efuse@30350000/mac-address@90

These are caused because '#nvmem-cell-cells = <0>;' is not explicitly set in 
DT.

> TI DP83867 30be0000.ethernet-1:0e: error -EINVAL: failed to get nvmem cell 
io_impedance_ctrl
> TI DP83867: probe of 30be0000.ethernet-1:0e failed with error -22

These are caused because of_nvmem_cell_get() now returns -EINVAL instead of -
ENODEV if the requested nvmem cell is not available.

Best regards,
Alexander




WARNING: multiple messages have this Message-ID (diff)
From: Alexander Stein <alexander.stein@ew.tq-group.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	Michael Walle <michael@walle.cc>,
	Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Jonathan Corbet <corbet@lwn.net>,
	Rob Herring <robh+dt@kernel.org>,
	Frank Rowand <frowand.list@gmail.com>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	Dan Carpenter <error27@gmail.com>
Subject: Re: [PATCH v5 00/21] nvmem: core: introduce NVMEM layouts
Date: Thu, 05 Jan 2023 12:04:52 +0100	[thread overview]
Message-ID: <2143916.GUh0CODmnK@steina-w> (raw)
In-Reply-To: <cf00e248-1f2c-d4ce-868d-9f77b2c9b76f@linaro.org>

Am Dienstag, 3. Januar 2023, 16:51:31 CET schrieb Srinivas Kandagatla:
> Hi Miquel,
> 
> On 03/01/2023 15:39, Miquel Raynal wrote:
> > Hi Srinivas,
> > 
> > michael@walle.cc wrote on Tue,  6 Dec 2022 21:07:19 +0100:
> >> This is now the third attempt to fetch the MAC addresses from the VPD
> >> for the Kontron sl28 boards. Previous discussions can be found here:
> >> https://lore.kernel.org/lkml/20211228142549.1275412-1-michael@walle.cc/
> >> 
> >> 
> >> NVMEM cells are typically added by board code or by the devicetree. But
> >> as the cells get more complex, there is (valid) push back from the
> >> devicetree maintainers to not put that handling in the devicetree.
> >> 
> >> Therefore, introduce NVMEM layouts. They operate on the NVMEM device and
> >> can add cells during runtime. That way it is possible to add more complex
> >> cells than it is possible right now with the offset/length/bits
> >> description in the device tree. For example, you can have post processing
> >> for individual cells (think of endian swapping, or ethernet offset
> >> handling).
> >> 
> >> The imx-ocotp driver is the only user of the global post processing hook,
> >> convert it to nvmem layouts and drop the global post pocessing hook.
> >> 
> >> For now, the layouts are selected by the device tree. But the idea is
> >> that also board files or other drivers could set a layout. Although no
> >> code for that exists yet.
> >> 
> >> Thanks to Miquel, the device tree bindings are already approved and
> >> merged.
> >> 
> >> NVMEM layouts as modules?
> >> While possible in principle, it doesn't make any sense because the NVMEM
> >> core can't be compiled as a module. The layouts needs to be available at
> >> probe time. (That is also the reason why they get registered with
> >> subsys_initcall().) So if the NVMEM core would be a module, the layouts
> >> could be modules, too.
> > 
> > I believe this series still applies even though -rc1 (and -rc2) are out
> > now, may we know if you consider merging it anytime soon or if there
> > are still discrepancies in the implementation you would like to
> > discuss? Otherwise I would really like to see this laying in -next a
> > few weeks before being sent out to Linus, just in case.
> 
> Thanks for the work!
> 
> Lets get some testing in -next.

This causes the following errors on existing boards (imx8mq-tqma8mq-
mba8mx.dtb):
root@tqma8-common:~# uname -r
6.2.0-rc2-next-20230105

> OF: /soc@0: could not get #nvmem-cell-cells for /soc@0/bus@30000000/
efuse@30350000/soc-uid@4
> OF: /soc@0/bus@30800000/ethernet@30be0000: could not get #nvmem-cell-cells 
for /soc@0/bus@30000000/efuse@30350000/mac-address@90

These are caused because '#nvmem-cell-cells = <0>;' is not explicitly set in 
DT.

> TI DP83867 30be0000.ethernet-1:0e: error -EINVAL: failed to get nvmem cell 
io_impedance_ctrl
> TI DP83867: probe of 30be0000.ethernet-1:0e failed with error -22

These are caused because of_nvmem_cell_get() now returns -EINVAL instead of -
ENODEV if the requested nvmem cell is not available.

Best regards,
Alexander




_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2023-01-05 11:05 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-06 20:07 [PATCH v5 00/21] nvmem: core: introduce NVMEM layouts Michael Walle
2022-12-06 20:07 ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 01/21] net: add helper eth_addr_add() Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 02/21] of: base: add of_parse_phandle_with_optional_args() Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 03/21] of: property: make #.*-cells optional for simple props Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 04/21] of: property: add #nvmem-cell-cells property Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 05/21] nvmem: core: fix device node refcounting Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 06/21] nvmem: core: add an index parameter to the cell Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 07/21] nvmem: core: move struct nvmem_cell_info to nvmem-provider.h Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 08/21] nvmem: core: drop the removal of the cells in nvmem_add_cells() Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 09/21] nvmem: core: fix cell removal on error Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 10/21] nvmem: core: add nvmem_add_one_cell() Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 11/21] nvmem: core: use nvmem_add_one_cell() in nvmem_add_cells_from_of() Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 12/21] nvmem: core: introduce NVMEM layouts Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 13/21] nvmem: core: add per-cell post processing Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 14/21] nvmem: core: allow to modify a cell before adding it Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 15/21] nvmem: imx-ocotp: replace global post processing with layouts Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 16/21] nvmem: cell: drop global cell_post_process Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 17/21] nvmem: core: provide own priv pointer in post process callback Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 18/21] nvmem: layouts: add sl28vpd layout Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 19/21] MAINTAINERS: add myself as sl28vpd nvmem layout driver Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 20/21] nvmem: layouts: Add ONIE tlv " Michael Walle
2022-12-06 20:07   ` Michael Walle
2022-12-06 20:07 ` [PATCH v5 21/21] MAINTAINERS: Add myself as ONIE tlv NVMEM layout maintainer Michael Walle
2022-12-06 20:07   ` Michael Walle
2023-01-03 15:39 ` [PATCH v5 00/21] nvmem: core: introduce NVMEM layouts Miquel Raynal
2023-01-03 15:39   ` Miquel Raynal
2023-01-03 15:51   ` Srinivas Kandagatla
2023-01-03 15:51     ` Srinivas Kandagatla
2023-01-03 15:58     ` Miquel Raynal
2023-01-03 15:58       ` Miquel Raynal
2023-01-05 11:04     ` Alexander Stein [this message]
2023-01-05 11:04       ` Alexander Stein
2023-01-05 11:35       ` Miquel Raynal
2023-01-05 11:35         ` Miquel Raynal
2023-01-05 12:11         ` Michael Walle
2023-01-05 12:11           ` Michael Walle
2023-01-05 12:21           ` Alexander Stein
2023-01-05 12:21             ` Alexander Stein
2023-01-05 12:51             ` Michael Walle
2023-01-05 12:51               ` Michael Walle
2023-01-05 13:22               ` Alexander Stein
2023-01-05 13:22                 ` Alexander Stein
2023-02-06 20:31   ` Srinivas Kandagatla
2023-02-06 20:31     ` Srinivas Kandagatla
2023-02-06 22:47     ` Miquel Raynal
2023-02-06 22:47       ` Miquel Raynal
2023-02-07  6:28       ` Greg Kroah-Hartman
2023-02-07  6:28         ` Greg Kroah-Hartman

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