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From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	dja@axtens.net
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
	linux-mm@kvack.org
Subject: [PATCH v5 16/17] powerpc/32s: avoid crossing page boundary while changing SRR0/1.
Date: Sat, 21 Dec 2019 08:32:37 +0000 (UTC)	[thread overview]
Message-ID: <30d2cda111b7977227fff067fa7e358440e2b3a4.1576916812.git.christophe.leroy@c-s.fr> (raw)
In-Reply-To: <cover.1576916812.git.christophe.leroy@c-s.fr>

Trying VMAP_STACK with KVM, vmlinux was not starting.
This was due to SRR0 and SRR1 clobbered by an ISI due to
the rfi being in a different page than the mtsrr0/1:

c0003fe0 <mmu_off>:
c0003fe0:       38 83 00 54     addi    r4,r3,84
c0003fe4:       7c 60 00 a6     mfmsr   r3
c0003fe8:       70 60 00 30     andi.   r0,r3,48
c0003fec:       4d 82 00 20     beqlr
c0003ff0:       7c 63 00 78     andc    r3,r3,r0
c0003ff4:       7c 9a 03 a6     mtsrr0  r4
c0003ff8:       7c 7b 03 a6     mtsrr1  r3
c0003ffc:       7c 00 04 ac     hwsync
c0004000:       4c 00 00 64     rfi

Align the 4 instruction block used to deactivate MMU to order 4,
so that the block never crosses a page boundary.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
 arch/powerpc/kernel/head_32.S | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 7ec780858299..90ef355e958b 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -917,6 +917,8 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
 	ori	r4,r4,2f@l
 	tophys(r4,r4)
 	li	r3,MSR_KERNEL & ~(MSR_IR|MSR_DR)
+
+	.align	4
 	mtspr	SPRN_SRR0,r4
 	mtspr	SPRN_SRR1,r3
 	SYNC
@@ -1058,6 +1060,8 @@ _ENTRY(update_bats)
 	rlwinm	r0, r6, 0, ~MSR_RI
 	rlwinm	r0, r0, 0, ~MSR_EE
 	mtmsr	r0
+
+	.align	4
 	mtspr	SPRN_SRR0, r4
 	mtspr	SPRN_SRR1, r3
 	SYNC
@@ -1097,6 +1101,8 @@ mmu_off:
 	andi.	r0,r3,MSR_DR|MSR_IR		/* MMU enabled? */
 	beqlr
 	andc	r3,r3,r0
+
+	.align	4
 	mtspr	SPRN_SRR0,r4
 	mtspr	SPRN_SRR1,r3
 	sync
-- 
2.13.3


WARNING: multiple messages have this Message-ID (diff)
From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	 dja@axtens.net
Cc: linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v5 16/17] powerpc/32s: avoid crossing page boundary while changing SRR0/1.
Date: Sat, 21 Dec 2019 08:32:37 +0000 (UTC)	[thread overview]
Message-ID: <30d2cda111b7977227fff067fa7e358440e2b3a4.1576916812.git.christophe.leroy@c-s.fr> (raw)
In-Reply-To: <cover.1576916812.git.christophe.leroy@c-s.fr>

Trying VMAP_STACK with KVM, vmlinux was not starting.
This was due to SRR0 and SRR1 clobbered by an ISI due to
the rfi being in a different page than the mtsrr0/1:

c0003fe0 <mmu_off>:
c0003fe0:       38 83 00 54     addi    r4,r3,84
c0003fe4:       7c 60 00 a6     mfmsr   r3
c0003fe8:       70 60 00 30     andi.   r0,r3,48
c0003fec:       4d 82 00 20     beqlr
c0003ff0:       7c 63 00 78     andc    r3,r3,r0
c0003ff4:       7c 9a 03 a6     mtsrr0  r4
c0003ff8:       7c 7b 03 a6     mtsrr1  r3
c0003ffc:       7c 00 04 ac     hwsync
c0004000:       4c 00 00 64     rfi

Align the 4 instruction block used to deactivate MMU to order 4,
so that the block never crosses a page boundary.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
 arch/powerpc/kernel/head_32.S | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 7ec780858299..90ef355e958b 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -917,6 +917,8 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
 	ori	r4,r4,2f@l
 	tophys(r4,r4)
 	li	r3,MSR_KERNEL & ~(MSR_IR|MSR_DR)
+
+	.align	4
 	mtspr	SPRN_SRR0,r4
 	mtspr	SPRN_SRR1,r3
 	SYNC
@@ -1058,6 +1060,8 @@ _ENTRY(update_bats)
 	rlwinm	r0, r6, 0, ~MSR_RI
 	rlwinm	r0, r0, 0, ~MSR_EE
 	mtmsr	r0
+
+	.align	4
 	mtspr	SPRN_SRR0, r4
 	mtspr	SPRN_SRR1, r3
 	SYNC
@@ -1097,6 +1101,8 @@ mmu_off:
 	andi.	r0,r3,MSR_DR|MSR_IR		/* MMU enabled? */
 	beqlr
 	andc	r3,r3,r0
+
+	.align	4
 	mtspr	SPRN_SRR0,r4
 	mtspr	SPRN_SRR1,r3
 	sync
-- 
2.13.3


  parent reply	other threads:[~2019-12-21  8:32 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-21  8:32 [PATCH v5 00/17] Enable CONFIG_VMAP_STACK on PPC32 Christophe Leroy
2019-12-21  8:32 ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 01/17] powerpc/32: replace MTMSRD() by mtmsr Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2020-01-29  5:17   ` Michael Ellerman
2019-12-21  8:32 ` [PATCH v5 02/17] powerpc/32: Add EXCEPTION_PROLOG_0 in head_32.h Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 03/17] powerpc/32: save DEAR/DAR before calling handle_page_fault Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 04/17] powerpc/32: move MSR_PR test into EXCEPTION_PROLOG_0 Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 05/17] powerpc/32: add a macro to get and/or save DAR and DSISR on stack Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 06/17] powerpc/32: prepare for CONFIG_VMAP_STACK Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 07/17] powerpc: align stack to 2 * THREAD_SIZE with VMAP_STACK Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 08/17] powerpc/32: Add early stack overflow detection with VMAP stack Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 09/17] powerpc/32: Use vmapped stacks for interrupts Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 10/17] powerpc/8xx: Use alternative scratch registers in DTLB miss handler Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 11/17] powerpc/8xx: drop exception entries for non-existing exceptions Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 12/17] powerpc/8xx: move DataStoreTLBMiss perf handler Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 13/17] powerpc/8xx: split breakpoint exception Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 14/17] powerpc/8xx: Enable CONFIG_VMAP_STACK Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 15/17] powerpc/32s: reorganise DSI handler Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` Christophe Leroy [this message]
2019-12-21  8:32   ` [PATCH v5 16/17] powerpc/32s: avoid crossing page boundary while changing SRR0/1 Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 17/17] powerpc/32s: Enable CONFIG_VMAP_STACK Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2020-01-18 12:46   ` Michael Ellerman
2020-01-18 12:46     ` Michael Ellerman
2020-02-06 20:31   ` Guenter Roeck
2020-02-06 20:31     ` Guenter Roeck
2020-02-07  6:13     ` Christophe Leroy
2020-02-07  6:13       ` Christophe Leroy
2020-02-07  8:28       ` Christophe Leroy
2020-02-07  8:28         ` Christophe Leroy
2020-02-07 13:08         ` Guenter Roeck
2020-02-07 13:08           ` Guenter Roeck
2020-02-07 13:29           ` Christophe Leroy
2020-02-07 13:29             ` Christophe Leroy
2020-02-07 13:44             ` Guenter Roeck
2020-02-07 13:44               ` Guenter Roeck
2020-02-07 17:16               ` Christophe Leroy
2020-02-07 17:16                 ` Christophe Leroy

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