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From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
To: "Rob Herring" <robh+dt@kernel.org>,
	"Andreas Färber" <afaerber@suse.de>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-actions@lists.infradead.org
Subject: [PATCH 10/10] arm: dts: owl-s500-roseapplepi: Enable I2C0
Date: Fri, 26 Jun 2020 02:34:22 +0300	[thread overview]
Message-ID: <564bbfeac8c1ed6f103bf1d9be0550856778244f.1593124368.git.cristian.ciocaltea@gmail.com> (raw)
In-Reply-To: <cover.1593124368.git.cristian.ciocaltea@gmail.com>

Add pinctrl definitions for the I2C controllers used in RoseapplePi SBC.
For the moment enable only I2C0, which is used by PMIC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
 arch/arm/boot/dts/owl-s500-roseapplepi.dts | 43 ++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
index 0a916b6c83a8..f5d515ba9bdd 100644
--- a/arch/arm/boot/dts/owl-s500-roseapplepi.dts
+++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
@@ -37,7 +37,50 @@ sd_vcc: sd-vcc {
 	};
 };
 
+&i2c0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_default>;
+};
+
+&i2c1 {
+	status = "disabled";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1_default>;
+};
+
+&i2c2 {
+	status = "disabled";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c2_default>;
+};
+
 &pinctrl {
+	i2c0_default: i2c0_default {
+		pinmux {
+			groups = "i2c0_mfp";
+			function = "i2c0";
+		};
+		pinconf {
+			pins = "i2c0_sclk", "i2c0_sdata";
+			bias-pull-up;
+		};
+	};
+
+	i2c1_default: i2c1_default {
+		pinconf {
+			pins = "i2c1_sclk", "i2c1_sdata";
+			bias-pull-up;
+		};
+	};
+
+	i2c2_default: i2c2_default {
+		pinconf {
+			pins = "i2c2_sclk", "i2c2_sdata";
+			bias-pull-up;
+		};
+	};
+
 	mmc0_default: mmc0_default {
 		pinmux {
 			groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp",
-- 
2.27.0


WARNING: multiple messages have this Message-ID (diff)
From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
To: "Rob Herring" <robh+dt@kernel.org>,
	"Andreas Färber" <afaerber@suse.de>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>
Cc: devicetree@vger.kernel.org, linux-actions@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 10/10] arm: dts: owl-s500-roseapplepi: Enable I2C0
Date: Fri, 26 Jun 2020 02:34:22 +0300	[thread overview]
Message-ID: <564bbfeac8c1ed6f103bf1d9be0550856778244f.1593124368.git.cristian.ciocaltea@gmail.com> (raw)
In-Reply-To: <cover.1593124368.git.cristian.ciocaltea@gmail.com>

Add pinctrl definitions for the I2C controllers used in RoseapplePi SBC.
For the moment enable only I2C0, which is used by PMIC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
 arch/arm/boot/dts/owl-s500-roseapplepi.dts | 43 ++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
index 0a916b6c83a8..f5d515ba9bdd 100644
--- a/arch/arm/boot/dts/owl-s500-roseapplepi.dts
+++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
@@ -37,7 +37,50 @@ sd_vcc: sd-vcc {
 	};
 };
 
+&i2c0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_default>;
+};
+
+&i2c1 {
+	status = "disabled";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1_default>;
+};
+
+&i2c2 {
+	status = "disabled";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c2_default>;
+};
+
 &pinctrl {
+	i2c0_default: i2c0_default {
+		pinmux {
+			groups = "i2c0_mfp";
+			function = "i2c0";
+		};
+		pinconf {
+			pins = "i2c0_sclk", "i2c0_sdata";
+			bias-pull-up;
+		};
+	};
+
+	i2c1_default: i2c1_default {
+		pinconf {
+			pins = "i2c1_sclk", "i2c1_sdata";
+			bias-pull-up;
+		};
+	};
+
+	i2c2_default: i2c2_default {
+		pinconf {
+			pins = "i2c2_sclk", "i2c2_sdata";
+			bias-pull-up;
+		};
+	};
+
 	mmc0_default: mmc0_default {
 		pinmux {
 			groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp",
-- 
2.27.0


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  parent reply	other threads:[~2020-06-25 23:34 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-25 23:34 [PATCH 00/10] Add CMU/RMU/DMA/MMC/I2C support for Actions Semi S500 SoCs Cristian Ciocaltea
2020-06-25 23:34 ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 01/10] arm: dts: owl-s500: Add Clock Management Unit Cristian Ciocaltea
2020-06-25 23:34   ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 02/10] arm: dts: owl-s500: Set UART clock refs from CMU Cristian Ciocaltea
2020-06-25 23:34   ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 03/10] arm: dts: owl-s500: Add DMA controller Cristian Ciocaltea
2020-06-25 23:34   ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 04/10] arm: dts: owl-s500: Add Reset Controller support Cristian Ciocaltea
2020-06-25 23:34   ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 05/10] arm: dts: owl-s500: Add pinctrl node Cristian Ciocaltea
2020-06-25 23:34   ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 06/10] arm: dts: owl-s500: Add MMC nodes Cristian Ciocaltea
2020-06-25 23:34   ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 07/10] arm: dts: owl-s500: Add I2C nodes Cristian Ciocaltea
2020-06-25 23:34   ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 08/10] arm: dts: owl-s500-roseapplepi: Use UART clock from CMU Cristian Ciocaltea
2020-06-25 23:34   ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 09/10] arm: dts: owl-s500-roseapplepi: Add uSD support Cristian Ciocaltea
2020-06-25 23:34   ` Cristian Ciocaltea
2020-06-25 23:34 ` Cristian Ciocaltea [this message]
2020-06-25 23:34   ` [PATCH 10/10] arm: dts: owl-s500-roseapplepi: Enable I2C0 Cristian Ciocaltea

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