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From: "Jan Beulich" <JBeulich@suse.com>
To: xen-devel <xen-devel@lists.xenproject.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Subject: [PATCH 2/2] x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV
Date: Wed, 31 May 2017 01:15:06 -0600	[thread overview]
Message-ID: <592E899A020000780015DF82@prv-mh.provo.novell.com> (raw)
In-Reply-To: <592E8735020000780015DF53@prv-mh.provo.novell.com>

[-- Attachment #1: Type: text/plain, Size: 1075 bytes --]

The flag is really only meant for those, both HVM and 32-bit PV tell
kernel from user mode based on CPL/RPL. Remove the all-question-marks
comment and let's be on the safe side here and also suppress clearing
for 32-bit PV (this isn't a fast path after all).

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -950,9 +950,15 @@ int arch_set_info_guest(
 
     v->fpu_initialised = !!(flags & VGCF_I387_VALID);
 
-    v->arch.flags &= ~TF_kernel_mode;
-    if ( (flags & VGCF_in_kernel) || is_hvm_domain(d)/*???*/ )
-        v->arch.flags |= TF_kernel_mode;
+    v->arch.flags |= TF_kernel_mode;
+    if ( unlikely(!(flags & VGCF_in_kernel)) &&
+         /*
+          * TF_kernel_mode is only allowed to be clear for 64-bit PV. See
+          * update_cr3(), sh_update_cr3(), and shadow_one_bit_disable() for
+          * why that is.
+          */
+         !is_hvm_domain(d) && !is_pv_32bit_domain(d) )
+        v->arch.flags &= ~TF_kernel_mode;
 
     v->arch.vgc_flags = flags;
 




[-- Attachment #2: x86-TF_kernel_mode-64bit-only.patch --]
[-- Type: text/plain, Size: 1141 bytes --]

x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV

The flag is really only meant for those, both HVM and 32-bit PV tell
kernel from user mode based on CPL/RPL. Remove the all-question-marks
comment and let's be on the safe side here and also suppress clearing
for 32-bit PV (this isn't a fast path after all).

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -950,9 +950,15 @@ int arch_set_info_guest(
 
     v->fpu_initialised = !!(flags & VGCF_I387_VALID);
 
-    v->arch.flags &= ~TF_kernel_mode;
-    if ( (flags & VGCF_in_kernel) || is_hvm_domain(d)/*???*/ )
-        v->arch.flags |= TF_kernel_mode;
+    v->arch.flags |= TF_kernel_mode;
+    if ( unlikely(!(flags & VGCF_in_kernel)) &&
+         /*
+          * TF_kernel_mode is only allowed to be clear for 64-bit PV. See
+          * update_cr3(), sh_update_cr3(), and shadow_one_bit_disable() for
+          * why that is.
+          */
+         !is_hvm_domain(d) && !is_pv_32bit_domain(d) )
+        v->arch.flags &= ~TF_kernel_mode;
 
     v->arch.vgc_flags = flags;
 

[-- Attachment #3: Type: text/plain, Size: 127 bytes --]

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  parent reply	other threads:[~2017-05-31  7:15 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-31  7:04 [PATCH 0/2] x86: XSA_214 follow-up Jan Beulich
2017-05-31  7:14 ` [PATCH 1/2] x86: limit page type width Jan Beulich
2017-05-31 10:01   ` Andrew Cooper
2017-05-31 10:09     ` Jan Beulich
2017-06-06  8:26   ` Jan Beulich
2017-05-31  7:15 ` Jan Beulich [this message]
2017-05-31 11:08   ` [PATCH 2/2] x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV Andrew Cooper
2017-05-31 11:54     ` Jan Beulich
2017-07-03 14:56     ` Ping: " Jan Beulich
2017-12-04 10:15     ` Ping#2: " Jan Beulich
2017-12-04 15:11       ` Andrew Cooper
2017-12-04 17:05         ` Jan Beulich

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