From: James Hogan <james.hogan@imgtec.com> To: <linux-mips@linux-mips.org>, <kvm@vger.kernel.org> Cc: "James Hogan" <james.hogan@imgtec.com>, "Paolo Bonzini" <pbonzini@redhat.com>, "Radim Krčmář" <rkrcmar@redhat.com>, "Ralf Baechle" <ralf@linux-mips.org>, "Jonathan Corbet" <corbet@lwn.net>, linux-doc@vger.kernel.org Subject: [PATCH v2 26/33] KVM: MIPS/VZ: Support guest CP0_BadInstr[P] Date: Tue, 14 Mar 2017 10:15:33 +0000 [thread overview] Message-ID: <646e1b70fcaa70e8fc2d31d107c3cc44555002b4.1489485940.git-series.james.hogan@imgtec.com> (raw) In-Reply-To: <cover.26e10ec77a4ed0d3177ccf4fabf57bc95ea030f8.1489485940.git-series.james.hogan@imgtec.com> Add support for VZ guest CP0_BadInstr and CP0_BadInstrP registers, as found on most VZ capable cores. These guest registers need context switching, and exposing via the KVM ioctl API when they are present. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Radim Krčmář" <rkrcmar@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org Cc: linux-doc@vger.kernel.org --- Documentation/virtual/kvm/api.txt | 2 +- arch/mips/include/asm/kvm_host.h | 4 +++- arch/mips/kvm/vz.c | 46 ++++++++++++++++++++++++++++++++- 3 files changed, 52 insertions(+), 0 deletions(-) diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index d2827864827f..5ef4fa1de7d4 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -2079,6 +2079,8 @@ registers, find a list below: MIPS | KVM_REG_MIPS_CP0_WIRED | 32 MIPS | KVM_REG_MIPS_CP0_HWRENA | 32 MIPS | KVM_REG_MIPS_CP0_BADVADDR | 64 + MIPS | KVM_REG_MIPS_CP0_BADINSTR | 32 + MIPS | KVM_REG_MIPS_CP0_BADINSTRP | 32 MIPS | KVM_REG_MIPS_CP0_COUNT | 32 MIPS | KVM_REG_MIPS_CP0_ENTRYHI | 64 MIPS | KVM_REG_MIPS_CP0_COMPARE | 32 diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h index bc3f9dedaac8..3a9ca3326315 100644 --- a/arch/mips/include/asm/kvm_host.h +++ b/arch/mips/include/asm/kvm_host.h @@ -40,6 +40,8 @@ #define KVM_REG_MIPS_CP0_WIRED MIPS_CP0_32(6, 0) #define KVM_REG_MIPS_CP0_HWRENA MIPS_CP0_32(7, 0) #define KVM_REG_MIPS_CP0_BADVADDR MIPS_CP0_64(8, 0) +#define KVM_REG_MIPS_CP0_BADINSTR MIPS_CP0_32(8, 1) +#define KVM_REG_MIPS_CP0_BADINSTRP MIPS_CP0_32(8, 2) #define KVM_REG_MIPS_CP0_COUNT MIPS_CP0_32(9, 0) #define KVM_REG_MIPS_CP0_ENTRYHI MIPS_CP0_64(10, 0) #define KVM_REG_MIPS_CP0_COMPARE MIPS_CP0_32(11, 0) @@ -669,6 +671,8 @@ __BUILD_KVM_RW_HW(pagegrain, 32, MIPS_CP0_TLB_PG_MASK, 1) __BUILD_KVM_RW_HW(wired, 32, MIPS_CP0_TLB_WIRED, 0) __BUILD_KVM_RW_HW(hwrena, 32, MIPS_CP0_HWRENA, 0) __BUILD_KVM_RW_HW(badvaddr, l, MIPS_CP0_BAD_VADDR, 0) +__BUILD_KVM_RW_HW(badinstr, 32, MIPS_CP0_BAD_VADDR, 1) +__BUILD_KVM_RW_HW(badinstrp, 32, MIPS_CP0_BAD_VADDR, 2) __BUILD_KVM_RW_SW(count, 32, MIPS_CP0_COUNT, 0) __BUILD_KVM_RW_HW(entryhi, l, MIPS_CP0_TLB_HI, 0) __BUILD_KVM_RW_HW(compare, 32, MIPS_CP0_COMPARE, 0) diff --git a/arch/mips/kvm/vz.c b/arch/mips/kvm/vz.c index cfed234be1e3..ec909fcd08ce 100644 --- a/arch/mips/kvm/vz.c +++ b/arch/mips/kvm/vz.c @@ -1221,6 +1221,10 @@ static unsigned long kvm_vz_num_regs(struct kvm_vcpu *vcpu) ret = ARRAY_SIZE(kvm_vz_get_one_regs); if (cpu_guest_has_userlocal) ++ret; + if (cpu_guest_has_badinstr) + ++ret; + if (cpu_guest_has_badinstrp) + ++ret; ret += __arch_hweight8(cpu_data[0].guest.kscratch_mask); return ret; @@ -1242,6 +1246,18 @@ static int kvm_vz_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices) return -EFAULT; ++indices; } + if (cpu_guest_has_badinstr) { + index = KVM_REG_MIPS_CP0_BADINSTR; + if (copy_to_user(indices, &index, sizeof(index))) + return -EFAULT; + ++indices; + } + if (cpu_guest_has_badinstrp) { + index = KVM_REG_MIPS_CP0_BADINSTRP; + if (copy_to_user(indices, &index, sizeof(index))) + return -EFAULT; + ++indices; + } for (i = 0; i < 6; ++i) { if (!cpu_guest_has_kscr(i + 2)) continue; @@ -1327,6 +1343,16 @@ static int kvm_vz_get_one_reg(struct kvm_vcpu *vcpu, case KVM_REG_MIPS_CP0_BADVADDR: *v = (long)read_gc0_badvaddr(); break; + case KVM_REG_MIPS_CP0_BADINSTR: + if (!cpu_guest_has_badinstr) + return -EINVAL; + *v = read_gc0_badinstr(); + break; + case KVM_REG_MIPS_CP0_BADINSTRP: + if (!cpu_guest_has_badinstrp) + return -EINVAL; + *v = read_gc0_badinstrp(); + break; case KVM_REG_MIPS_CP0_COUNT: *v = kvm_mips_read_count(vcpu); break; @@ -1472,6 +1498,16 @@ static int kvm_vz_set_one_reg(struct kvm_vcpu *vcpu, case KVM_REG_MIPS_CP0_BADVADDR: write_gc0_badvaddr(v); break; + case KVM_REG_MIPS_CP0_BADINSTR: + if (!cpu_guest_has_badinstr) + return -EINVAL; + write_gc0_badinstr(v); + break; + case KVM_REG_MIPS_CP0_BADINSTRP: + if (!cpu_guest_has_badinstrp) + return -EINVAL; + write_gc0_badinstrp(v); + break; case KVM_REG_MIPS_CP0_COUNT: kvm_mips_write_count(vcpu, v); break; @@ -1871,6 +1907,11 @@ static int kvm_vz_vcpu_load(struct kvm_vcpu *vcpu, int cpu) kvm_restore_gc0_kscratch6(cop0); } + if (cpu_guest_has_badinstr) + kvm_restore_gc0_badinstr(cop0); + if (cpu_guest_has_badinstrp) + kvm_restore_gc0_badinstrp(cop0); + /* restore Root.GuestCtl2 from unused Guest guestctl2 register */ if (cpu_has_guestctl2) write_c0_guestctl2( @@ -1945,6 +1986,11 @@ static int kvm_vz_vcpu_put(struct kvm_vcpu *vcpu, int cpu) kvm_save_gc0_kscratch6(cop0); } + if (cpu_guest_has_badinstr) + kvm_save_gc0_badinstr(cop0); + if (cpu_guest_has_badinstrp) + kvm_save_gc0_badinstrp(cop0); + kvm_vz_save_timer(vcpu); /* save Root.GuestCtl2 in unused Guest guestctl2 register */ -- git-series 0.8.10
WARNING: multiple messages have this Message-ID (diff)
From: James Hogan <james.hogan@imgtec.com> To: linux-mips@linux-mips.org, kvm@vger.kernel.org Cc: "James Hogan" <james.hogan@imgtec.com>, "Paolo Bonzini" <pbonzini@redhat.com>, "Radim Krčmář" <rkrcmar@redhat.com>, "Ralf Baechle" <ralf@linux-mips.org>, "Jonathan Corbet" <corbet@lwn.net>, linux-doc@vger.kernel.org Subject: [PATCH v2 26/33] KVM: MIPS/VZ: Support guest CP0_BadInstr[P] Date: Tue, 14 Mar 2017 10:15:33 +0000 [thread overview] Message-ID: <646e1b70fcaa70e8fc2d31d107c3cc44555002b4.1489485940.git-series.james.hogan@imgtec.com> (raw) Message-ID: <20170314101533.9HrUPqOrdeh4Eqowt5TxJt5p0B4-rAovk4Ms3ZE60UM@z> (raw) In-Reply-To: <cover.26e10ec77a4ed0d3177ccf4fabf57bc95ea030f8.1489485940.git-series.james.hogan@imgtec.com> Add support for VZ guest CP0_BadInstr and CP0_BadInstrP registers, as found on most VZ capable cores. These guest registers need context switching, and exposing via the KVM ioctl API when they are present. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Radim Krčmář" <rkrcmar@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org Cc: linux-doc@vger.kernel.org --- Documentation/virtual/kvm/api.txt | 2 +- arch/mips/include/asm/kvm_host.h | 4 +++- arch/mips/kvm/vz.c | 46 ++++++++++++++++++++++++++++++++- 3 files changed, 52 insertions(+), 0 deletions(-) diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index d2827864827f..5ef4fa1de7d4 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -2079,6 +2079,8 @@ registers, find a list below: MIPS | KVM_REG_MIPS_CP0_WIRED | 32 MIPS | KVM_REG_MIPS_CP0_HWRENA | 32 MIPS | KVM_REG_MIPS_CP0_BADVADDR | 64 + MIPS | KVM_REG_MIPS_CP0_BADINSTR | 32 + MIPS | KVM_REG_MIPS_CP0_BADINSTRP | 32 MIPS | KVM_REG_MIPS_CP0_COUNT | 32 MIPS | KVM_REG_MIPS_CP0_ENTRYHI | 64 MIPS | KVM_REG_MIPS_CP0_COMPARE | 32 diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h index bc3f9dedaac8..3a9ca3326315 100644 --- a/arch/mips/include/asm/kvm_host.h +++ b/arch/mips/include/asm/kvm_host.h @@ -40,6 +40,8 @@ #define KVM_REG_MIPS_CP0_WIRED MIPS_CP0_32(6, 0) #define KVM_REG_MIPS_CP0_HWRENA MIPS_CP0_32(7, 0) #define KVM_REG_MIPS_CP0_BADVADDR MIPS_CP0_64(8, 0) +#define KVM_REG_MIPS_CP0_BADINSTR MIPS_CP0_32(8, 1) +#define KVM_REG_MIPS_CP0_BADINSTRP MIPS_CP0_32(8, 2) #define KVM_REG_MIPS_CP0_COUNT MIPS_CP0_32(9, 0) #define KVM_REG_MIPS_CP0_ENTRYHI MIPS_CP0_64(10, 0) #define KVM_REG_MIPS_CP0_COMPARE MIPS_CP0_32(11, 0) @@ -669,6 +671,8 @@ __BUILD_KVM_RW_HW(pagegrain, 32, MIPS_CP0_TLB_PG_MASK, 1) __BUILD_KVM_RW_HW(wired, 32, MIPS_CP0_TLB_WIRED, 0) __BUILD_KVM_RW_HW(hwrena, 32, MIPS_CP0_HWRENA, 0) __BUILD_KVM_RW_HW(badvaddr, l, MIPS_CP0_BAD_VADDR, 0) +__BUILD_KVM_RW_HW(badinstr, 32, MIPS_CP0_BAD_VADDR, 1) +__BUILD_KVM_RW_HW(badinstrp, 32, MIPS_CP0_BAD_VADDR, 2) __BUILD_KVM_RW_SW(count, 32, MIPS_CP0_COUNT, 0) __BUILD_KVM_RW_HW(entryhi, l, MIPS_CP0_TLB_HI, 0) __BUILD_KVM_RW_HW(compare, 32, MIPS_CP0_COMPARE, 0) diff --git a/arch/mips/kvm/vz.c b/arch/mips/kvm/vz.c index cfed234be1e3..ec909fcd08ce 100644 --- a/arch/mips/kvm/vz.c +++ b/arch/mips/kvm/vz.c @@ -1221,6 +1221,10 @@ static unsigned long kvm_vz_num_regs(struct kvm_vcpu *vcpu) ret = ARRAY_SIZE(kvm_vz_get_one_regs); if (cpu_guest_has_userlocal) ++ret; + if (cpu_guest_has_badinstr) + ++ret; + if (cpu_guest_has_badinstrp) + ++ret; ret += __arch_hweight8(cpu_data[0].guest.kscratch_mask); return ret; @@ -1242,6 +1246,18 @@ static int kvm_vz_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices) return -EFAULT; ++indices; } + if (cpu_guest_has_badinstr) { + index = KVM_REG_MIPS_CP0_BADINSTR; + if (copy_to_user(indices, &index, sizeof(index))) + return -EFAULT; + ++indices; + } + if (cpu_guest_has_badinstrp) { + index = KVM_REG_MIPS_CP0_BADINSTRP; + if (copy_to_user(indices, &index, sizeof(index))) + return -EFAULT; + ++indices; + } for (i = 0; i < 6; ++i) { if (!cpu_guest_has_kscr(i + 2)) continue; @@ -1327,6 +1343,16 @@ static int kvm_vz_get_one_reg(struct kvm_vcpu *vcpu, case KVM_REG_MIPS_CP0_BADVADDR: *v = (long)read_gc0_badvaddr(); break; + case KVM_REG_MIPS_CP0_BADINSTR: + if (!cpu_guest_has_badinstr) + return -EINVAL; + *v = read_gc0_badinstr(); + break; + case KVM_REG_MIPS_CP0_BADINSTRP: + if (!cpu_guest_has_badinstrp) + return -EINVAL; + *v = read_gc0_badinstrp(); + break; case KVM_REG_MIPS_CP0_COUNT: *v = kvm_mips_read_count(vcpu); break; @@ -1472,6 +1498,16 @@ static int kvm_vz_set_one_reg(struct kvm_vcpu *vcpu, case KVM_REG_MIPS_CP0_BADVADDR: write_gc0_badvaddr(v); break; + case KVM_REG_MIPS_CP0_BADINSTR: + if (!cpu_guest_has_badinstr) + return -EINVAL; + write_gc0_badinstr(v); + break; + case KVM_REG_MIPS_CP0_BADINSTRP: + if (!cpu_guest_has_badinstrp) + return -EINVAL; + write_gc0_badinstrp(v); + break; case KVM_REG_MIPS_CP0_COUNT: kvm_mips_write_count(vcpu, v); break; @@ -1871,6 +1907,11 @@ static int kvm_vz_vcpu_load(struct kvm_vcpu *vcpu, int cpu) kvm_restore_gc0_kscratch6(cop0); } + if (cpu_guest_has_badinstr) + kvm_restore_gc0_badinstr(cop0); + if (cpu_guest_has_badinstrp) + kvm_restore_gc0_badinstrp(cop0); + /* restore Root.GuestCtl2 from unused Guest guestctl2 register */ if (cpu_has_guestctl2) write_c0_guestctl2( @@ -1945,6 +1986,11 @@ static int kvm_vz_vcpu_put(struct kvm_vcpu *vcpu, int cpu) kvm_save_gc0_kscratch6(cop0); } + if (cpu_guest_has_badinstr) + kvm_save_gc0_badinstr(cop0); + if (cpu_guest_has_badinstrp) + kvm_save_gc0_badinstrp(cop0); + kvm_vz_save_timer(vcpu); /* save Root.GuestCtl2 in unused Guest guestctl2 register */ -- git-series 0.8.10
next prev parent reply other threads:[~2017-03-14 10:29 UTC|newest] Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-03-14 10:15 [PATCH v2 0/33] KVM: MIPS: Add VZ support James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 1/33] MIPS: Add defs & probing of UFR James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 2/33] MIPS: Separate MAAR V bit into VL and VH for XPA James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 3/33] MIPS: Probe guest CP0_UserLocal James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 4/33] MIPS: Probe guest MVH James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 5/33] MIPS: Add some missing guest CP0 accessors & defs James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 6/33] MIPS: asm/tlb.h: Add UNIQUE_GUEST_ENTRYHI() macro James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 7/33] KVM: MIPS: Implement HYPCALL emulation James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 8/33] KVM: MIPS/Emulate: De-duplicate MMIO emulation James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 9/33] KVM: MIPS/Emulate: Implement 64-bit " James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 10/33] KVM: MIPS: Update kvm_lose_fpu() for VZ James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 11/33] KVM: MIPS: Extend counters & events for VZ GExcCodes James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 12/33] KVM: MIPS: Add VZ & TE capabilities James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 13/33] KVM: MIPS: Add 64BIT capability James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 14/33] KVM: MIPS: Init timer frequency from callback James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 15/33] KVM: MIPS: Add callback to check extension James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 16/33] KVM: MIPS: Add hardware_{enable,disable} callback James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 17/33] KVM: MIPS: Add guest exit exception callback James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 18/33] KVM: MIPS: Abstract guest CP0 register access for VZ James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 19/33] KVM: MIPS/Entry: Update entry code to support VZ James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 20/33] KVM: MIPS/TLB: Add VZ TLB management James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 21/33] KVM: MIPS/Emulate: Update CP0_Compare emulation for VZ James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 22/33] KVM: MIPS/Emulate: Drop CACHE " James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 23/33] KVM: MIPS: Update exit handler " James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 24/33] KVM: MIPS: Implement VZ support James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 25/33] KVM: MIPS: Add VZ support to build system James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-16 11:40 ` kbuild test robot 2017-03-16 11:40 ` kbuild test robot 2017-03-16 12:50 ` James Hogan 2017-03-14 10:15 ` James Hogan [this message] 2017-03-14 10:15 ` [PATCH v2 26/33] KVM: MIPS/VZ: Support guest CP0_BadInstr[P] James Hogan 2017-03-14 10:15 ` [PATCH v2 27/33] KVM: MIPS/VZ: Support guest CP0_[X]ContextConfig James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 28/33] KVM: MIPS/VZ: Support guest segmentation control James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 29/33] KVM: MIPS/VZ: Support guest hardware page table walker James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 30/33] KVM: MIPS/VZ: Support guest load-linked bit James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 31/33] KVM: MIPS/VZ: Emulate MAARs when necessary James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 32/33] KVM: MIPS/VZ: Support hardware guest timer James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-14 10:15 ` [PATCH v2 33/33] KVM: MIPS/VZ: Trace guest mode changes James Hogan 2017-03-14 10:15 ` James Hogan 2017-03-15 16:32 ` [PATCH v2 0/33] KVM: MIPS: Add VZ support Ralf Baechle
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