From: Christophe Leroy <christophe.leroy@c-s.fr> To: Benjamin Herrenschmidt <benh@kernel.crashing.org>, Paul Mackerras <paulus@samba.org>, Michael Ellerman <mpe@ellerman.id.au>, dja@axtens.net Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mm@kvack.org Subject: [PATCH v5 12/17] powerpc/8xx: move DataStoreTLBMiss perf handler Date: Sat, 21 Dec 2019 08:32:33 +0000 (UTC) [thread overview] Message-ID: <75dd28b04efd2cbdbf01153173d99c11cdff2f08.1576916812.git.christophe.leroy@c-s.fr> (raw) In-Reply-To: <cover.1576916812.git.christophe.leroy@c-s.fr> Move DataStoreTLBMiss perf handler in order to cope with future growing exception prolog. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> --- arch/powerpc/kernel/head_8xx.S | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index 5aa63693f790..1e718e47fe3c 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -166,18 +166,6 @@ SystemCall: */ EXCEPTION(0x1000, SoftEmu, program_check_exception, EXC_XFER_STD) -/* Called from DataStoreTLBMiss when perf TLB misses events are activated */ -#ifdef CONFIG_PERF_EVENTS - patch_site 0f, patch__dtlbmiss_perf -0: lwz r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0) - addi r10, r10, 1 - stw r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0) - mfspr r10, SPRN_DAR - mtspr SPRN_DAR, r11 /* Tag DAR */ - mfspr r11, SPRN_M_TW - rfi -#endif - . = 0x1100 /* * For the MPC8xx, this is a software tablewalk to load the instruction @@ -486,6 +474,18 @@ DARFixed:/* Return from dcbx instruction bug workaround */ /* 0x300 is DataAccess exception, needed by bad_page_fault() */ EXC_XFER_LITE(0x300, handle_page_fault) +/* Called from DataStoreTLBMiss when perf TLB misses events are activated */ +#ifdef CONFIG_PERF_EVENTS + patch_site 0f, patch__dtlbmiss_perf +0: lwz r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0) + addi r10, r10, 1 + stw r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0) + mfspr r10, SPRN_DAR + mtspr SPRN_DAR, r11 /* Tag DAR */ + mfspr r11, SPRN_M_TW + rfi +#endif + /* On the MPC8xx, these next four traps are used for development * support of breakpoints and such. Someday I will get around to * using them. -- 2.13.3
WARNING: multiple messages have this Message-ID (diff)
From: Christophe Leroy <christophe.leroy@c-s.fr> To: Benjamin Herrenschmidt <benh@kernel.crashing.org>, Paul Mackerras <paulus@samba.org>, Michael Ellerman <mpe@ellerman.id.au>, dja@axtens.net Cc: linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 12/17] powerpc/8xx: move DataStoreTLBMiss perf handler Date: Sat, 21 Dec 2019 08:32:33 +0000 (UTC) [thread overview] Message-ID: <75dd28b04efd2cbdbf01153173d99c11cdff2f08.1576916812.git.christophe.leroy@c-s.fr> (raw) In-Reply-To: <cover.1576916812.git.christophe.leroy@c-s.fr> Move DataStoreTLBMiss perf handler in order to cope with future growing exception prolog. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> --- arch/powerpc/kernel/head_8xx.S | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index 5aa63693f790..1e718e47fe3c 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -166,18 +166,6 @@ SystemCall: */ EXCEPTION(0x1000, SoftEmu, program_check_exception, EXC_XFER_STD) -/* Called from DataStoreTLBMiss when perf TLB misses events are activated */ -#ifdef CONFIG_PERF_EVENTS - patch_site 0f, patch__dtlbmiss_perf -0: lwz r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0) - addi r10, r10, 1 - stw r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0) - mfspr r10, SPRN_DAR - mtspr SPRN_DAR, r11 /* Tag DAR */ - mfspr r11, SPRN_M_TW - rfi -#endif - . = 0x1100 /* * For the MPC8xx, this is a software tablewalk to load the instruction @@ -486,6 +474,18 @@ DARFixed:/* Return from dcbx instruction bug workaround */ /* 0x300 is DataAccess exception, needed by bad_page_fault() */ EXC_XFER_LITE(0x300, handle_page_fault) +/* Called from DataStoreTLBMiss when perf TLB misses events are activated */ +#ifdef CONFIG_PERF_EVENTS + patch_site 0f, patch__dtlbmiss_perf +0: lwz r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0) + addi r10, r10, 1 + stw r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0) + mfspr r10, SPRN_DAR + mtspr SPRN_DAR, r11 /* Tag DAR */ + mfspr r11, SPRN_M_TW + rfi +#endif + /* On the MPC8xx, these next four traps are used for development * support of breakpoints and such. Someday I will get around to * using them. -- 2.13.3
next prev parent reply other threads:[~2019-12-21 8:33 UTC|newest] Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-12-21 8:32 [PATCH v5 00/17] Enable CONFIG_VMAP_STACK on PPC32 Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2019-12-21 8:32 ` [PATCH v5 01/17] powerpc/32: replace MTMSRD() by mtmsr Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2020-01-29 5:17 ` Michael Ellerman 2019-12-21 8:32 ` [PATCH v5 02/17] powerpc/32: Add EXCEPTION_PROLOG_0 in head_32.h Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2019-12-21 8:32 ` [PATCH v5 03/17] powerpc/32: save DEAR/DAR before calling handle_page_fault Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2019-12-21 8:32 ` [PATCH v5 04/17] powerpc/32: move MSR_PR test into EXCEPTION_PROLOG_0 Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2019-12-21 8:32 ` [PATCH v5 05/17] powerpc/32: add a macro to get and/or save DAR and DSISR on stack Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2019-12-21 8:32 ` [PATCH v5 06/17] powerpc/32: prepare for CONFIG_VMAP_STACK Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2019-12-21 8:32 ` [PATCH v5 07/17] powerpc: align stack to 2 * THREAD_SIZE with VMAP_STACK Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2019-12-21 8:32 ` [PATCH v5 08/17] powerpc/32: Add early stack overflow detection with VMAP stack Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2019-12-21 8:32 ` [PATCH v5 09/17] powerpc/32: Use vmapped stacks for interrupts Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2019-12-21 8:32 ` [PATCH v5 10/17] powerpc/8xx: Use alternative scratch registers in DTLB miss handler Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2019-12-21 8:32 ` [PATCH v5 11/17] powerpc/8xx: drop exception entries for non-existing exceptions Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy [this message] 2019-12-21 8:32 ` [PATCH v5 12/17] powerpc/8xx: move DataStoreTLBMiss perf handler Christophe Leroy 2019-12-21 8:32 ` [PATCH v5 13/17] powerpc/8xx: split breakpoint exception Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2019-12-21 8:32 ` [PATCH v5 14/17] powerpc/8xx: Enable CONFIG_VMAP_STACK Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2019-12-21 8:32 ` [PATCH v5 15/17] powerpc/32s: reorganise DSI handler Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2019-12-21 8:32 ` [PATCH v5 16/17] powerpc/32s: avoid crossing page boundary while changing SRR0/1 Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2019-12-21 8:32 ` [PATCH v5 17/17] powerpc/32s: Enable CONFIG_VMAP_STACK Christophe Leroy 2019-12-21 8:32 ` Christophe Leroy 2020-01-18 12:46 ` Michael Ellerman 2020-01-18 12:46 ` Michael Ellerman 2020-02-06 20:31 ` Guenter Roeck 2020-02-06 20:31 ` Guenter Roeck 2020-02-07 6:13 ` Christophe Leroy 2020-02-07 6:13 ` Christophe Leroy 2020-02-07 8:28 ` Christophe Leroy 2020-02-07 8:28 ` Christophe Leroy 2020-02-07 13:08 ` Guenter Roeck 2020-02-07 13:08 ` Guenter Roeck 2020-02-07 13:29 ` Christophe Leroy 2020-02-07 13:29 ` Christophe Leroy 2020-02-07 13:44 ` Guenter Roeck 2020-02-07 13:44 ` Guenter Roeck 2020-02-07 17:16 ` Christophe Leroy 2020-02-07 17:16 ` Christophe Leroy
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