From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
Geert Uytterhoeven <geert.uytterhoeven@gmail.com>,
Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
linux-gpio@vger.kernel.org
Subject: [PATCH v4 18/23] pinctrl: renesas: r8a779g0: add missing TPU0TOx_A
Date: Fri, 1 Jul 2022 01:40:09 +0000 [thread overview]
Message-ID: <87r135sj9j.wl-kuninori.morimoto.gx@renesas.com> (raw)
In-Reply-To: <87h741ty20.wl-kuninori.morimoto.gx@renesas.com>
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
This patch adds missing TPU0TOx_A
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/pinctrl/renesas/pfc-r8a779g0.c | 59 ++++++++++++++++++++++----
1 file changed, 51 insertions(+), 8 deletions(-)
diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c
index c9331c008802..c6a9624f90fb 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
@@ -327,15 +327,15 @@
/* IP3SR1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
#define IP3SR1_3_0 FM(HRX3) FM(SCK3_A) FM(MSIOF4_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP3SR1_7_4 FM(HSCK3) FM(CTS3_N_A) FM(MSIOF4_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP3SR1_11_8 FM(HRTS3_N) FM(RTS3_N_A) FM(MSIOF4_TXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP3SR1_7_4 FM(HSCK3) FM(CTS3_N_A) FM(MSIOF4_SCK) FM(TPU0TO0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP3SR1_11_8 FM(HRTS3_N) FM(RTS3_N_A) FM(MSIOF4_TXD) FM(TPU0TO1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP3SR1_15_12 FM(HCTS3_N) FM(RX3_A) FM(MSIOF4_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP3SR1_19_16 FM(HTX3) FM(TX3_A) FM(MSIOF4_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* SR2 */
/* IP0SR2 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
-#define IP0SR2_3_0 FM(FXR_TXDA) FM(CANFD1_TX) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR2_7_4 FM(FXR_TXENA_N) FM(CANFD1_RX) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR2_3_0 FM(FXR_TXDA) FM(CANFD1_TX) FM(TPU0TO2_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR2_7_4 FM(FXR_TXENA_N) FM(CANFD1_RX) FM(TPU0TO3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR2_11_8 FM(RXDA_EXTFXR) FM(CANFD5_TX) FM(IRQ5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR2_15_12 FM(CLK_EXTFXR) FM(CANFD5_RX) FM(IRQ4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR2_19_16 FM(RXDB_EXTFXR) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -890,10 +890,12 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP3SR1_7_4, HSCK3),
PINMUX_IPSR_GPSR(IP3SR1_7_4, CTS3_N_A),
PINMUX_IPSR_GPSR(IP3SR1_7_4, MSIOF4_SCK),
+ PINMUX_IPSR_GPSR(IP3SR1_7_4, TPU0TO0_A),
PINMUX_IPSR_GPSR(IP3SR1_11_8, HRTS3_N),
PINMUX_IPSR_GPSR(IP3SR1_11_8, RTS3_N_A),
PINMUX_IPSR_GPSR(IP3SR1_11_8, MSIOF4_TXD),
+ PINMUX_IPSR_GPSR(IP3SR1_11_8, TPU0TO1_A),
PINMUX_IPSR_GPSR(IP3SR1_15_12, HCTS3_N),
PINMUX_IPSR_GPSR(IP3SR1_15_12, RX3_A),
@@ -906,9 +908,11 @@ static const u16 pinmux_data[] = {
/* IP0SR2 */
PINMUX_IPSR_GPSR(IP0SR2_3_0, FXR_TXDA),
PINMUX_IPSR_GPSR(IP0SR2_3_0, CANFD1_TX),
+ PINMUX_IPSR_GPSR(IP0SR2_3_0, TPU0TO2_A),
PINMUX_IPSR_GPSR(IP0SR2_7_4, FXR_TXENA_N),
PINMUX_IPSR_GPSR(IP0SR2_7_4, CANFD1_RX),
+ PINMUX_IPSR_GPSR(IP0SR2_7_4, TPU0TO3_A),
PINMUX_IPSR_GPSR(IP0SR2_11_8, RXDA_EXTFXR),
PINMUX_IPSR_GPSR(IP0SR2_11_8, CANFD5_TX),
@@ -2328,6 +2332,36 @@ static const unsigned int tpu_to3_mux[] = {
TPU0TO3_MARK,
};
+/* - TPU_A ------------------------------------------------------------------- */
+static const unsigned int tpu_to0_a_pins[] = {
+ /* TPU0TO0_A */
+ RCAR_GP_PIN(1, 25),
+};
+static const unsigned int tpu_to0_a_mux[] = {
+ TPU0TO0_A_MARK,
+};
+static const unsigned int tpu_to1_a_pins[] = {
+ /* TPU0TO1_A */
+ RCAR_GP_PIN(1, 26),
+};
+static const unsigned int tpu_to1_a_mux[] = {
+ TPU0TO1_A_MARK,
+};
+static const unsigned int tpu_to2_a_pins[] = {
+ /* TPU0TO2_A */
+ RCAR_GP_PIN(2, 0),
+};
+static const unsigned int tpu_to2_a_mux[] = {
+ TPU0TO2_A_MARK,
+};
+static const unsigned int tpu_to3_a_pins[] = {
+ /* TPU0TO3_A */
+ RCAR_GP_PIN(2, 1),
+};
+static const unsigned int tpu_to3_a_mux[] = {
+ TPU0TO3_A_MARK,
+};
+
/* - TSN0 ------------------------------------------------ */
static const unsigned int tsn0_link_pins[] = {
/* TSN0_LINK */
@@ -2558,10 +2592,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(scif4_ctrl),
SH_PFC_PIN_GROUP(scif_clk),
- SH_PFC_PIN_GROUP(tpu_to0),
- SH_PFC_PIN_GROUP(tpu_to1),
- SH_PFC_PIN_GROUP(tpu_to2),
- SH_PFC_PIN_GROUP(tpu_to3),
+ SH_PFC_PIN_GROUP(tpu_to0), /* suffix might be updated */
+ SH_PFC_PIN_GROUP(tpu_to0_a), /* suffix might be updated */
+ SH_PFC_PIN_GROUP(tpu_to1), /* suffix might be updated */
+ SH_PFC_PIN_GROUP(tpu_to1_a), /* suffix might be updated */
+ SH_PFC_PIN_GROUP(tpu_to2), /* suffix might be updated */
+ SH_PFC_PIN_GROUP(tpu_to2_a), /* suffix might be updated */
+ SH_PFC_PIN_GROUP(tpu_to3), /* suffix might be updated */
+ SH_PFC_PIN_GROUP(tpu_to3_a), /* suffix might be updated */
SH_PFC_PIN_GROUP(tsn0_link),
SH_PFC_PIN_GROUP(tsn0_phy_int),
@@ -2861,10 +2899,15 @@ static const char * const scif_clk_groups[] = {
};
static const char * const tpu_groups[] = {
+ /* suffix might be updated */
"tpu_to0",
+ "tpu_to0_a",
"tpu_to1",
+ "tpu_to1_a",
"tpu_to2",
+ "tpu_to2_a",
"tpu_to3",
+ "tpu_to3_a",
};
static const char * const tsn0_groups[] = {
--
2.25.1
next prev parent reply other threads:[~2022-07-01 1:40 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-01 1:35 [PATCH v4 00/21] pinctrl: renesas: r8a779g0: Add pins, groups and functions Kuninori Morimoto
2022-07-01 1:35 ` [PATCH v4 01/23] dt-bindings: pinctrl: renesas,pfc: Document r8a779g0 support Kuninori Morimoto
2022-07-04 15:40 ` Geert Uytterhoeven
2022-07-01 1:36 ` [PATCH v4 02/23] pinctrl: renesas: Add PORT_GP_CFG_13 macros Kuninori Morimoto
2022-07-04 15:40 ` Geert Uytterhoeven
2022-07-01 1:36 ` [PATCH v4 03/23] pinctrl: renesas: Initial R8A779G0 (V4H) PFC support Kuninori Morimoto
2022-07-04 15:41 ` Geert Uytterhoeven
2022-07-01 1:36 ` [PATCH v4 04/23] pinctrl: renesas: r8a779g0: Add pins, groups and functions Kuninori Morimoto
2022-07-04 15:42 ` Geert Uytterhoeven
2022-07-01 1:36 ` [PATCH v4 05/23] pinctrl: renesas: r8a779g0: fixup MODSEL8 Kuninori Morimoto
2022-07-04 15:42 ` Geert Uytterhoeven
2022-07-01 1:36 ` [PATCH v4 06/23] pinctrl: renesas: r8a779g0: remove not used NOGP definitions Kuninori Morimoto
2022-07-04 15:42 ` Geert Uytterhoeven
2022-07-01 1:37 ` [PATCH v4 07/23] pinctrl: renesas: r8a779g0: remove not used IPxSRx definitions Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:37 ` [PATCH v4 08/23] pinctrl: renesas: r8a779g0: remove not used MOD_SELx definitions Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:37 ` [PATCH v4 09/23] pinctrl: renesas: r8a779g0: tidyup ioctrl_regs Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:38 ` [PATCH v4 10/23] pinctrl: renesas: r8a779g0: tidyup POC1 voltage Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:39 ` [PATCH v4 11/23] pinctrl: renesas: r8a779g0: add missing TCLKx_A/TCLK_B/TCLKx_X Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:39 ` [PATCH v4 12/23] pinctrl: renesas: r8a779g0: add missing IRQx_A/IRQx_B Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:39 ` [PATCH v4 13/23] pinctrl: renesas: r8a779g0: add missing HSCIF3_A Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:39 ` [PATCH v4 14/23] pinctrl: renesas: r8a779g0: add missing HSCIF1_X Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:39 ` [PATCH v4 15/23] pinctrl: renesas: r8a779g0: add missing SCIF3 Kuninori Morimoto
2022-07-04 15:44 ` Geert Uytterhoeven
2022-07-01 1:39 ` [PATCH v4 16/23] pinctrl: renesas: r8a779g0: add missing SCIF1_X Kuninori Morimoto
2022-07-04 15:44 ` Geert Uytterhoeven
2022-07-01 1:39 ` [PATCH v4 17/23] pinctrl: renesas: r8a779g0: add missing CANFD5_B Kuninori Morimoto
2022-07-04 15:44 ` Geert Uytterhoeven
2022-07-01 1:40 ` Kuninori Morimoto [this message]
2022-07-04 15:44 ` [PATCH v4 18/23] pinctrl: renesas: r8a779g0: add missing TPU0TOx_A Geert Uytterhoeven
2022-07-01 1:40 ` [PATCH v4 19/23] pinctrl: renesas: r8a779g0: add missing FlexRay Kuninori Morimoto
2022-07-04 15:44 ` Geert Uytterhoeven
2022-07-01 1:40 ` [PATCH v4 20/23] pinctrl: renesas: r8a779g0: add missing PWM Kuninori Morimoto
2022-07-04 15:44 ` Geert Uytterhoeven
2022-07-01 1:40 ` [PATCH v4 21/23] pinctrl: renesas: r8a779g0: add missing ERROROUTC_A Kuninori Morimoto
2022-07-04 15:45 ` Geert Uytterhoeven
2022-07-01 1:40 ` [PATCH v4 22/23] pinctrl: renesas: r8a779g0: add missing MODSELx for TSN0 Kuninori Morimoto
2022-07-04 15:45 ` Geert Uytterhoeven
2022-07-01 1:41 ` [PATCH v4 23/23] pinctrl: renesas: r8a779g0: add missing MODSELx for AVBx Kuninori Morimoto
2022-07-04 15:45 ` Geert Uytterhoeven
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