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From: Akira Tsukamoto <akira.tsukamoto@gmail.com>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: [PATCH 2/5] riscv: __asm_to/copy_from_user: Adding byte copy first
Date: Sat, 19 Jun 2021 20:35:39 +0900	[thread overview]
Message-ID: <98088fde-cdb2-6410-8d11-7c8ca984d3c3@gmail.com> (raw)
In-Reply-To: <5a5c07ac-8c11-79d3-46a3-a255d4148f76@gmail.com>


Typical load and store loop.
It is used for mainly copying the remainder in one byte at a time.

Signed-off-by: Akira Tsukamoto <akira.tsukamoto@gmail.com>
---
 arch/riscv/lib/uaccess.S | 34 ++++++++++++++++++++++++++++++++--
 1 file changed, 32 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/lib/uaccess.S b/arch/riscv/lib/uaccess.S
index da9536e1e9cb..be1810077f9a 100644
--- a/arch/riscv/lib/uaccess.S
+++ b/arch/riscv/lib/uaccess.S
@@ -19,9 +19,39 @@ ENTRY(__asm_copy_from_user)
 	li t6, SR_SUM
 	csrs CSR_STATUS, t6
 
+	/* Save for return value */
+	mv	t5, a2
+
+	/*
+	 * Register allocation for code below:
+	 * a0 - start of uncopied dst
+	 * a1 - start of uncopied src
+	 * a2 - size
+	 * t0 - end of uncopied dst
+	 */
+	add	t0, a0, a2
+	bgtu	a0, t0, 5f
+
+.Lbyte_copy_tail:
+	/*
+	 * Byte copy anything left.
+	 *
+	 * a0 - start of remaining dst
+	 * a1 - start of remaining src
+	 * t0 - end of remaining dst
+	 */
+	bgeu	a0, t0, 5f
+4:
+	fixup lb      a5, 0(a1), 10f
+	addi	a1, a1, 1	/* src */
+	fixup sb      a5, 0(a0), 10f
+	addi	a0, a0, 1	/* dst */
+	bltu	a0, t0, 4b	/* t0 - end of dst */
+
+5:
 	/* Disable access to user memory */
 	csrc CSR_STATUS, t6
-	li a0, 0
+	li	a0, 0
 	ret
 ENDPROC(__asm_copy_to_user)
 ENDPROC(__asm_copy_from_user)
@@ -77,7 +107,7 @@ EXPORT_SYMBOL(__clear_user)
 10:
 	/* Disable access to user memory */
 	csrs CSR_STATUS, t6
-	mv a0, a2
+	mv a0, t5
 	ret
 11:
 	csrs CSR_STATUS, t6
-- 
2.17.1



WARNING: multiple messages have this Message-ID (diff)
From: Akira Tsukamoto <akira.tsukamoto@gmail.com>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: [PATCH 2/5] riscv: __asm_to/copy_from_user: Adding byte copy first
Date: Sat, 19 Jun 2021 20:35:39 +0900	[thread overview]
Message-ID: <98088fde-cdb2-6410-8d11-7c8ca984d3c3@gmail.com> (raw)
In-Reply-To: <5a5c07ac-8c11-79d3-46a3-a255d4148f76@gmail.com>


Typical load and store loop.
It is used for mainly copying the remainder in one byte at a time.

Signed-off-by: Akira Tsukamoto <akira.tsukamoto@gmail.com>
---
 arch/riscv/lib/uaccess.S | 34 ++++++++++++++++++++++++++++++++--
 1 file changed, 32 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/lib/uaccess.S b/arch/riscv/lib/uaccess.S
index da9536e1e9cb..be1810077f9a 100644
--- a/arch/riscv/lib/uaccess.S
+++ b/arch/riscv/lib/uaccess.S
@@ -19,9 +19,39 @@ ENTRY(__asm_copy_from_user)
 	li t6, SR_SUM
 	csrs CSR_STATUS, t6
 
+	/* Save for return value */
+	mv	t5, a2
+
+	/*
+	 * Register allocation for code below:
+	 * a0 - start of uncopied dst
+	 * a1 - start of uncopied src
+	 * a2 - size
+	 * t0 - end of uncopied dst
+	 */
+	add	t0, a0, a2
+	bgtu	a0, t0, 5f
+
+.Lbyte_copy_tail:
+	/*
+	 * Byte copy anything left.
+	 *
+	 * a0 - start of remaining dst
+	 * a1 - start of remaining src
+	 * t0 - end of remaining dst
+	 */
+	bgeu	a0, t0, 5f
+4:
+	fixup lb      a5, 0(a1), 10f
+	addi	a1, a1, 1	/* src */
+	fixup sb      a5, 0(a0), 10f
+	addi	a0, a0, 1	/* dst */
+	bltu	a0, t0, 4b	/* t0 - end of dst */
+
+5:
 	/* Disable access to user memory */
 	csrc CSR_STATUS, t6
-	li a0, 0
+	li	a0, 0
 	ret
 ENDPROC(__asm_copy_to_user)
 ENDPROC(__asm_copy_from_user)
@@ -77,7 +107,7 @@ EXPORT_SYMBOL(__clear_user)
 10:
 	/* Disable access to user memory */
 	csrs CSR_STATUS, t6
-	mv a0, a2
+	mv a0, t5
 	ret
 11:
 	csrs CSR_STATUS, t6
-- 
2.17.1



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  parent reply	other threads:[~2021-06-19 11:35 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-19 11:21 [PATCH v2 0/5] riscv: improving uaccess with logs from network bench Akira Tsukamoto
2021-06-19 11:21 ` Akira Tsukamoto
2021-06-19 11:34 ` [PATCH 1/5] riscv: __asm_to/copy_from_user: delete existing code Akira Tsukamoto
2021-06-19 11:34   ` Akira Tsukamoto
2021-06-21 11:45   ` David Laight
2021-06-21 11:45     ` David Laight
2021-06-21 13:55     ` Akira Tsukamoto
2021-06-21 13:55       ` Akira Tsukamoto
2021-06-19 11:35 ` Akira Tsukamoto [this message]
2021-06-19 11:35   ` [PATCH 2/5] riscv: __asm_to/copy_from_user: Adding byte copy first Akira Tsukamoto
2021-06-19 11:36 ` [PATCH 3/5] riscv: __asm_to/copy_from_user: Copy until dst is aligned Akira Tsukamoto
2021-06-19 11:36   ` Akira Tsukamoto
2021-06-19 11:37 ` [PATCH 4/5] riscv: __asm_to/copy_from_user: Bulk copy while shifting Akira Tsukamoto
2021-06-19 11:37   ` Akira Tsukamoto
2021-06-19 11:43 ` [PATCH 5/5] riscv: __asm_to/copy_from_user: Bulk copy when both src, dst are aligned Akira Tsukamoto
2021-06-19 11:43   ` Akira Tsukamoto
2021-06-21 11:55   ` David Laight
2021-06-21 11:55     ` David Laight
2021-06-21 14:13     ` Akira Tsukamoto
2021-06-21 14:13       ` Akira Tsukamoto
2021-06-20 10:02 ` [PATCH v2 0/5] riscv: improving uaccess with logs from network bench Ben Dooks
2021-06-20 10:02   ` Ben Dooks
2021-06-20 16:36   ` Akira Tsukamoto
2021-06-20 16:36     ` Akira Tsukamoto
2021-06-22  8:30 ` Ben Dooks
2021-06-22  8:30   ` Ben Dooks
2021-06-22 12:05   ` Akira Tsukamoto
2021-06-22 12:05     ` Akira Tsukamoto
2021-06-22 17:45     ` Ben Dooks
2021-06-22 17:45       ` Ben Dooks
2021-07-12 21:24 ` Ben Dooks
2021-07-12 21:24   ` Ben Dooks

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