Re: Find bugs in i915 driver

["Xu, Anhua" <anhua.xu@intel.com>]

Sorry, Deniel/Greg, late response for your email because of a busy work last work. 
I will response to you guys ASAP :), below is the updated patch: 


>From 33eb95a3a711b2354985361ff208ea150a5ba235 Mon Sep 17 00:00:00 2001
From: Xu Anhua <anhua.xu@intel.com>
Date: Tue, 31 Jul 2012 17:16:50 +0800
Subject: [PATCH] drm/i915: fix wrong order of parameters in port checking functions

Wrong order of parameters passed-in when calling hdmi/adpa
/lvds_pipe_enabled(), 2nd and 3rd parameters are reversed.
This bug was indroduced by commit
1519b9956eb4b4180fa3f47c73341463cdcfaa37
The reachable tag for this commit is v3.1-rc1-3-g1519b99

Signed-off-by: Anhua Xu <anhua.xu@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f615976..5fc8c8d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1383,7 +1383,7 @@ static void assert_pch_hdmi_disabled(struct drm_i915_private *dev_priv,
 				     enum pipe pipe, int reg)
 {
 	u32 val = I915_READ(reg);
-	WARN(hdmi_pipe_enabled(dev_priv, val, pipe),
+	WARN(hdmi_pipe_enabled(dev_priv, pipe, val),
 	     "PCH HDMI (0x%08x) enabled on transcoder %c, should be disabled\n",
 	     reg, pipe_name(pipe));
 
@@ -1403,13 +1403,13 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv,
 
 	reg = PCH_ADPA;
 	val = I915_READ(reg);
-	WARN(adpa_pipe_enabled(dev_priv, val, pipe),
+	WARN(adpa_pipe_enabled(dev_priv, pipe, val),
 	     "PCH VGA enabled on transcoder %c, should be disabled\n",
 	     pipe_name(pipe));
 
 	reg = PCH_LVDS;
 	val = I915_READ(reg);
-	WARN(lvds_pipe_enabled(dev_priv, val, pipe),
+	WARN(lvds_pipe_enabled(dev_priv, pipe, val),
 	     "PCH LVDS enabled on transcoder %c, should be disabled\n",
 	     pipe_name(pipe));
 
@@ -1871,7 +1871,7 @@ static void disable_pch_hdmi(struct drm_i915_private *dev_priv,
 			     enum pipe pipe, int reg)
 {
 	u32 val = I915_READ(reg);
-	if (hdmi_pipe_enabled(dev_priv, val, pipe)) {
+	if (hdmi_pipe_enabled(dev_priv, pipe, val)) {
 		DRM_DEBUG_KMS("Disabling pch HDMI %x on pipe %d\n",
 			      reg, pipe);
 		I915_WRITE(reg, val & ~PORT_ENABLE);
@@ -1893,12 +1893,12 @@ static void intel_disable_pch_ports(struct drm_i915_private *dev_priv,
 
 	reg = PCH_ADPA;
 	val = I915_READ(reg);
-	if (adpa_pipe_enabled(dev_priv, val, pipe))
+	if (adpa_pipe_enabled(dev_priv, pipe, val))
 		I915_WRITE(reg, val & ~ADPA_DAC_ENABLE);
 
 	reg = PCH_LVDS;
 	val = I915_READ(reg);
-	if (lvds_pipe_enabled(dev_priv, val, pipe)) {
+	if (lvds_pipe_enabled(dev_priv, pipe, val)) {
 		DRM_DEBUG_KMS("disable lvds on pipe %d val 0x%08x\n", pipe, val);
 		I915_WRITE(reg, val & ~LVDS_PORT_EN);
 		POSTING_READ(reg);
-- 
1.7.1



> -----Original Message-----
> From: Daniel Vetter [mailto:daniel.vetter@ffwll.ch] On Behalf Of Daniel Vetter
> Sent: Friday, August 10, 2012 7:41 PM
> To: Greg KH
> Cc: Xu, Anhua; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] Find bugs in i915 driver
> 
> On Tue, Jul 31, 2012 at 07:23:18AM -0700, Greg KH wrote:
> > On Tue, Jul 31, 2012 at 09:17:15AM +0000, Xu, Anhua wrote:
> > > Thanks Chris. I add this in the the commit description. The updated patch is
> below:
> > >
> > > commit 71c3ff04834a01c81a5843996b87397273eb538d
> > > Author: Xu Anhua <anhua.xu@intel.com>
> > > Date:   Tue Jul 31 17:16:50 2012 +0800
> > >
> > >     i915: make the parameters passed-in coherent with functions'
> > >     	definition when calling hdmi/adpa/lvds_pipe_enabled()
> > >
> > >     This bug is indroduced by commit
> 1519b9956eb4b4180fa3f47c73341463cdcfaa37
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> >
> > No signed-off-by?  No tag for inclusion in the stable tree?
> >
> > This patch isn't going very far :(
> 
> Xu Anhua, can you please update your patch with signed-off-by and cc:
> stable? Also, your commit headline is a bit long, it should fit on one
> line of at most 70 chars (or thereabouts).
> -Daniel
> --
> Daniel Vetter
> Mail: daniel@ffwll.ch
> Mobile: +41 (0)79 365 57 48