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From: Zong Li <zong.li@sifive.com>
To: palmer@dabbelt.com, Alistair.Francis@wdc.com, bmeng.cn@gmail.com,
	sagark@eecs.berkeley.edu, kbastian@mail.uni-paderborn.de,
	qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: Bin Meng <bin.meng@windriver.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Zong Li <zong.li@sifive.com>
Subject: [PATCH v6 1/4] target/riscv: Fix the range of pmpcfg of CSR funcion table
Date: Tue, 28 Jul 2020 16:26:14 +0800	[thread overview]
Message-ID: <ae2d79b898dad67f9be96ce0adb1b9a5984fbec0.1595924470.git.zong.li@sifive.com> (raw)
In-Reply-To: <cover.1595924470.git.zong.li@sifive.com>

The range of Physical Memory Protection should be from CSR_PMPCFG0
to CSR_PMPCFG3, not to CSR_PMPADDR9.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
---
 target/riscv/csr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index ac01c835e1..6a96a01b1c 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -1353,7 +1353,7 @@ static riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
     [CSR_MTINST] =              { hmode,   read_mtinst,      write_mtinst     },
 
     /* Physical Memory Protection */
-    [CSR_PMPCFG0  ... CSR_PMPADDR9] =  { pmp,   read_pmpcfg,  write_pmpcfg   },
+    [CSR_PMPCFG0  ... CSR_PMPCFG3]   = { pmp,   read_pmpcfg,  write_pmpcfg   },
     [CSR_PMPADDR0 ... CSR_PMPADDR15] = { pmp,   read_pmpaddr, write_pmpaddr  },
 
     /* Performance Counters */
-- 
2.27.0



WARNING: multiple messages have this Message-ID (diff)
From: Zong Li <zong.li@sifive.com>
To: palmer@dabbelt.com, Alistair.Francis@wdc.com, bmeng.cn@gmail.com,
	sagark@eecs.berkeley.edu, kbastian@mail.uni-paderborn.de,
	qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: Zong Li <zong.li@sifive.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Bin Meng <bin.meng@windriver.com>
Subject: [PATCH v6 1/4] target/riscv: Fix the range of pmpcfg of CSR funcion table
Date: Tue, 28 Jul 2020 16:26:14 +0800	[thread overview]
Message-ID: <ae2d79b898dad67f9be96ce0adb1b9a5984fbec0.1595924470.git.zong.li@sifive.com> (raw)
In-Reply-To: <cover.1595924470.git.zong.li@sifive.com>

The range of Physical Memory Protection should be from CSR_PMPCFG0
to CSR_PMPCFG3, not to CSR_PMPADDR9.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
---
 target/riscv/csr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index ac01c835e1..6a96a01b1c 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -1353,7 +1353,7 @@ static riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
     [CSR_MTINST] =              { hmode,   read_mtinst,      write_mtinst     },
 
     /* Physical Memory Protection */
-    [CSR_PMPCFG0  ... CSR_PMPADDR9] =  { pmp,   read_pmpcfg,  write_pmpcfg   },
+    [CSR_PMPCFG0  ... CSR_PMPCFG3]   = { pmp,   read_pmpcfg,  write_pmpcfg   },
     [CSR_PMPADDR0 ... CSR_PMPADDR15] = { pmp,   read_pmpaddr, write_pmpaddr  },
 
     /* Performance Counters */
-- 
2.27.0



  reply	other threads:[~2020-07-28  8:27 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-28  8:26 [PATCH v6 0/4] Fix some PMP implementations Zong Li
2020-07-28  8:26 ` Zong Li [this message]
2020-07-28  8:26   ` [PATCH v6 1/4] target/riscv: Fix the range of pmpcfg of CSR funcion table Zong Li
2020-07-28  8:26 ` [PATCH v6 2/4] target/riscv/pmp.c: Fix the index offset on RV64 Zong Li
2020-07-28  8:26   ` Zong Li
2020-07-28  8:26 ` [PATCH v6 3/4] target/riscv: Fix the translation of physical address Zong Li
2020-07-28 23:55   ` Alistair Francis
2020-07-28 23:55     ` Alistair Francis
2020-07-28  8:26 ` [PATCH v6 4/4] target/riscv: Change the TLB page size depends on PMP entries Zong Li
2020-08-05  2:43   ` Zong Li
2020-08-12 15:11   ` Alistair Francis
2020-08-12 15:11     ` Alistair Francis
2020-08-13  3:04     ` Zong Li
2020-08-13  3:04       ` Zong Li
2020-08-13 15:02       ` Alistair Francis
2020-08-13 15:02         ` Alistair Francis

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