From: Michal Simek <michal.simek@xilinx.com>
To: linux-kernel@vger.kernel.org, monstr@monstr.eu,
michal.simek@xilinx.com, git@xilinx.com
Cc: Krzysztof Kozlowski <krzk@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 03/12] arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111
Date: Thu, 21 Jan 2021 11:26:51 +0100 [thread overview]
Message-ID: <b93f13297684704a60e8d7274009a20aa98d14f7.1611224800.git.michal.simek@xilinx.com> (raw)
In-Reply-To: <cover.1611224800.git.michal.simek@xilinx.com>
Enable si5341 driver is the main chip for providing preprogrammed clocks
for the whole platform.
# cat /sys/kernel/debug/clk/clk_summary
...
refhdmi 1 1 0 114285000 0 0 50000
xtal_0 0 0 0 114285000 0 0 50000
pll_0 0 0 0 40731174000000 0 0 50000
clk1_0 0 0 0 27000000 0 0 50000
clk0_0 0 0 0 27000000 0 0 50000
ref48M 1 2 0 48000000 0 0 50000
si5341 0 4 0 14000000 0 0 50000
clock-generator.N4 0 0 0 0 0 0 50000
clock-generator.N3 0 1 0 733260000 0 0 50000
clock-generator.9 0 1 0 33330000 0 0 50000
clock-generator.N2 0 1 0 104000000 0 0 50000
clock-generator.2 0 1 0 26000000 0 0 50000
clock-generator.N1 0 2 0 594000000 0 0 50000
clock-generator.7 0 1 0 74250000 0 0 50000
clock-generator.0 0 1 0 27000000 0 0 50000
clock-generator.N0 0 4 0 1000000000 0 0 50000
clock-generator.8 0 0 0 0 0 0 50000
clock-generator.6 0 1 0 125000000 0 0 50000
clock-generator.5 0 1 0 100000000 0 0 50000
clock-generator.4 0 1 0 100000000 0 0 50000
clock-generator.3 0 1 0 125000000 0 0 50000
clock-generator.1 0 0 0 0 0 0 50000
...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
.../boot/dts/xilinx/zynqmp-zcu102-revA.dts | 56 ++++++++++++++++++-
.../boot/dts/xilinx/zynqmp-zcu106-revA.dts | 45 +++++++++++++++
.../boot/dts/xilinx/zynqmp-zcu111-revA.dts | 46 ++++++++++++++-
3 files changed, 145 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
index 5ff7ab665374..68c2ad30d62d 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
@@ -133,6 +133,13 @@ ina226-u75 {
io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>;
};
+ /* 48MHz reference crystal */
+ ref48: ref48M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ };
+
refhdmi: refhdmi {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -489,9 +496,56 @@ i2c@1 {
#size-cells = <0>;
reg = <1>;
si5341: clock-generator@36 { /* SI5341 - u69 */
+ compatible = "silabs,si5341";
reg = <0x36>;
- };
+ #clock-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&ref48>;
+ clock-names = "xtal";
+ clock-output-names = "si5341";
+ si5341_0: out@0 {
+ /* refclk0 for PS-GT, used for DP */
+ reg = <0>;
+ always-on;
+ };
+ si5341_2: out@2 {
+ /* refclk2 for PS-GT, used for USB3 */
+ reg = <2>;
+ always-on;
+ };
+ si5341_3: out@3 {
+ /* refclk3 for PS-GT, used for SATA */
+ reg = <3>;
+ always-on;
+ };
+ si5341_4: out@4 {
+ /* refclk4 for PS-GT, used for PCIE slot */
+ reg = <4>;
+ always-on;
+ };
+ si5341_5: out@5 {
+ /* refclk5 for PS-GT, used for PCIE */
+ reg = <5>;
+ always-on;
+ };
+ si5341_6: out@6 {
+ /* refclk6 PL CLK125 */
+ reg = <6>;
+ always-on;
+ };
+ si5341_7: out@7 {
+ /* refclk7 PL CLK74 */
+ reg = <7>;
+ always-on;
+ };
+ si5341_9: out@9 {
+ /* refclk9 used for PS_REF_CLK 33.3 MHz */
+ reg = <9>;
+ always-on;
+ };
+ };
};
i2c@2 {
#address-cells = <1>;
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
index 7910ac125101..a29ff20090ce 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
@@ -133,6 +133,13 @@ ina226-u75 {
io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>;
};
+ /* 48MHz reference crystal */
+ ref48: ref48M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ };
+
refhdmi: refhdmi {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -488,7 +495,45 @@ i2c@1 {
#size-cells = <0>;
reg = <1>;
si5341: clock-generator@36 { /* SI5341 - u69 */
+ compatible = "silabs,si5341";
reg = <0x36>;
+ #clock-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&ref48>;
+ clock-names = "xtal";
+ clock-output-names = "si5341";
+
+ si5341_0: out@0 {
+ /* refclk0 for PS-GT, used for DP */
+ reg = <0>;
+ always-on;
+ };
+ si5341_2: out@2 {
+ /* refclk2 for PS-GT, used for USB3 */
+ reg = <2>;
+ always-on;
+ };
+ si5341_3: out@3 {
+ /* refclk3 for PS-GT, used for SATA */
+ reg = <3>;
+ always-on;
+ };
+ si5341_6: out@6 {
+ /* refclk6 PL CLK125 */
+ reg = <6>;
+ always-on;
+ };
+ si5341_7: out@7 {
+ /* refclk7 PL CLK74 */
+ reg = <7>;
+ always-on;
+ };
+ si5341_9: out@9 {
+ /* refclk9 used for PS_REF_CLK 33.3 MHz */
+ reg = <9>;
+ always-on;
+ };
};
};
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
index d9a8fdbbcae8..92b3cee62d11 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
@@ -116,6 +116,13 @@ ina226-u79 {
compatible = "iio-hwmon";
io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>;
};
+
+ /* 48MHz reference crystal */
+ ref48: ref48M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ };
};
&dcc {
@@ -374,9 +381,46 @@ i2c@1 {
#size-cells = <0>;
reg = <1>;
si5341: clock-generator@36 { /* SI5341 - u46 */
+ compatible = "silabs,si5341";
reg = <0x36>;
+ #clock-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&ref48>;
+ clock-names = "xtal";
+ clock-output-names = "si5341";
+
+ si5341_0: out@0 {
+ /* refclk0 for PS-GT, used for DP */
+ reg = <0>;
+ always-on;
+ };
+ si5341_2: out@2 {
+ /* refclk2 for PS-GT, used for USB3 */
+ reg = <2>;
+ always-on;
+ };
+ si5341_3: out@3 {
+ /* refclk3 for PS-GT, used for SATA */
+ reg = <3>;
+ always-on;
+ };
+ si5341_5: out@5 {
+ /* refclk5 PL CLK100 */
+ reg = <5>;
+ always-on;
+ };
+ si5341_6: out@6 {
+ /* refclk6 PL CLK125 */
+ reg = <6>;
+ always-on;
+ };
+ si5341_9: out@9 {
+ /* refclk9 used for PS_REF_CLK 33.3 MHz */
+ reg = <9>;
+ always-on;
+ };
};
-
};
i2c@2 {
#address-cells = <1>;
--
2.30.0
WARNING: multiple messages have this Message-ID (diff)
From: Michal Simek <michal.simek@xilinx.com>
To: linux-kernel@vger.kernel.org, monstr@monstr.eu,
michal.simek@xilinx.com, git@xilinx.com
Cc: devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Krzysztof Kozlowski <krzk@kernel.org>
Subject: [PATCH v2 03/12] arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111
Date: Thu, 21 Jan 2021 11:26:51 +0100 [thread overview]
Message-ID: <b93f13297684704a60e8d7274009a20aa98d14f7.1611224800.git.michal.simek@xilinx.com> (raw)
In-Reply-To: <cover.1611224800.git.michal.simek@xilinx.com>
Enable si5341 driver is the main chip for providing preprogrammed clocks
for the whole platform.
# cat /sys/kernel/debug/clk/clk_summary
...
refhdmi 1 1 0 114285000 0 0 50000
xtal_0 0 0 0 114285000 0 0 50000
pll_0 0 0 0 40731174000000 0 0 50000
clk1_0 0 0 0 27000000 0 0 50000
clk0_0 0 0 0 27000000 0 0 50000
ref48M 1 2 0 48000000 0 0 50000
si5341 0 4 0 14000000 0 0 50000
clock-generator.N4 0 0 0 0 0 0 50000
clock-generator.N3 0 1 0 733260000 0 0 50000
clock-generator.9 0 1 0 33330000 0 0 50000
clock-generator.N2 0 1 0 104000000 0 0 50000
clock-generator.2 0 1 0 26000000 0 0 50000
clock-generator.N1 0 2 0 594000000 0 0 50000
clock-generator.7 0 1 0 74250000 0 0 50000
clock-generator.0 0 1 0 27000000 0 0 50000
clock-generator.N0 0 4 0 1000000000 0 0 50000
clock-generator.8 0 0 0 0 0 0 50000
clock-generator.6 0 1 0 125000000 0 0 50000
clock-generator.5 0 1 0 100000000 0 0 50000
clock-generator.4 0 1 0 100000000 0 0 50000
clock-generator.3 0 1 0 125000000 0 0 50000
clock-generator.1 0 0 0 0 0 0 50000
...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
.../boot/dts/xilinx/zynqmp-zcu102-revA.dts | 56 ++++++++++++++++++-
.../boot/dts/xilinx/zynqmp-zcu106-revA.dts | 45 +++++++++++++++
.../boot/dts/xilinx/zynqmp-zcu111-revA.dts | 46 ++++++++++++++-
3 files changed, 145 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
index 5ff7ab665374..68c2ad30d62d 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
@@ -133,6 +133,13 @@ ina226-u75 {
io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>;
};
+ /* 48MHz reference crystal */
+ ref48: ref48M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ };
+
refhdmi: refhdmi {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -489,9 +496,56 @@ i2c@1 {
#size-cells = <0>;
reg = <1>;
si5341: clock-generator@36 { /* SI5341 - u69 */
+ compatible = "silabs,si5341";
reg = <0x36>;
- };
+ #clock-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&ref48>;
+ clock-names = "xtal";
+ clock-output-names = "si5341";
+ si5341_0: out@0 {
+ /* refclk0 for PS-GT, used for DP */
+ reg = <0>;
+ always-on;
+ };
+ si5341_2: out@2 {
+ /* refclk2 for PS-GT, used for USB3 */
+ reg = <2>;
+ always-on;
+ };
+ si5341_3: out@3 {
+ /* refclk3 for PS-GT, used for SATA */
+ reg = <3>;
+ always-on;
+ };
+ si5341_4: out@4 {
+ /* refclk4 for PS-GT, used for PCIE slot */
+ reg = <4>;
+ always-on;
+ };
+ si5341_5: out@5 {
+ /* refclk5 for PS-GT, used for PCIE */
+ reg = <5>;
+ always-on;
+ };
+ si5341_6: out@6 {
+ /* refclk6 PL CLK125 */
+ reg = <6>;
+ always-on;
+ };
+ si5341_7: out@7 {
+ /* refclk7 PL CLK74 */
+ reg = <7>;
+ always-on;
+ };
+ si5341_9: out@9 {
+ /* refclk9 used for PS_REF_CLK 33.3 MHz */
+ reg = <9>;
+ always-on;
+ };
+ };
};
i2c@2 {
#address-cells = <1>;
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
index 7910ac125101..a29ff20090ce 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
@@ -133,6 +133,13 @@ ina226-u75 {
io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>;
};
+ /* 48MHz reference crystal */
+ ref48: ref48M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ };
+
refhdmi: refhdmi {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -488,7 +495,45 @@ i2c@1 {
#size-cells = <0>;
reg = <1>;
si5341: clock-generator@36 { /* SI5341 - u69 */
+ compatible = "silabs,si5341";
reg = <0x36>;
+ #clock-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&ref48>;
+ clock-names = "xtal";
+ clock-output-names = "si5341";
+
+ si5341_0: out@0 {
+ /* refclk0 for PS-GT, used for DP */
+ reg = <0>;
+ always-on;
+ };
+ si5341_2: out@2 {
+ /* refclk2 for PS-GT, used for USB3 */
+ reg = <2>;
+ always-on;
+ };
+ si5341_3: out@3 {
+ /* refclk3 for PS-GT, used for SATA */
+ reg = <3>;
+ always-on;
+ };
+ si5341_6: out@6 {
+ /* refclk6 PL CLK125 */
+ reg = <6>;
+ always-on;
+ };
+ si5341_7: out@7 {
+ /* refclk7 PL CLK74 */
+ reg = <7>;
+ always-on;
+ };
+ si5341_9: out@9 {
+ /* refclk9 used for PS_REF_CLK 33.3 MHz */
+ reg = <9>;
+ always-on;
+ };
};
};
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
index d9a8fdbbcae8..92b3cee62d11 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
@@ -116,6 +116,13 @@ ina226-u79 {
compatible = "iio-hwmon";
io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>;
};
+
+ /* 48MHz reference crystal */
+ ref48: ref48M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ };
};
&dcc {
@@ -374,9 +381,46 @@ i2c@1 {
#size-cells = <0>;
reg = <1>;
si5341: clock-generator@36 { /* SI5341 - u46 */
+ compatible = "silabs,si5341";
reg = <0x36>;
+ #clock-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&ref48>;
+ clock-names = "xtal";
+ clock-output-names = "si5341";
+
+ si5341_0: out@0 {
+ /* refclk0 for PS-GT, used for DP */
+ reg = <0>;
+ always-on;
+ };
+ si5341_2: out@2 {
+ /* refclk2 for PS-GT, used for USB3 */
+ reg = <2>;
+ always-on;
+ };
+ si5341_3: out@3 {
+ /* refclk3 for PS-GT, used for SATA */
+ reg = <3>;
+ always-on;
+ };
+ si5341_5: out@5 {
+ /* refclk5 PL CLK100 */
+ reg = <5>;
+ always-on;
+ };
+ si5341_6: out@6 {
+ /* refclk6 PL CLK125 */
+ reg = <6>;
+ always-on;
+ };
+ si5341_9: out@9 {
+ /* refclk9 used for PS_REF_CLK 33.3 MHz */
+ reg = <9>;
+ always-on;
+ };
};
-
};
i2c@2 {
#address-cells = <1>;
--
2.30.0
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next prev parent reply other threads:[~2021-01-21 18:05 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-21 10:26 [PATCH v2 00/12] arm64: dts: zynqmp: DT updates to match latest drivers Michal Simek
2021-01-21 10:26 ` Michal Simek
2021-01-21 10:26 ` [PATCH v2 01/12] arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111 Michal Simek
2021-01-21 10:26 ` Michal Simek
2021-01-21 10:26 ` [PATCH v2 02/12] arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106 Michal Simek
2021-01-21 10:26 ` Michal Simek
2021-01-21 10:26 ` Michal Simek [this message]
2021-01-21 10:26 ` [PATCH v2 03/12] arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111 Michal Simek
2021-01-21 10:26 ` [PATCH v2 04/12] arm64: dts: zynqmp: Enable reset controller driver Michal Simek
2021-01-21 10:26 ` Michal Simek
2021-01-21 22:38 ` Laurent Pinchart
2021-01-21 22:38 ` Laurent Pinchart
2021-01-21 10:26 ` [PATCH v2 05/12] arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 Michal Simek
2021-01-21 10:26 ` Michal Simek
2021-01-21 10:26 ` [PATCH v2 06/12] arm64: dts: zynqmp: Add label for zynqmp_ipi Michal Simek
2021-01-21 10:26 ` Michal Simek
2021-01-21 10:26 ` [PATCH v2 07/12] arm64: dts: zynqmp: Add missing mio-bank properties to sdhcis Michal Simek
2021-01-21 10:26 ` Michal Simek
2021-01-21 10:26 ` [PATCH v2 08/12] arm64: dts: zynqmp: Wire arasan nand controller Michal Simek
2021-01-21 10:26 ` Michal Simek
2021-01-21 10:26 ` [PATCH v2 09/12] arm64: dts: zynqmp: Wire zynqmp qspi controller Michal Simek
2021-01-21 10:26 ` Michal Simek
2021-01-21 10:26 ` [PATCH v2 10/12] arm64: dts: zynqmp: Add missing lpd watchdog node Michal Simek
2021-01-21 10:26 ` Michal Simek
2021-01-21 10:26 ` [PATCH v2 11/12] arm64: dts: zynqmp: Add missing iommu IDs Michal Simek
2021-01-21 10:26 ` Michal Simek
2021-01-21 10:27 ` [PATCH v2 12/12] arm64: dts: zynqmp: Add description for zcu104 revC Michal Simek
2021-01-21 10:27 ` Michal Simek
2021-02-01 9:38 ` Michal Simek
2021-02-01 9:38 ` Michal Simek
2021-02-01 9:36 ` [PATCH v2 00/12] arm64: dts: zynqmp: DT updates to match latest drivers Michal Simek
2021-02-01 9:36 ` Michal Simek
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