From: "Paweł Anikiel" <pan@semihalf.com> To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, robh+dt@kernel.org, arnd@arndb.de, olof@lixom.net, soc@kernel.org, dinguyen@kernel.org, p.zabel@pengutronix.de Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, tn@semihalf.com, ka@semihalf.com, jam@semihalf.com, "Paweł Anikiel" <pan@semihalf.com>, "Joanna Brozek" <jbrozek@antmicro.com>, "Mariusz Glebocki" <mglebocki@antmicro.com>, "Tomasz Gorochowik" <tgorochowik@antmicro.com>, "Maciej Mikunda" <mmikunda@antmicro.com> Subject: [PATCH 2/3] dts: socfpga: Add Mercury+ AA1 devicetree Date: Mon, 20 Sep 2021 14:41:40 +0200 [thread overview] Message-ID: <20210920124141.1166544-3-pan@semihalf.com> (raw) Message-ID: <20210920124140.RZTw5kTlMXDVKDMnzhD0FZ5oHIQ_cZ6kTSSrKdQw9WU@z> (raw) In-Reply-To: <20210920124141.1166544-1-pan@semihalf.com> Add support for the Mercury+ AA1 module for Arria 10 SoC FPGA. Signed-off-by: Paweł Anikiel <pan@semihalf.com> Signed-off-by: Joanna Brozek <jbrozek@antmicro.com> Signed-off-by: Mariusz Glebocki <mglebocki@antmicro.com> Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com> Signed-off-by: Maciej Mikunda <mmikunda@antmicro.com> --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/socfpga_arria10_mercury_aa1.dts | 127 ++++++++++++++++++ 2 files changed, 128 insertions(+) create mode 100644 arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 7e0934180724..0a7809eb3795 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1078,6 +1078,7 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ socfpga_arria10_socdk_nand.dtb \ socfpga_arria10_socdk_qspi.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ + socfpga_arria10_mercury_aa1.dtb \ socfpga_cyclone5_chameleon96.dtb \ socfpga_cyclone5_mcvevk.dtb \ socfpga_cyclone5_socdk.dtb \ diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts new file mode 100644 index 000000000000..c13f16afa72f --- /dev/null +++ b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "socfpga_arria10.dtsi" + +/ { + + model = "Enclustra Mercury AA1"; + compatible = "altr,socfpga-arria10", "altr,socfpga"; + + aliases { + ethernet0 = &gmac0; + serial1 = &uart1; + }; + + memory { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x80000000>; /* 2GB */ + }; + + chosen { + stdout-path = "serial1:115200n8"; + }; +}; + +&osc1 { + clock-frequency = <33330000>; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; +}; + +/* Following mappings are taken from arria10 socdk dts */ +&mmc { + status = "okay"; + cap-sd-highspeed; + broken-cd; + bus-width = <4>; +}; + +&eccmgr { + sdmmca-ecc@ff8c2c00 { + compatible = "altr,socfpga-sdmmc-ecc"; + reg = <0xff8c2c00 0x400>; + altr,ecc-parent = <&mmc>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH>, + <47 IRQ_TYPE_LEVEL_HIGH>, + <16 IRQ_TYPE_LEVEL_HIGH>, + <48 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&gmac0 { + phy-mode = "rgmii"; + phy-addr = <0xffffffff>; /* probe for phy addr */ + + max-frame-size = <3800>; + status = "okay"; + + phy-handle = <&phy3>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy3: ethernet-phy@3 { + txd0-skew-ps = <0>; /* -420ps */ + txd1-skew-ps = <0>; /* -420ps */ + txd2-skew-ps = <0>; /* -420ps */ + txd3-skew-ps = <0>; /* -420ps */ + rxd0-skew-ps = <420>; /* 0ps */ + rxd1-skew-ps = <420>; /* 0ps */ + rxd2-skew-ps = <420>; /* 0ps */ + rxd3-skew-ps = <420>; /* 0ps */ + txen-skew-ps = <0>; /* -420ps */ + txc-skew-ps = <1860>; /* 960ps */ + rxdv-skew-ps = <420>; /* 0ps */ + rxc-skew-ps = <1680>; /* 780ps */ + reg = <3>; + }; + }; +}; + +&i2c1 { + status = "okay"; + isl12022: isl12022@6f { + status = "okay"; + compatible = "isil,isl12022"; + reg = <0x6f>; + }; +}; + +&uart1 { + status = "okay"; +}; + +&qspi { + status = "disabled"; + + flash0: n25q00@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "n25q00"; + reg = <0>; + spi-max-frequency = <50000000>; + cdns,page-size = <256>; + cdns,block-size = <16>; + m25p,fast-read; + cdns,read-delay = <4>; + cdns,tshsl-ns = <200>; + cdns,tsd2d-ns = <255>; + cdns,tchsh-ns = <20>; + cdns,tslch-ns = <20>; + + part0: qspi-boot@0 { + label = "Flash 0 Raw Data"; + reg = <0x0 0x01340000>; + }; + part1: qspi-rootfs@1320000 { + label = "Flash 1 jffs2 Filesystem"; + reg = <0x01340000 0x2cc0000>; + }; + }; +}; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: "Paweł Anikiel" <pan@semihalf.com> To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, robh+dt@kernel.org, arnd@arndb.de, olof@lixom.net, soc@kernel.org, dinguyen@kernel.org, p.zabel@pengutronix.de Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, tn@semihalf.com, ka@semihalf.com, jam@semihalf.com, "Paweł Anikiel" <pan@semihalf.com>, "Joanna Brozek" <jbrozek@antmicro.com>, "Mariusz Glebocki" <mglebocki@antmicro.com>, "Tomasz Gorochowik" <tgorochowik@antmicro.com>, "Maciej Mikunda" <mmikunda@antmicro.com> Subject: [PATCH 2/3] dts: socfpga: Add Mercury+ AA1 devicetree Date: Mon, 20 Sep 2021 14:41:40 +0200 [thread overview] Message-ID: <20210920124141.1166544-3-pan@semihalf.com> (raw) Message-ID: <20210920124140.u56dOOGofORjfYeTSsKGqD2HNw-7gu5UqvN2ocHwr-g@z> (raw) In-Reply-To: <20210920124141.1166544-1-pan@semihalf.com> Add support for the Mercury+ AA1 module for Arria 10 SoC FPGA. Signed-off-by: Paweł Anikiel <pan@semihalf.com> Signed-off-by: Joanna Brozek <jbrozek@antmicro.com> Signed-off-by: Mariusz Glebocki <mglebocki@antmicro.com> Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com> Signed-off-by: Maciej Mikunda <mmikunda@antmicro.com> --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/socfpga_arria10_mercury_aa1.dts | 127 ++++++++++++++++++ 2 files changed, 128 insertions(+) create mode 100644 arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 7e0934180724..0a7809eb3795 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1078,6 +1078,7 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ socfpga_arria10_socdk_nand.dtb \ socfpga_arria10_socdk_qspi.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ + socfpga_arria10_mercury_aa1.dtb \ socfpga_cyclone5_chameleon96.dtb \ socfpga_cyclone5_mcvevk.dtb \ socfpga_cyclone5_socdk.dtb \ diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts new file mode 100644 index 000000000000..c13f16afa72f --- /dev/null +++ b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "socfpga_arria10.dtsi" + +/ { + + model = "Enclustra Mercury AA1"; + compatible = "altr,socfpga-arria10", "altr,socfpga"; + + aliases { + ethernet0 = &gmac0; + serial1 = &uart1; + }; + + memory { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x80000000>; /* 2GB */ + }; + + chosen { + stdout-path = "serial1:115200n8"; + }; +}; + +&osc1 { + clock-frequency = <33330000>; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; +}; + +/* Following mappings are taken from arria10 socdk dts */ +&mmc { + status = "okay"; + cap-sd-highspeed; + broken-cd; + bus-width = <4>; +}; + +&eccmgr { + sdmmca-ecc@ff8c2c00 { + compatible = "altr,socfpga-sdmmc-ecc"; + reg = <0xff8c2c00 0x400>; + altr,ecc-parent = <&mmc>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH>, + <47 IRQ_TYPE_LEVEL_HIGH>, + <16 IRQ_TYPE_LEVEL_HIGH>, + <48 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&gmac0 { + phy-mode = "rgmii"; + phy-addr = <0xffffffff>; /* probe for phy addr */ + + max-frame-size = <3800>; + status = "okay"; + + phy-handle = <&phy3>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy3: ethernet-phy@3 { + txd0-skew-ps = <0>; /* -420ps */ + txd1-skew-ps = <0>; /* -420ps */ + txd2-skew-ps = <0>; /* -420ps */ + txd3-skew-ps = <0>; /* -420ps */ + rxd0-skew-ps = <420>; /* 0ps */ + rxd1-skew-ps = <420>; /* 0ps */ + rxd2-skew-ps = <420>; /* 0ps */ + rxd3-skew-ps = <420>; /* 0ps */ + txen-skew-ps = <0>; /* -420ps */ + txc-skew-ps = <1860>; /* 960ps */ + rxdv-skew-ps = <420>; /* 0ps */ + rxc-skew-ps = <1680>; /* 780ps */ + reg = <3>; + }; + }; +}; + +&i2c1 { + status = "okay"; + isl12022: isl12022@6f { + status = "okay"; + compatible = "isil,isl12022"; + reg = <0x6f>; + }; +}; + +&uart1 { + status = "okay"; +}; + +&qspi { + status = "disabled"; + + flash0: n25q00@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "n25q00"; + reg = <0>; + spi-max-frequency = <50000000>; + cdns,page-size = <256>; + cdns,block-size = <16>; + m25p,fast-read; + cdns,read-delay = <4>; + cdns,tshsl-ns = <200>; + cdns,tsd2d-ns = <255>; + cdns,tchsh-ns = <20>; + cdns,tslch-ns = <20>; + + part0: qspi-boot@0 { + label = "Flash 0 Raw Data"; + reg = <0x0 0x01340000>; + }; + part1: qspi-rootfs@1320000 { + label = "Flash 1 jffs2 Filesystem"; + reg = <0x01340000 0x2cc0000>; + }; + }; +}; -- 2.25.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2021-09-20 12:45 UTC|newest] Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <20210920124138.7Rv4Bat-mDXSJL5_d7ykDRJFDCAMP3dSiZm0nDPMaDU@z> 2021-09-20 12:41 ` [PATCH 0/3] Add support for the Mercury+ AA1 module Paweł Anikiel 2021-09-20 12:41 ` Paweł Anikiel [not found] ` <20210920124139.jQM-Tqzr63A2Hs1WHPqhhGaUuJiNYaCWKRl5YiR4iTA@z> 2021-09-20 12:41 ` [PATCH 1/3] dt-bindings: mtd: spi-nor: add n25q00 schema Paweł Anikiel 2021-09-20 12:41 ` Paweł Anikiel [not found] ` <20210923165648.FCg577uaG9fWz1MINUjzq_6XdotxOakHUOjndV9cMBM@z> 2021-09-23 16:56 ` Rob Herring 2021-09-23 16:56 ` Rob Herring [not found] ` <20210923185904.twJ5GB7t8omyZ7RKqA5bcaS2QzsOxfghoI6XXJrCzfc@z> 2021-09-23 18:59 ` Pratyush Yadav 2021-09-23 18:59 ` Pratyush Yadav [not found] ` <20211005115906.sVeqCk7Lbj-UbEQBqo8aQDAVjC_bmmDQ6QaO3ChH2n4@z> 2021-10-05 11:59 ` Tudor.Ambarus 2021-10-05 11:59 ` Tudor.Ambarus [not found] ` <20210920124140.RZTw5kTlMXDVKDMnzhD0FZ5oHIQ_cZ6kTSSrKdQw9WU@z> 2021-09-20 12:41 ` Paweł Anikiel [this message] 2021-09-20 12:41 ` [PATCH 2/3] dts: socfpga: Add Mercury+ AA1 devicetree Paweł Anikiel [not found] ` <20210923165624.wCIpZMuEaOTqgzTIVio-auukBwIkYM1Ik1HRSlI8hTg@z> 2021-09-23 16:56 ` Rob Herring 2021-09-23 16:56 ` Rob Herring [not found] ` <20210920124141.dOhXof_mbq7fNGtevvmYnhhpG15cTTgPtsQcSOqhER8@z> 2021-09-20 12:41 ` [PATCH 3/3] reset: socfpga: add empty driver allowing consumers to probe Paweł Anikiel 2021-09-20 12:41 ` Paweł Anikiel [not found] ` <20211005093407.6FCAsOZYukqdChGyMhvCtKU-0iQe1qmWgVVlQSxU-40@z> 2021-10-05 9:34 ` Philipp Zabel 2021-10-05 9:34 ` Philipp Zabel 2021-10-05 9:34 ` Philipp Zabel [not found] ` <20211005111205.yhacoo2AdAdnUkQ86NaPU0ASEexP3rjoqfZSlZF-dlI@z> 2021-10-05 11:12 ` Paweł Anikiel [not found] ` <20211005102225.PzZXA7w0Qn5d_3_cHQbe86EPWtaa_CBoQpc89EEeouA@z> 2021-10-05 10:22 ` Philipp Zabel 2021-10-05 10:22 ` Philipp Zabel 2021-10-05 10:22 ` Philipp Zabel 2021-10-05 11:12 ` Paweł Anikiel 2021-10-05 11:12 ` Paweł Anikiel
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210920124141.1166544-3-pan@semihalf.com \ --to=pan@semihalf.com \ --cc=arnd@arndb.de \ --cc=devicetree@vger.kernel.org \ --cc=dinguyen@kernel.org \ --cc=jam@semihalf.com \ --cc=jbrozek@antmicro.com \ --cc=ka@semihalf.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-mtd@lists.infradead.org \ --cc=mglebocki@antmicro.com \ --cc=miquel.raynal@bootlin.com \ --cc=mmikunda@antmicro.com \ --cc=olof@lixom.net \ --cc=p.zabel@pengutronix.de \ --cc=richard@nod.at \ --cc=robh+dt@kernel.org \ --cc=soc@kernel.org \ --cc=tgorochowik@antmicro.com \ --cc=tn@semihalf.com \ --cc=vigneshr@ti.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).