* fix a few RISC-V / renesas Kconfig dependencies
@ 2023-10-17 13:59 Christoph Hellwig
2023-10-17 13:59 ` [PATCH 1/3] riscv: RISCV_NONSTANDARD_CACHE_OPS shouldn't depend on RISCV_DMA_NONCOHERENT Christoph Hellwig
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Christoph Hellwig @ 2023-10-17 13:59 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Conor Dooley, Geert Uytterhoeven,
Magnus Damm
Cc: linux-riscv, linux-renesas-soc, Arnd Bergmann, Olof Johansson, soc
Hi all,
this small series sorts out a few Kconfig dependency issue for the
rich set of RISC-V non-coherent DMA support.
Geert suggested for it to go into the soc tree, which is fine with me
if I get a stable branch for it as it is required for further dma-mapping
work.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/3] riscv: RISCV_NONSTANDARD_CACHE_OPS shouldn't depend on RISCV_DMA_NONCOHERENT
2023-10-17 13:59 fix a few RISC-V / renesas Kconfig dependencies Christoph Hellwig
@ 2023-10-17 13:59 ` Christoph Hellwig
2023-10-17 13:59 ` [PATCH 2/3] riscv: only select DMA_DIRECT_REMAP from RISCV_ISA_ZICBOM Christoph Hellwig
2023-10-17 13:59 ` [PATCH 3/3] soc: renesas: ARCH_R9A07G043 depends on !RISCV_ISA_ZICBOM Christoph Hellwig
2 siblings, 0 replies; 5+ messages in thread
From: Christoph Hellwig @ 2023-10-17 13:59 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Conor Dooley, Geert Uytterhoeven,
Magnus Damm
Cc: linux-riscv, linux-renesas-soc, Arnd Bergmann, Olof Johansson,
soc, Conor Dooley
RISCV_NONSTANDARD_CACHE_OPS is also used for the pmem cache maintenance
helpers, which are built into the kernel unconditionally.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/Kconfig | 1 -
drivers/cache/Kconfig | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index d607ab0f7c6daf..0ac0b538379718 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -277,7 +277,6 @@ config RISCV_DMA_NONCOHERENT
config RISCV_NONSTANDARD_CACHE_OPS
bool
- depends on RISCV_DMA_NONCOHERENT
help
This enables function pointer support for non-standard noncoherent
systems to handle cache management.
diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig
index a57677f908f3ba..d6e5e3abaad8af 100644
--- a/drivers/cache/Kconfig
+++ b/drivers/cache/Kconfig
@@ -3,7 +3,7 @@ menu "Cache Drivers"
config AX45MP_L2_CACHE
bool "Andes Technology AX45MP L2 Cache controller"
- depends on RISCV_DMA_NONCOHERENT
+ depends on RISCV
select RISCV_NONSTANDARD_CACHE_OPS
help
Support for the L2 cache controller on Andes Technology AX45MP platforms.
--
2.39.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/3] riscv: only select DMA_DIRECT_REMAP from RISCV_ISA_ZICBOM
2023-10-17 13:59 fix a few RISC-V / renesas Kconfig dependencies Christoph Hellwig
2023-10-17 13:59 ` [PATCH 1/3] riscv: RISCV_NONSTANDARD_CACHE_OPS shouldn't depend on RISCV_DMA_NONCOHERENT Christoph Hellwig
@ 2023-10-17 13:59 ` Christoph Hellwig
2023-10-18 2:36 ` Samuel Holland
2023-10-17 13:59 ` [PATCH 3/3] soc: renesas: ARCH_R9A07G043 depends on !RISCV_ISA_ZICBOM Christoph Hellwig
2 siblings, 1 reply; 5+ messages in thread
From: Christoph Hellwig @ 2023-10-17 13:59 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Conor Dooley, Geert Uytterhoeven,
Magnus Damm
Cc: linux-riscv, linux-renesas-soc, Arnd Bergmann, Olof Johansson,
soc, Conor Dooley, Robin Murphy, Lad Prabhakar
RISCV_DMA_NONCOHERENT is also used for whacky non-standard
non-coherent ops that use different hooks in dma-direct.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/riscv/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 0ac0b538379718..9c48fecc671918 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -273,7 +273,6 @@ config RISCV_DMA_NONCOHERENT
select ARCH_HAS_SYNC_DMA_FOR_CPU
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select DMA_BOUNCE_UNALIGNED_KMALLOC if SWIOTLB
- select DMA_DIRECT_REMAP if MMU
config RISCV_NONSTANDARD_CACHE_OPS
bool
@@ -549,6 +548,7 @@ config RISCV_ISA_ZICBOM
depends on RISCV_ALTERNATIVE
default y
select RISCV_DMA_NONCOHERENT
+ select DMA_DIRECT_REMAP
help
Adds support to dynamically detect the presence of the ZICBOM
extension (Cache Block Management Operations) and enable its
--
2.39.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/3] soc: renesas: ARCH_R9A07G043 depends on !RISCV_ISA_ZICBOM
2023-10-17 13:59 fix a few RISC-V / renesas Kconfig dependencies Christoph Hellwig
2023-10-17 13:59 ` [PATCH 1/3] riscv: RISCV_NONSTANDARD_CACHE_OPS shouldn't depend on RISCV_DMA_NONCOHERENT Christoph Hellwig
2023-10-17 13:59 ` [PATCH 2/3] riscv: only select DMA_DIRECT_REMAP from RISCV_ISA_ZICBOM Christoph Hellwig
@ 2023-10-17 13:59 ` Christoph Hellwig
2 siblings, 0 replies; 5+ messages in thread
From: Christoph Hellwig @ 2023-10-17 13:59 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Conor Dooley, Geert Uytterhoeven,
Magnus Damm
Cc: linux-riscv, linux-renesas-soc, Arnd Bergmann, Olof Johansson,
soc, Lad Prabhakar, Conor Dooley
ARCH_R9A07G043 has its own non-standard global pool based DMA coherent
allocator, which conflicts with the remap based RISCV_ISA_ZICBOM version.
Add a proper dependency.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/soc/renesas/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index 335251ff6e8214..624185e09c967b 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -341,6 +341,7 @@ config ARCH_R9A07G043
bool "RISC-V Platform support for RZ/Five"
depends on NONPORTABLE
depends on RISCV_ALTERNATIVE
+ depends on !RISCV_ISA_ZICBOM
depends on RISCV_SBI
select ARCH_RZG2L
select AX45MP_L2_CACHE
--
2.39.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 2/3] riscv: only select DMA_DIRECT_REMAP from RISCV_ISA_ZICBOM
2023-10-17 13:59 ` [PATCH 2/3] riscv: only select DMA_DIRECT_REMAP from RISCV_ISA_ZICBOM Christoph Hellwig
@ 2023-10-18 2:36 ` Samuel Holland
0 siblings, 0 replies; 5+ messages in thread
From: Samuel Holland @ 2023-10-18 2:36 UTC (permalink / raw)
To: Christoph Hellwig, Paul Walmsley, Palmer Dabbelt, Conor Dooley,
Geert Uytterhoeven, Magnus Damm
Cc: linux-riscv, linux-renesas-soc, Arnd Bergmann, Olof Johansson,
soc, Conor Dooley, Robin Murphy, Lad Prabhakar
On 2023-10-17 8:59 AM, Christoph Hellwig wrote:
> RISCV_DMA_NONCOHERENT is also used for whacky non-standard
> non-coherent ops that use different hooks in dma-direct.
>
> Signed-off-by: Christoph Hellwig <hch@lst.de>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
> arch/riscv/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 0ac0b538379718..9c48fecc671918 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -273,7 +273,6 @@ config RISCV_DMA_NONCOHERENT
> select ARCH_HAS_SYNC_DMA_FOR_CPU
> select ARCH_HAS_SYNC_DMA_FOR_DEVICE
> select DMA_BOUNCE_UNALIGNED_KMALLOC if SWIOTLB
> - select DMA_DIRECT_REMAP if MMU
This breaks ERRATA_THEAD_CMO, which also needs a `select DMA_DIRECT_REMAP`:
riscv64-unknown-linux-gnu-ld: kernel/dma/direct.o: in function `.L131':
direct.c:(.text+0x42a): undefined reference to `arch_dma_alloc'
riscv64-unknown-linux-gnu-ld: kernel/dma/direct.o: in function `.L192':
direct.c:(.text+0x592): undefined reference to `arch_dma_free'
> config RISCV_NONSTANDARD_CACHE_OPS
> bool
> @@ -549,6 +548,7 @@ config RISCV_ISA_ZICBOM
> depends on RISCV_ALTERNATIVE
> default y
> select RISCV_DMA_NONCOHERENT
> + select DMA_DIRECT_REMAP
> help
> Adds support to dynamically detect the presence of the ZICBOM
> extension (Cache Block Management Operations) and enable its
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2023-10-18 2:36 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2023-10-17 13:59 fix a few RISC-V / renesas Kconfig dependencies Christoph Hellwig
2023-10-17 13:59 ` [PATCH 1/3] riscv: RISCV_NONSTANDARD_CACHE_OPS shouldn't depend on RISCV_DMA_NONCOHERENT Christoph Hellwig
2023-10-17 13:59 ` [PATCH 2/3] riscv: only select DMA_DIRECT_REMAP from RISCV_ISA_ZICBOM Christoph Hellwig
2023-10-18 2:36 ` Samuel Holland
2023-10-17 13:59 ` [PATCH 3/3] soc: renesas: ARCH_R9A07G043 depends on !RISCV_ISA_ZICBOM Christoph Hellwig
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