Re: [PATCH] mtd: rawnand: fsl_ifc: Fix nand waitfunc return value

Re: [PATCH] mtd: rawnand: fsl_ifc: Fix nand waitfunc return value

[Boris Brezillon]

On Tue, 20 Mar 2018 03:35:12 +0530
Jagdish Gediya <jagdish.gediya@nxp.com> wrote:

> As per the IFC hardware manual, Most significant 2 bytes in
> nand_fsr register are the outcome of NAND READ STATUS command.
> 
> So status value need to be shifted and aligned as per the nand
> framework requirement.
> 
> Cc: stable@vger.kernel.org

Fixes tag please.

> Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
> ---
>  drivers/mtd/nand/fsl_ifc_nand.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
> index d9ce398..951dd89 100644
> --- a/drivers/mtd/nand/fsl_ifc_nand.c
> +++ b/drivers/mtd/nand/fsl_ifc_nand.c
> @@ -643,12 +643,13 @@ static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip)
>  	fsl_ifc_run_command(mtd);
>  
>  	nand_fsr = ifc_in32(&ifc->ifc_nand.nand_fsr);
> -
> +	nand_fsr >>= 16;
> +	nand_fsr = (nand_fsr >> 8) | (nand_fsr << 8);
>  	/*
>  	 * The chip always seems to report that it is
>  	 * write-protected, even when it is not.
>  	 */
> -	return nand_fsr | NAND_STATUS_WP;
> +	return (nand_fsr & 0xff) | NAND_STATUS_WP;
>  }
>  
>  /*



-- 
Boris Brezillon, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

[PATCH] mtd: rawnand: fsl_ifc: Fix nand waitfunc return value

[Jagdish Gediya]

As per the IFC hardware manual, Most significant 2 bytes in
nand_fsr register are the outcome of NAND READ STATUS command.

So status value need to be shifted and aligned as per the nand
framework requirement.

Cc: stable@vger.kernel.org
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
---
 drivers/mtd/nand/fsl_ifc_nand.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index d9ce398..951dd89 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -643,12 +643,13 @@ static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip)
 	fsl_ifc_run_command(mtd);
 
 	nand_fsr = ifc_in32(&ifc->ifc_nand.nand_fsr);
-
+	nand_fsr >>= 16;
+	nand_fsr = (nand_fsr >> 8) | (nand_fsr << 8);
 	/*
 	 * The chip always seems to report that it is
 	 * write-protected, even when it is not.
 	 */
-	return nand_fsr | NAND_STATUS_WP;
+	return (nand_fsr & 0xff) | NAND_STATUS_WP;
 }
 
 /*
-- 
1.9.1