* FAILED: patch "[PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section" failed to apply to 5.2-stable tree
@ 2019-08-05 5:58 gregkh
2019-08-05 22:49 ` [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section José Roberto de Souza
0 siblings, 1 reply; 7+ messages in thread
From: gregkh @ 2019-08-05 5:58 UTC (permalink / raw)
To: dhinakaran.pandiyan, jani.nikula, jose.souza, kubrick,
rodrigo.vivi, ville.syrjala
Cc: stable
The patch below does not apply to the 5.2-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to <stable@vger.kernel.org>.
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From 6d61f716a01ec0e134de38ae97e71d6fec5a6ff6 Mon Sep 17 00:00:00 2001
From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Date: Wed, 17 Jul 2019 15:34:51 -0700
Subject: [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
A single 32-bit PSR2 training pattern field follows the sixteen element
array of PSR table entries in the VBT spec. But, we incorrectly define
this PSR2 field for each of the PSR table entries. As a result, the PSR1
training pattern duration for any panel_type != 0 will be parsed
incorrectly. Secondly, PSR2 training pattern durations for VBTs with bdb
version >= 226 will also be wrong.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: stable@vger.kernel.org
Cc: stable@vger.kernel.org #v5.2
Fixes: 88a0d9606aff ("drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111088
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204183
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: François Guerraz <kubrick@fgv6.net>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190717223451.2595-1-dhinakaran.pandiyan@intel.com
(cherry picked from commit b5ea9c9337007d6e700280c8a60b4e10d070fb53)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index c4710889cb32..3ef4e9f573cf 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -765,7 +765,7 @@ parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
}
if (bdb->version >= 226) {
- u32 wakeup_time = psr_table->psr2_tp2_tp3_wakeup_time;
+ u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
switch (wakeup_time) {
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index 2f4894e9a03d..5ddbe71ab423 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -478,13 +478,13 @@ struct psr_table {
/* TP wake up time in multiple of 100 */
u16 tp1_wakeup_time;
u16 tp2_tp3_wakeup_time;
-
- /* PSR2 TP2/TP3 wakeup time for 16 panels */
- u32 psr2_tp2_tp3_wakeup_time;
} __packed;
struct bdb_psr {
struct psr_table psr_table[16];
+
+ /* PSR2 TP2/TP3 wakeup time for 16 panels */
+ u32 psr2_tp2_tp3_wakeup_time;
} __packed;
/*
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section
2019-08-05 5:58 FAILED: patch "[PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section" failed to apply to 5.2-stable tree gregkh
@ 2019-08-05 22:49 ` José Roberto de Souza
2019-08-06 7:44 ` Jani Nikula
0 siblings, 1 reply; 7+ messages in thread
From: José Roberto de Souza @ 2019-08-05 22:49 UTC (permalink / raw)
To: stable
Cc: gregkh, Rodrigo Vivi, José Roberto de Souza,
Dhinakaran Pandiyan, Ville Syrjälä,
François Guerraz, Jani Nikula
From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
A single 32-bit PSR2 training pattern field follows the sixteen element
array of PSR table entries in the VBT spec. But, we incorrectly define
this PSR2 field for each of the PSR table entries. As a result, the PSR1
training pattern duration for any panel_type != 0 will be parsed
incorrectly. Secondly, PSR2 training pattern durations for VBTs with bdb
version >= 226 will also be wrong.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: stable@vger.kernel.org
Cc: stable@vger.kernel.org #v5.2
Fixes: 88a0d9606aff ("drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111088
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204183
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: François Guerraz <kubrick@fgv6.net>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190717223451.2595-1-dhinakaran.pandiyan@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
(cherry picked from commit 6d61f716a01ec0e134de38ae97e71d6fec5a6ff6)
---
Sending it for Dhinakaran, let me know if something is wrong.
drivers/gpu/drm/i915/intel_bios.c | 2 +-
drivers/gpu/drm/i915/intel_vbt_defs.h | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 1dc8d03ff127..ee6fa75d65a2 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -762,7 +762,7 @@ parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
}
if (bdb->version >= 226) {
- u32 wakeup_time = psr_table->psr2_tp2_tp3_wakeup_time;
+ u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
switch (wakeup_time) {
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index fdbbb9a53804..796c070bbe6f 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -772,13 +772,13 @@ struct psr_table {
/* TP wake up time in multiple of 100 */
u16 tp1_wakeup_time;
u16 tp2_tp3_wakeup_time;
-
- /* PSR2 TP2/TP3 wakeup time for 16 panels */
- u32 psr2_tp2_tp3_wakeup_time;
} __packed;
struct bdb_psr {
struct psr_table psr_table[16];
+
+ /* PSR2 TP2/TP3 wakeup time for 16 panels */
+ u32 psr2_tp2_tp3_wakeup_time;
} __packed;
/*
--
2.22.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section
2019-08-05 22:49 ` [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section José Roberto de Souza
@ 2019-08-06 7:44 ` Jani Nikula
2019-08-07 19:37 ` Souza, Jose
2019-08-08 9:03 ` Greg KH
0 siblings, 2 replies; 7+ messages in thread
From: Jani Nikula @ 2019-08-06 7:44 UTC (permalink / raw)
To: José Roberto de Souza, stable
Cc: gregkh, Rodrigo Vivi, José Roberto de Souza,
Dhinakaran Pandiyan, Ville Syrjälä,
François Guerraz
On Mon, 05 Aug 2019, José Roberto de Souza <jose.souza@intel.com> wrote:
> From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
>
commit 6d61f716a01ec0e134de38ae97e71d6fec5a6ff6 upstream.
> A single 32-bit PSR2 training pattern field follows the sixteen element
> array of PSR table entries in the VBT spec. But, we incorrectly define
> this PSR2 field for each of the PSR table entries. As a result, the PSR1
> training pattern duration for any panel_type != 0 will be parsed
> incorrectly. Secondly, PSR2 training pattern durations for VBTs with bdb
> version >= 226 will also be wrong.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: stable@vger.kernel.org
> Cc: stable@vger.kernel.org #v5.2
> Fixes: 88a0d9606aff ("drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time")
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111088
> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204183
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Tested-by: François Guerraz <kubrick@fgv6.net>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Link: https://patchwork.freedesktop.org/patch/msgid/20190717223451.2595-1-dhinakaran.pandiyan@intel.com
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> (cherry picked from commit 6d61f716a01ec0e134de38ae97e71d6fec5a6ff6)
> ---
>
> Sending it for Dhinakaran, let me know if something is wrong.
>
> drivers/gpu/drm/i915/intel_bios.c | 2 +-
> drivers/gpu/drm/i915/intel_vbt_defs.h | 6 +++---
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index 1dc8d03ff127..ee6fa75d65a2 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -762,7 +762,7 @@ parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
> }
>
> if (bdb->version >= 226) {
> - u32 wakeup_time = psr_table->psr2_tp2_tp3_wakeup_time;
> + u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
>
> wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
> switch (wakeup_time) {
> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
> index fdbbb9a53804..796c070bbe6f 100644
> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
> @@ -772,13 +772,13 @@ struct psr_table {
> /* TP wake up time in multiple of 100 */
> u16 tp1_wakeup_time;
> u16 tp2_tp3_wakeup_time;
> -
> - /* PSR2 TP2/TP3 wakeup time for 16 panels */
> - u32 psr2_tp2_tp3_wakeup_time;
> } __packed;
>
> struct bdb_psr {
> struct psr_table psr_table[16];
> +
> + /* PSR2 TP2/TP3 wakeup time for 16 panels */
> + u32 psr2_tp2_tp3_wakeup_time;
> } __packed;
>
> /*
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section
2019-08-06 7:44 ` Jani Nikula
@ 2019-08-07 19:37 ` Souza, Jose
2019-08-08 5:57 ` gregkh
2019-08-08 9:03 ` Greg KH
1 sibling, 1 reply; 7+ messages in thread
From: Souza, Jose @ 2019-08-07 19:37 UTC (permalink / raw)
To: Nikula, Jani, stable
Cc: ville.syrjala, Vivi, Rodrigo, gregkh, kubrick, Pandiyan, Dhinakaran
Hi Greg
Anything is missing to have this merged for 5.2.8?
On Tue, 2019-08-06 at 10:44 +0300, Jani Nikula wrote:
> On Mon, 05 Aug 2019, José Roberto de Souza <jose.souza@intel.com>
> wrote:
> > From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> >
>
> commit 6d61f716a01ec0e134de38ae97e71d6fec5a6ff6 upstream.
>
> > A single 32-bit PSR2 training pattern field follows the sixteen
> > element
> > array of PSR table entries in the VBT spec. But, we incorrectly
> > define
> > this PSR2 field for each of the PSR table entries. As a result, the
> > PSR1
> > training pattern duration for any panel_type != 0 will be parsed
> > incorrectly. Secondly, PSR2 training pattern durations for VBTs
> > with bdb
> > version >= 226 will also be wrong.
> >
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Cc: stable@vger.kernel.org
> > Cc: stable@vger.kernel.org #v5.2
> > Fixes: 88a0d9606aff ("drm/i915/vbt: Parse and use the new field
> > with PSR2 TP2/3 wakeup time")
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111088
> > Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204183
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> > Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Tested-by: François Guerraz <kubrick@fgv6.net>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Link:
> > https://patchwork.freedesktop.org/patch/msgid/20190717223451.2595-1-dhinakaran.pandiyan@intel.com
> > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> > (cherry picked from commit
> > 6d61f716a01ec0e134de38ae97e71d6fec5a6ff6)
> > ---
> >
> > Sending it for Dhinakaran, let me know if something is wrong.
> >
> > drivers/gpu/drm/i915/intel_bios.c | 2 +-
> > drivers/gpu/drm/i915/intel_vbt_defs.h | 6 +++---
> > 2 files changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_bios.c
> > b/drivers/gpu/drm/i915/intel_bios.c
> > index 1dc8d03ff127..ee6fa75d65a2 100644
> > --- a/drivers/gpu/drm/i915/intel_bios.c
> > +++ b/drivers/gpu/drm/i915/intel_bios.c
> > @@ -762,7 +762,7 @@ parse_psr(struct drm_i915_private *dev_priv,
> > const struct bdb_header *bdb)
> > }
> >
> > if (bdb->version >= 226) {
> > - u32 wakeup_time = psr_table->psr2_tp2_tp3_wakeup_time;
> > + u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
> >
> > wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
> > switch (wakeup_time) {
> > diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h
> > b/drivers/gpu/drm/i915/intel_vbt_defs.h
> > index fdbbb9a53804..796c070bbe6f 100644
> > --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> > +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
> > @@ -772,13 +772,13 @@ struct psr_table {
> > /* TP wake up time in multiple of 100 */
> > u16 tp1_wakeup_time;
> > u16 tp2_tp3_wakeup_time;
> > -
> > - /* PSR2 TP2/TP3 wakeup time for 16 panels */
> > - u32 psr2_tp2_tp3_wakeup_time;
> > } __packed;
> >
> > struct bdb_psr {
> > struct psr_table psr_table[16];
> > +
> > + /* PSR2 TP2/TP3 wakeup time for 16 panels */
> > + u32 psr2_tp2_tp3_wakeup_time;
> > } __packed;
> >
> > /*
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section
2019-08-07 19:37 ` Souza, Jose
@ 2019-08-08 5:57 ` gregkh
0 siblings, 0 replies; 7+ messages in thread
From: gregkh @ 2019-08-08 5:57 UTC (permalink / raw)
To: Souza, Jose
Cc: Nikula, Jani, stable, ville.syrjala, Vivi, Rodrigo, kubrick,
Pandiyan, Dhinakaran
On Wed, Aug 07, 2019 at 07:37:13PM +0000, Souza, Jose wrote:
> Hi Greg
>
> Anything is missing to have this merged for 5.2.8?
Patience :)
The queue is long and you only sent this 2 days ago...
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section
2019-08-06 7:44 ` Jani Nikula
2019-08-07 19:37 ` Souza, Jose
@ 2019-08-08 9:03 ` Greg KH
1 sibling, 0 replies; 7+ messages in thread
From: Greg KH @ 2019-08-08 9:03 UTC (permalink / raw)
To: Jani Nikula
Cc: José Roberto de Souza, stable, Rodrigo Vivi,
Dhinakaran Pandiyan, Ville Syrjälä,
François Guerraz
On Tue, Aug 06, 2019 at 10:44:33AM +0300, Jani Nikula wrote:
> On Mon, 05 Aug 2019, José Roberto de Souza <jose.souza@intel.com> wrote:
> > From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> >
>
> commit 6d61f716a01ec0e134de38ae97e71d6fec5a6ff6 upstream.
Now queued up, thanks.
greg k-h
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section
@ 2019-07-17 22:34 Dhinakaran Pandiyan
0 siblings, 0 replies; 7+ messages in thread
From: Dhinakaran Pandiyan @ 2019-07-17 22:34 UTC (permalink / raw)
To: intel-gfx
Cc: Dhinakaran Pandiyan, Rodrigo Vivi, José Roberto de Souza, stable
A single 32-bit PSR2 training pattern field follows the sixteen element
array of PSR table entries in the VBT spec. But, we incorrectly define
this PSR2 field for each of the PSR table entries. As a result, the PSR1
training pattern duration for any panel_type != 0 will be parsed
incorrectly. Secondly, PSR2 training pattern durations for VBTs with bdb
version >= 226 will also be wrong.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: stable@vger.kernel.org
Cc: stable@vger.kernel.org #v5.2
Fixes: 88a0d9606aff ("drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111088
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204183
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: François Guerraz <kubrick@fgv6.net>
---
drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 21501d565327..b416b394b641 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -766,7 +766,7 @@ parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
}
if (bdb->version >= 226) {
- u32 wakeup_time = psr_table->psr2_tp2_tp3_wakeup_time;
+ u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
switch (wakeup_time) {
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index 93f5c9d204d6..09cd37fb0b1c 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -481,13 +481,13 @@ struct psr_table {
/* TP wake up time in multiple of 100 */
u16 tp1_wakeup_time;
u16 tp2_tp3_wakeup_time;
-
- /* PSR2 TP2/TP3 wakeup time for 16 panels */
- u32 psr2_tp2_tp3_wakeup_time;
} __packed;
struct bdb_psr {
struct psr_table psr_table[16];
+
+ /* PSR2 TP2/TP3 wakeup time for 16 panels */
+ u32 psr2_tp2_tp3_wakeup_time;
} __packed;
/*
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
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2019-08-05 5:58 FAILED: patch "[PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section" failed to apply to 5.2-stable tree gregkh
2019-08-05 22:49 ` [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section José Roberto de Souza
2019-08-06 7:44 ` Jani Nikula
2019-08-07 19:37 ` Souza, Jose
2019-08-08 5:57 ` gregkh
2019-08-08 9:03 ` Greg KH
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2019-07-17 22:34 Dhinakaran Pandiyan
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