* [PATCH] x86/tsc: Unset TSC_KNOWN_FREQ and TSC_RELIABLE flags on Intel Bay Trail SoC
@ 2019-12-18 15:30 Vipul Kumar
2019-12-18 16:26 ` Greg KH
0 siblings, 1 reply; 2+ messages in thread
From: Vipul Kumar @ 2019-12-18 15:30 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner
Cc: linux-kernel, Stable, Srikanth Krishnakar, Cedric Hombourger,
Vipul Kumar, Vipul Kumar
From: Vipul Kumar <vipul_kumar@mentor.com>
'commit f3a02ecebed7 ("x86/tsc: Set TSC_KNOWN_FREQ and TSC_RELIABLE
flags on Intel Atom SoCs")', causing time drift for Bay trail SoC.
These flags are set for SoCs having cpuid_level 0x15 or more.
Bay trail is having cpuid_level 0xb.
So, unset both flags to make sure the clocksource calibration can
be done.
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
---
arch/x86/kernel/tsc_msr.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c
index e0cbe4f2af49..1ca27c28db98 100644
--- a/arch/x86/kernel/tsc_msr.c
+++ b/arch/x86/kernel/tsc_msr.c
@@ -112,6 +112,9 @@ unsigned long cpu_khz_from_msr(void)
lapic_timer_period = (freq * 1000) / HZ;
#endif
+ if (boot_cpu_data.cpuid_level < 0x15)
+ return res;
+
/*
* TSC frequency determined by MSR is always considered "known"
* because it is reported by HW.
--
2.20.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] x86/tsc: Unset TSC_KNOWN_FREQ and TSC_RELIABLE flags on Intel Bay Trail SoC
2019-12-18 15:30 [PATCH] x86/tsc: Unset TSC_KNOWN_FREQ and TSC_RELIABLE flags on Intel Bay Trail SoC Vipul Kumar
@ 2019-12-18 16:26 ` Greg KH
0 siblings, 0 replies; 2+ messages in thread
From: Greg KH @ 2019-12-18 16:26 UTC (permalink / raw)
To: Vipul Kumar
Cc: Daniel Lezcano, Thomas Gleixner, linux-kernel, Stable,
Srikanth Krishnakar, Cedric Hombourger, Vipul Kumar
On Wed, Dec 18, 2019 at 09:00:39PM +0530, Vipul Kumar wrote:
> From: Vipul Kumar <vipul_kumar@mentor.com>
>
> 'commit f3a02ecebed7 ("x86/tsc: Set TSC_KNOWN_FREQ and TSC_RELIABLE
> flags on Intel Atom SoCs")', causing time drift for Bay trail SoC.
> These flags are set for SoCs having cpuid_level 0x15 or more.
> Bay trail is having cpuid_level 0xb.
>
> So, unset both flags to make sure the clocksource calibration can
> be done.
>
> Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
> ---
> arch/x86/kernel/tsc_msr.c | 3 +++
> 1 file changed, 3 insertions(+)
<formletter>
This is not the correct way to submit patches for inclusion in the
stable kernel tree. Please read:
https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
for how to do this properly.
</formletter>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2019-12-18 16:26 ` Greg KH
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