[PATCH] ARM: dts: ls1021a: Restore MDIO compatible to gianfar

[PATCH] ARM: dts: ls1021a: Restore MDIO compatible to gianfar

[Vladimir Oltean]

The difference between "fsl,etsec2-mdio" and "gianfar" has to do with
the .get_tbipa function, which calculates the address of the TBIPA
register automatically, if not explicitly specified. [ see
drivers/net/ethernet/freescale/fsl_pq_mdio.c ]. On LS1021A, the TBIPA
register is at offset 0x30 within the port register block, which is what
the "gianfar" method of calculating addresses actually does.

Luckily, the bad "compatible" is inconsequential for ls1021a.dtsi,
because the TBIPA register is explicitly specified via the second "reg"
(<0x0 0x2d10030 0x0 0x4>), so the "get_tbipa" function is dead code.
Nonetheless it's good to restore it to its correct value.

Background discussion:
https://www.spinics.net/lists/stable/msg361156.html

Fixes: c7861adbe37f ("ARM: dts: ls1021: Fix SGMII PCS link remaining down after PHY disconnect")
Reported-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
---
 arch/arm/boot/dts/ls1021a.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 2f6977ada447..63d9f4a066e3 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -728,7 +728,7 @@
 		};
 
 		mdio0: mdio@2d24000 {
-			compatible = "fsl,etsec2-mdio";
+			compatible = "gianfar";
 			device_type = "mdio";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -737,7 +737,7 @@
 		};
 
 		mdio1: mdio@2d64000 {
-			compatible = "fsl,etsec2-mdio";
+			compatible = "gianfar";
 			device_type = "mdio";
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.17.1

Re: [PATCH] ARM: dts: ls1021a: Restore MDIO compatible to gianfar

[Shawn Guo]

On Sun, Jan 26, 2020 at 09:49:50PM +0200, Vladimir Oltean wrote:
> The difference between "fsl,etsec2-mdio" and "gianfar" has to do with
> the .get_tbipa function, which calculates the address of the TBIPA
> register automatically, if not explicitly specified. [ see
> drivers/net/ethernet/freescale/fsl_pq_mdio.c ]. On LS1021A, the TBIPA
> register is at offset 0x30 within the port register block, which is what
> the "gianfar" method of calculating addresses actually does.
> 
> Luckily, the bad "compatible" is inconsequential for ls1021a.dtsi,
> because the TBIPA register is explicitly specified via the second "reg"
> (<0x0 0x2d10030 0x0 0x4>), so the "get_tbipa" function is dead code.
> Nonetheless it's good to restore it to its correct value.
> 
> Background discussion:
> https://www.spinics.net/lists/stable/msg361156.html
> 
> Fixes: c7861adbe37f ("ARM: dts: ls1021: Fix SGMII PCS link remaining down after PHY disconnect")
> Reported-by: Pavel Machek <pavel@denx.de>
> Signed-off-by: Vladimir Oltean <olteanv@gmail.com>

Applied, thanks.