From: Thadeu Lima de Souza Cascardo <cascardo@canonical.com>
To: stable@vger.kernel.org
Cc: x86@kernel.org, kvm@vger.kernel.org, bp@alien8.de,
pbonzini@redhat.com, peterz@infradead.org, jpoimboe@kernel.org
Subject: [PATCH 5.4 23/37] x86/speculation: Remove x86_spec_ctrl_mask
Date: Mon, 3 Oct 2022 10:10:24 -0300 [thread overview]
Message-ID: <20221003131038.12645-24-cascardo@canonical.com> (raw)
In-Reply-To: <20221003131038.12645-1-cascardo@canonical.com>
From: Josh Poimboeuf <jpoimboe@kernel.org>
commit acac5e98ef8d638a411cfa2ee676c87e1973f126 upstream.
This mask has been made redundant by kvm_spec_ctrl_test_value(). And it
doesn't even work when MSR interception is disabled, as the guest can
just write to SPEC_CTRL directly.
Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@canonical.com>
---
arch/x86/kernel/cpu/bugs.c | 31 +------------------------------
1 file changed, 1 insertion(+), 30 deletions(-)
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 9176a0bde0ed..7198ae236a20 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -83,12 +83,6 @@ u64 spec_ctrl_current(void)
}
EXPORT_SYMBOL_GPL(spec_ctrl_current);
-/*
- * The vendor and possibly platform specific bits which can be modified in
- * x86_spec_ctrl_base.
- */
-static u64 __ro_after_init x86_spec_ctrl_mask = SPEC_CTRL_IBRS;
-
/*
* AMD specific MSR info for Speculative Store Bypass control.
* x86_amd_ls_cfg_ssbd_mask is initialized in identify_boot_cpu().
@@ -137,10 +131,6 @@ void __init check_bugs(void)
if (boot_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))
rdmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
- /* Allow STIBP in MSR_SPEC_CTRL if supported */
- if (boot_cpu_has(X86_FEATURE_STIBP))
- x86_spec_ctrl_mask |= SPEC_CTRL_STIBP;
-
/* Select the proper CPU mitigations before patching alternatives: */
spectre_v1_select_mitigation();
spectre_v2_select_mitigation();
@@ -198,19 +188,10 @@ void __init check_bugs(void)
void
x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest)
{
- u64 msrval, guestval, hostval = spec_ctrl_current();
+ u64 msrval, guestval = guest_spec_ctrl, hostval = spec_ctrl_current();
struct thread_info *ti = current_thread_info();
- /* Is MSR_SPEC_CTRL implemented ? */
if (static_cpu_has(X86_FEATURE_MSR_SPEC_CTRL)) {
- /*
- * Restrict guest_spec_ctrl to supported values. Clear the
- * modifiable bits in the host base value and or the
- * modifiable bits from the guest value.
- */
- guestval = hostval & ~x86_spec_ctrl_mask;
- guestval |= guest_spec_ctrl & x86_spec_ctrl_mask;
-
if (hostval != guestval) {
msrval = setguest ? guestval : hostval;
wrmsrl(MSR_IA32_SPEC_CTRL, msrval);
@@ -1542,16 +1523,6 @@ static enum ssb_mitigation __init __ssb_select_mitigation(void)
break;
}
- /*
- * If SSBD is controlled by the SPEC_CTRL MSR, then set the proper
- * bit in the mask to allow guests to use the mitigation even in the
- * case where the host does not enable it.
- */
- if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||
- static_cpu_has(X86_FEATURE_AMD_SSBD)) {
- x86_spec_ctrl_mask |= SPEC_CTRL_SSBD;
- }
-
/*
* We have three CPU feature flags that are in play here:
* - X86_BUG_SPEC_STORE_BYPASS - CPU is susceptible.
--
2.34.1
next prev parent reply other threads:[~2022-10-03 13:13 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-03 13:10 [PATCH 5.4 00/37] IBRS support // Retbleed mitigations Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 01/37] Revert "x86/speculation: Add RSB VM Exit protections" Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 02/37] Revert "x86/cpu: Add a steppings field to struct x86_cpu_id" Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 03/37] x86/devicetable: Move x86 specific macro out of generic code Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 04/37] x86/cpu: Add consistent CPU match macros Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 05/37] x86/cpu: Add a steppings field to struct x86_cpu_id Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 06/37] x86/kvm/vmx: Make noinstr clean Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 07/37] x86/cpufeatures: Move RETPOLINE flags to word 11 Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 08/37] x86/bugs: Report AMD retbleed vulnerability Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 09/37] x86/bugs: Add AMD retbleed= boot parameter Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 10/37] x86/bugs: Keep a per-CPU IA32_SPEC_CTRL value Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 11/37] x86/entry: Remove skip_r11rcx Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 12/37] x86/entry: Add kernel IBRS implementation Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 13/37] x86/bugs: Optimize SPEC_CTRL MSR writes Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 14/37] x86/speculation: Add spectre_v2=ibrs option to support Kernel IBRS Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 15/37] x86/bugs: Split spectre_v2_select_mitigation() and spectre_v2_user_select_mitigation() Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 16/37] x86/bugs: Report Intel retbleed vulnerability Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 17/37] intel_idle: Disable IBRS during long idle Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 18/37] x86/speculation: Change FILL_RETURN_BUFFER to work with objtool Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 19/37] x86/speculation: Fix RSB filling with CONFIG_RETPOLINE=n Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 20/37] x86/speculation: Fix firmware entry SPEC_CTRL handling Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 21/37] x86/speculation: Fix SPEC_CTRL write on SMT state change Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 22/37] x86/speculation: Use cached host SPEC_CTRL value for guest entry/exit Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` Thadeu Lima de Souza Cascardo [this message]
2022-10-03 13:10 ` [PATCH 5.4 24/37] KVM/VMX: Use TEST %REG,%REG instead of CMP $0,%REG in vmenter.S Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 25/37] KVM/nVMX: Use __vmx_vcpu_run in nested_vmx_check_vmentry_hw Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 26/37] KVM: VMX: Flatten __vmx_vcpu_run() Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 27/37] KVM: VMX: Convert launched argument to flags Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 28/37] KVM: VMX: Prevent guest RSB poisoning attacks with eIBRS Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 29/37] KVM: VMX: Fix IBRS handling after vmexit Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 30/37] x86/speculation: Fill RSB on vmexit for IBRS Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 31/37] x86/common: Stamp out the stepping madness Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 32/37] x86/cpu/amd: Enumerate BTC_NO Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 33/37] x86/bugs: Add Cannon lake to RETBleed affected CPU list Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 34/37] x86/speculation: Disable RRSBA behavior Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 35/37] x86/speculation: Use DECLARE_PER_CPU for x86_spec_ctrl_current Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 36/37] x86/bugs: Warn when "ibrs" mitigation is selected on Enhanced IBRS parts Thadeu Lima de Souza Cascardo
2022-10-03 13:10 ` [PATCH 5.4 37/37] x86/speculation: Add RSB VM Exit protections Thadeu Lima de Souza Cascardo
2022-10-05 10:34 ` [PATCH 5.4 00/37] IBRS support // Retbleed mitigations Greg KH
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