From: Frank Wunderlich <frank-w@public-files.de>
To: Rob Herring <robh@kernel.org>
Cc: "Frank Wunderlich" <linux@fw-web.de>,
"Michael Riesch" <michael.riesch@wolfvision.net>,
"Vinod Koul" <vkoul@kernel.org>,
"Johan Jonker" <jbx6244@gmail.com>,
linux-rockchip@lists.infradead.org, linux-pci@vger.kernel.org,
"Kishon Vijay Abraham I" <kishon@ti.com>,
linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Peter Geis" <pgwipeout@gmail.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
"Krzysztof Wilczyński" <kw@linux.com>
Subject: Aw: Re: Re: [RFC v3 1/5] dt-bindings: phy: rockchip: add PCIe v3 phy
Date: Thu, 2 Jun 2022 15:47:42 +0200 [thread overview]
Message-ID: <trinity-b1d8205a-3354-42e7-8784-0a0cfd7e8a36-1654177662388@3c-app-gmx-bs39> (raw)
In-Reply-To: <trinity-940b8fcf-17e7-4445-8aeb-e17f36b41b4b-1653047439840@3c-app-gmx-bap67>
> Gesendet: Freitag, 20. Mai 2022 um 13:50 Uhr
> Von: "Frank Wunderlich" <frank-w@public-files.de>
> An: "Rob Herring" <robh@kernel.org>
> Hi,
>
> fixed reg-error by using 32bit-address in example, in my test output is clean.
>
> +++ b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
> @@ -68,7 +68,7 @@ examples:
> #include <dt-bindings/clock/rk3568-cru.h>
> pcie30phy: phy@fe8c0000 {
> compatible = "rockchip,rk3568-pcie3-phy";
> - reg = <0x0 0xfe8c0000 0x0 0x20000>;
> + reg = <0xfe8c0000 0x20000>;
>
>
> i hope yours is clean too
have you tried it?
> regarding data-lanes instead of own lane-map, Peter and me only find this in special
> bindings outside the phy-"namespace" like this.
>
> https://elixir.bootlin.com/linux/v5.18-rc7/source/Documentation/devicetree/bindings/media/video-interfaces.yaml#L157
>
> do you mean converting this binding and add it there and base out binding on it?
>
> https://elixir.bootlin.com/linux/v5.18-rc7/source/Documentation/devicetree/bindings/phy/phy-bindings.txt
is this the right binding to add the data-lanes or do you refer another one (have not found phy-provider)?
regards Frank
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: Frank Wunderlich <frank-w@public-files.de>
To: Rob Herring <robh@kernel.org>
Cc: "Frank Wunderlich" <linux@fw-web.de>,
"Michael Riesch" <michael.riesch@wolfvision.net>,
"Vinod Koul" <vkoul@kernel.org>,
"Johan Jonker" <jbx6244@gmail.com>,
linux-rockchip@lists.infradead.org, linux-pci@vger.kernel.org,
"Kishon Vijay Abraham I" <kishon@ti.com>,
linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Peter Geis" <pgwipeout@gmail.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
"Krzysztof Wilczyński" <kw@linux.com>
Subject: Aw: Re: Re: [RFC v3 1/5] dt-bindings: phy: rockchip: add PCIe v3 phy
Date: Thu, 2 Jun 2022 15:47:42 +0200 [thread overview]
Message-ID: <trinity-b1d8205a-3354-42e7-8784-0a0cfd7e8a36-1654177662388@3c-app-gmx-bs39> (raw)
In-Reply-To: <trinity-940b8fcf-17e7-4445-8aeb-e17f36b41b4b-1653047439840@3c-app-gmx-bap67>
> Gesendet: Freitag, 20. Mai 2022 um 13:50 Uhr
> Von: "Frank Wunderlich" <frank-w@public-files.de>
> An: "Rob Herring" <robh@kernel.org>
> Hi,
>
> fixed reg-error by using 32bit-address in example, in my test output is clean.
>
> +++ b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
> @@ -68,7 +68,7 @@ examples:
> #include <dt-bindings/clock/rk3568-cru.h>
> pcie30phy: phy@fe8c0000 {
> compatible = "rockchip,rk3568-pcie3-phy";
> - reg = <0x0 0xfe8c0000 0x0 0x20000>;
> + reg = <0xfe8c0000 0x20000>;
>
>
> i hope yours is clean too
have you tried it?
> regarding data-lanes instead of own lane-map, Peter and me only find this in special
> bindings outside the phy-"namespace" like this.
>
> https://elixir.bootlin.com/linux/v5.18-rc7/source/Documentation/devicetree/bindings/media/video-interfaces.yaml#L157
>
> do you mean converting this binding and add it there and base out binding on it?
>
> https://elixir.bootlin.com/linux/v5.18-rc7/source/Documentation/devicetree/bindings/phy/phy-bindings.txt
is this the right binding to add the data-lanes or do you refer another one (have not found phy-provider)?
regards Frank
WARNING: multiple messages have this Message-ID (diff)
From: Frank Wunderlich <frank-w@public-files.de>
To: Rob Herring <robh@kernel.org>
Cc: "Frank Wunderlich" <linux@fw-web.de>,
"Michael Riesch" <michael.riesch@wolfvision.net>,
"Vinod Koul" <vkoul@kernel.org>,
"Johan Jonker" <jbx6244@gmail.com>,
linux-rockchip@lists.infradead.org, linux-pci@vger.kernel.org,
"Kishon Vijay Abraham I" <kishon@ti.com>,
linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Peter Geis" <pgwipeout@gmail.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
"Krzysztof Wilczyński" <kw@linux.com>
Subject: Aw: Re: Re: [RFC v3 1/5] dt-bindings: phy: rockchip: add PCIe v3 phy
Date: Thu, 2 Jun 2022 15:47:42 +0200 [thread overview]
Message-ID: <trinity-b1d8205a-3354-42e7-8784-0a0cfd7e8a36-1654177662388@3c-app-gmx-bs39> (raw)
In-Reply-To: <trinity-940b8fcf-17e7-4445-8aeb-e17f36b41b4b-1653047439840@3c-app-gmx-bap67>
> Gesendet: Freitag, 20. Mai 2022 um 13:50 Uhr
> Von: "Frank Wunderlich" <frank-w@public-files.de>
> An: "Rob Herring" <robh@kernel.org>
> Hi,
>
> fixed reg-error by using 32bit-address in example, in my test output is clean.
>
> +++ b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
> @@ -68,7 +68,7 @@ examples:
> #include <dt-bindings/clock/rk3568-cru.h>
> pcie30phy: phy@fe8c0000 {
> compatible = "rockchip,rk3568-pcie3-phy";
> - reg = <0x0 0xfe8c0000 0x0 0x20000>;
> + reg = <0xfe8c0000 0x20000>;
>
>
> i hope yours is clean too
have you tried it?
> regarding data-lanes instead of own lane-map, Peter and me only find this in special
> bindings outside the phy-"namespace" like this.
>
> https://elixir.bootlin.com/linux/v5.18-rc7/source/Documentation/devicetree/bindings/media/video-interfaces.yaml#L157
>
> do you mean converting this binding and add it there and base out binding on it?
>
> https://elixir.bootlin.com/linux/v5.18-rc7/source/Documentation/devicetree/bindings/phy/phy-bindings.txt
is this the right binding to add the data-lanes or do you refer another one (have not found phy-provider)?
regards Frank
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Frank Wunderlich <frank-w@public-files.de>
To: Rob Herring <robh@kernel.org>
Cc: "Frank Wunderlich" <linux@fw-web.de>,
"Michael Riesch" <michael.riesch@wolfvision.net>,
"Vinod Koul" <vkoul@kernel.org>,
"Johan Jonker" <jbx6244@gmail.com>,
linux-rockchip@lists.infradead.org, linux-pci@vger.kernel.org,
"Kishon Vijay Abraham I" <kishon@ti.com>,
linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Peter Geis" <pgwipeout@gmail.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
"Krzysztof Wilczyński" <kw@linux.com>
Subject: Aw: Re: Re: [RFC v3 1/5] dt-bindings: phy: rockchip: add PCIe v3 phy
Date: Thu, 2 Jun 2022 15:47:42 +0200 [thread overview]
Message-ID: <trinity-b1d8205a-3354-42e7-8784-0a0cfd7e8a36-1654177662388@3c-app-gmx-bs39> (raw)
In-Reply-To: <trinity-940b8fcf-17e7-4445-8aeb-e17f36b41b4b-1653047439840@3c-app-gmx-bap67>
> Gesendet: Freitag, 20. Mai 2022 um 13:50 Uhr
> Von: "Frank Wunderlich" <frank-w@public-files.de>
> An: "Rob Herring" <robh@kernel.org>
> Hi,
>
> fixed reg-error by using 32bit-address in example, in my test output is clean.
>
> +++ b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
> @@ -68,7 +68,7 @@ examples:
> #include <dt-bindings/clock/rk3568-cru.h>
> pcie30phy: phy@fe8c0000 {
> compatible = "rockchip,rk3568-pcie3-phy";
> - reg = <0x0 0xfe8c0000 0x0 0x20000>;
> + reg = <0xfe8c0000 0x20000>;
>
>
> i hope yours is clean too
have you tried it?
> regarding data-lanes instead of own lane-map, Peter and me only find this in special
> bindings outside the phy-"namespace" like this.
>
> https://elixir.bootlin.com/linux/v5.18-rc7/source/Documentation/devicetree/bindings/media/video-interfaces.yaml#L157
>
> do you mean converting this binding and add it there and base out binding on it?
>
> https://elixir.bootlin.com/linux/v5.18-rc7/source/Documentation/devicetree/bindings/phy/phy-bindings.txt
is this the right binding to add the data-lanes or do you refer another one (have not found phy-provider)?
regards Frank
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-06-02 13:48 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-14 11:59 [RFC v3 0/5] RK3568 PCIe V3 support Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 11:59 ` [RFC v3 1/5] dt-bindings: phy: rockchip: add PCIe v3 phy Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 20:44 ` Krzysztof Kozlowski
2022-05-14 20:44 ` Krzysztof Kozlowski
2022-05-14 20:44 ` Krzysztof Kozlowski
2022-05-14 20:44 ` Krzysztof Kozlowski
2022-05-14 23:14 ` Rob Herring
2022-05-14 23:14 ` Rob Herring
2022-05-14 23:14 ` Rob Herring
2022-05-14 23:14 ` Rob Herring
2022-05-15 11:49 ` Aw: " Frank Wunderlich
2022-05-15 11:49 ` Frank Wunderlich
2022-05-15 11:49 ` Frank Wunderlich
2022-05-15 11:49 ` Frank Wunderlich
2022-05-16 17:35 ` Rob Herring
2022-05-16 17:35 ` Rob Herring
2022-05-16 17:35 ` Rob Herring
2022-05-16 17:35 ` Rob Herring
2022-05-16 19:21 ` Frank Wunderlich
2022-05-16 19:21 ` Frank Wunderlich
2022-05-16 19:21 ` Frank Wunderlich
2022-05-16 19:21 ` Frank Wunderlich
2022-05-18 15:55 ` Rob Herring
2022-05-18 15:55 ` Rob Herring
2022-05-18 15:55 ` Rob Herring
2022-05-18 15:55 ` Rob Herring
2022-05-20 11:50 ` Aw: " Frank Wunderlich
2022-05-20 11:50 ` Frank Wunderlich
2022-05-20 11:50 ` Frank Wunderlich
2022-05-20 11:50 ` Frank Wunderlich
2022-06-02 13:47 ` Frank Wunderlich [this message]
2022-06-02 13:47 ` Frank Wunderlich
2022-06-02 13:47 ` Frank Wunderlich
2022-06-02 13:47 ` Frank Wunderlich
2022-05-14 11:59 ` [RFC v3 2/5] dt-bindings: soc: grf: add pcie30-{phy,pipe}-grf Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 20:43 ` Krzysztof Kozlowski
2022-05-14 20:43 ` Krzysztof Kozlowski
2022-05-14 20:43 ` Krzysztof Kozlowski
2022-05-14 20:43 ` Krzysztof Kozlowski
2022-05-14 11:59 ` [RFC v3 3/5] phy: rockchip: Support PCIe v3 Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 11:59 ` [RFC v3 4/5] arm64: dts: rockchip: rk3568: Add PCIe v3 nodes Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 11:59 ` [RFC v3 5/5] arm64: dts: rockchip: Add PCIe v3 nodes to BPI-R2-Pro Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
2022-05-14 11:59 ` Frank Wunderlich
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