* [PULL v2] u-boot-riscv/next
@ 2021-06-16 12:48 Leo Liang
2021-06-16 14:59 ` Tom Rini
0 siblings, 1 reply; 5+ messages in thread
From: Leo Liang @ 2021-06-16 12:48 UTC (permalink / raw)
To: trini; +Cc: u-boot, rick, bmeng.cn
Hi Tom,
Please pull u-boot-riscv/next into -next.
The following changes on the "next" branch since commit c4737cd594b5c4c47aff789fc53f7dd36ed03c94:
Merge tag 'xilinx-for-v2021.07-rc5' of https://source.denx.de/u-boot/custodians/u-boot-microblaze (2021-06-11 08:29:34 -0400)
are available in the Git repository at:
git@source.denx.de:u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to d1d256e1635684615182aaf62b077233c3360f7e:
riscv: andes_plic: Fix riscv_get_ipi() mask (2021-06-16 16:20:13 +0800)
CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/7857
----------------------------------------------------------------
Bin Meng (7):
riscv: ae350: dts: Add SPDX license header
riscv: ae350: dts: Remove the unnecessary space in bootargs
riscv: ae350: dts: Remove the unnecessary #address-cells in plic nodes
riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bit
riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL config
riscv: ae350: doc: Remove CONFIG_SKIP_LOWLEVEL_INIT
riscv: andes_plic: Fix riscv_get_ipi() mask
Sean Anderson (11):
clk: Allow force setting clock defaults before relocation
clk: k210: Rewrite to remove CCF
clk: k210: Move pll into the rest of the driver
clk: k210: Implement soc_clk_dump
clk: k210: Re-add support for setting rate
clk: k210: Don't set PLL rates if we are already at the correct rate
clk: k210: Remove bypass driver
clk: k210: Move k210 clock out of its own subdirectory
k210: dts: Set PLL1 to the same rate as PLL0
k210: Don't imply CCF
test: Add K210 PLL tests to sandbox defconfigs
MAINTAINERS | 4 +-
arch/riscv/dts/ae350-u-boot.dtsi | 52 ++
arch/riscv/dts/ae350_32.dts | 9 +-
arch/riscv/dts/ae350_64.dts | 7 +-
arch/riscv/dts/k210.dtsi | 2 +
arch/riscv/lib/andes_plic.c | 4 +-
board/sipeed/maix/Kconfig | 2 -
configs/sandbox64_defconfig | 2 +
configs/sandbox_defconfig | 2 +
configs/sandbox_flattree_defconfig | 2 +
configs/sipeed_maix_bitm_defconfig | 2 +-
doc/board/AndesTech/ax25-ae350.rst | 19 +-
drivers/clk/Kconfig | 14 +-
drivers/clk/Makefile | 2 +-
drivers/clk/clk-uclass.c | 27 +-
drivers/clk/clk_kendryte.c | 1320 +++++++++++++++++++++++++++++++
drivers/clk/kendryte/Kconfig | 12 -
drivers/clk/kendryte/Makefile | 1 -
drivers/clk/kendryte/bypass.c | 273 -------
drivers/clk/kendryte/clk.c | 668 ----------------
drivers/clk/kendryte/pll.c | 585 --------------
drivers/clk/rockchip/clk_rk3308.c | 2 +-
drivers/core/device.c | 2 +-
drivers/net/gmac_rockchip.c | 2 +-
include/clk.h | 30 +-
include/dt-bindings/clock/k210-sysctl.h | 94 ++-
include/kendryte/bypass.h | 31 -
include/kendryte/clk.h | 35 -
include/kendryte/pll.h | 34 -
29 files changed, 1505 insertions(+), 1734 deletions(-)
create mode 100644 arch/riscv/dts/ae350-u-boot.dtsi
create mode 100644 drivers/clk/clk_kendryte.c
delete mode 100644 drivers/clk/kendryte/Kconfig
delete mode 100644 drivers/clk/kendryte/Makefile
delete mode 100644 drivers/clk/kendryte/bypass.c
delete mode 100644 drivers/clk/kendryte/clk.c
delete mode 100644 drivers/clk/kendryte/pll.c
delete mode 100644 include/kendryte/bypass.h
delete mode 100644 include/kendryte/clk.h
Best regards,
Leo
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PULL v2] u-boot-riscv/next
2021-06-16 12:48 [PULL v2] u-boot-riscv/next Leo Liang
@ 2021-06-16 14:59 ` Tom Rini
2021-06-16 22:58 ` Bin Meng
2021-06-17 1:49 ` Leo Liang
0 siblings, 2 replies; 5+ messages in thread
From: Tom Rini @ 2021-06-16 14:59 UTC (permalink / raw)
To: Leo Liang; +Cc: u-boot, rick, bmeng.cn
[-- Attachment #1: Type: text/plain, Size: 984 bytes --]
On Wed, Jun 16, 2021 at 08:48:40PM +0800, Leo Liang wrote:
> Hi Tom,
>
> Please pull u-boot-riscv/next into -next.
>
> The following changes on the "next" branch since commit c4737cd594b5c4c47aff789fc53f7dd36ed03c94:
>
> Merge tag 'xilinx-for-v2021.07-rc5' of https://source.denx.de/u-boot/custodians/u-boot-microblaze (2021-06-11 08:29:34 -0400)
>
> are available in the Git repository at:
>
> git@source.denx.de:u-boot/custodians/u-boot-riscv.git
>
> for you to fetch changes up to d1d256e1635684615182aaf62b077233c3360f7e:
>
> riscv: andes_plic: Fix riscv_get_ipi() mask (2021-06-16 16:20:13 +0800)
>
> CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/7857
>
This is not based on u-boot/next, but rather on u-boot/master. Is there
something currently in master that you need for this PR? If so, I can
merge in a later -rc tag. Otherwise please rebase this on next itself,
thanks.
--
Tom
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PULL v2] u-boot-riscv/next
2021-06-16 14:59 ` Tom Rini
@ 2021-06-16 22:58 ` Bin Meng
2021-06-17 1:51 ` Leo Liang
2021-06-17 1:49 ` Leo Liang
1 sibling, 1 reply; 5+ messages in thread
From: Bin Meng @ 2021-06-16 22:58 UTC (permalink / raw)
To: Tom Rini; +Cc: Leo Liang, U-Boot Mailing List, Rick Chen
Hi Leo,
On Wed, Jun 16, 2021 at 10:59 PM Tom Rini <trini@konsulko.com> wrote:
>
> On Wed, Jun 16, 2021 at 08:48:40PM +0800, Leo Liang wrote:
>
> > Hi Tom,
> >
> > Please pull u-boot-riscv/next into -next.
> >
> > The following changes on the "next" branch since commit c4737cd594b5c4c47aff789fc53f7dd36ed03c94:
> >
> > Merge tag 'xilinx-for-v2021.07-rc5' of https://source.denx.de/u-boot/custodians/u-boot-microblaze (2021-06-11 08:29:34 -0400)
> >
> > are available in the Git repository at:
> >
> > git@source.denx.de:u-boot/custodians/u-boot-riscv.git
> >
> > for you to fetch changes up to d1d256e1635684615182aaf62b077233c3360f7e:
> >
> > riscv: andes_plic: Fix riscv_get_ipi() mask (2021-06-16 16:20:13 +0800)
> >
> > CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/7857
> >
>
> This is not based on u-boot/next, but rather on u-boot/master. Is there
> something currently in master that you need for this PR? If so, I can
> merge in a later -rc tag. Otherwise please rebase this on next itself,
> thanks.
I think the Andes DTS fixes by me can be in u-boot/master for the next -rc.
Sean's changes sounds like for u-boot/next.
Regards,
Bin
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PULL v2] u-boot-riscv/next
2021-06-16 14:59 ` Tom Rini
2021-06-16 22:58 ` Bin Meng
@ 2021-06-17 1:49 ` Leo Liang
1 sibling, 0 replies; 5+ messages in thread
From: Leo Liang @ 2021-06-17 1:49 UTC (permalink / raw)
To: Tom Rini; +Cc: u-boot, rick, bmeng.cn
On Wed, Jun 16, 2021 at 10:59:18AM -0400, Tom Rini wrote:
> On Wed, Jun 16, 2021 at 08:48:40PM +0800, Leo Liang wrote:
>
> > Hi Tom,
> >
> > Please pull u-boot-riscv/next into -next.
> >
> > The following changes on the "next" branch since commit c4737cd594b5c4c47aff789fc53f7dd36ed03c94:
> >
> > Merge tag 'xilinx-for-v2021.07-rc5' of https://source.denx.de/u-boot/custodians/u-boot-microblaze (2021-06-11 08:29:34 -0400)
> >
> > are available in the Git repository at:
> >
> > git@source.denx.de:u-boot/custodians/u-boot-riscv.git
> >
> > for you to fetch changes up to d1d256e1635684615182aaf62b077233c3360f7e:
> >
> > riscv: andes_plic: Fix riscv_get_ipi() mask (2021-06-16 16:20:13 +0800)
> >
> > CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/7857
> >
>
> This is not based on u-boot/next, but rather on u-boot/master. Is there
> something currently in master that you need for this PR? If so, I can
> merge in a later -rc tag. Otherwise please rebase this on next itself,
> thanks.
>
> --
> Tom
Hi Tom,
Sorry for the confusion.
I think I will follow Bin's suggestion,
split it into two PRs,
the fixes for -rc, and k210 clk for next,
and re-send it later.
Thanks for your help and heads up!
Best regards,
Leo
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PULL v2] u-boot-riscv/next
2021-06-16 22:58 ` Bin Meng
@ 2021-06-17 1:51 ` Leo Liang
0 siblings, 0 replies; 5+ messages in thread
From: Leo Liang @ 2021-06-17 1:51 UTC (permalink / raw)
To: Bin Meng
Cc: Tom Rini, U-Boot Mailing List,
Rick Jian-Zhi Chen(陳建志)
On Thu, Jun 17, 2021 at 06:58:01AM +0800, Bin Meng wrote:
> Hi Leo,
>
> On Wed, Jun 16, 2021 at 10:59 PM Tom Rini <trini@konsulko.com> wrote:
> >
> > On Wed, Jun 16, 2021 at 08:48:40PM +0800, Leo Liang wrote:
> >
> > > Hi Tom,
> > >
> > > Please pull u-boot-riscv/next into -next.
> > >
> > > The following changes on the "next" branch since commit c4737cd594b5c4c47aff789fc53f7dd36ed03c94:
> > >
> > > Merge tag 'xilinx-for-v2021.07-rc5' of https://source.denx.de/u-boot/custodians/u-boot-microblaze (2021-06-11 08:29:34 -0400)
> > >
> > > are available in the Git repository at:
> > >
> > > git@source.denx.de:u-boot/custodians/u-boot-riscv.git
> > >
> > > for you to fetch changes up to d1d256e1635684615182aaf62b077233c3360f7e:
> > >
> > > riscv: andes_plic: Fix riscv_get_ipi() mask (2021-06-16 16:20:13 +0800)
> > >
> > > CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/7857
> > >
> >
> > This is not based on u-boot/next, but rather on u-boot/master. Is there
> > something currently in master that you need for this PR? If so, I can
> > merge in a later -rc tag. Otherwise please rebase this on next itself,
> > thanks.
>
> I think the Andes DTS fixes by me can be in u-boot/master for the next -rc.
>
> Sean's changes sounds like for u-boot/next.
>
> Regards,
> Bin
Hi Bin,
That sounds reasonable.
Thanks for the suggestion,
I will re-send them later.
Best regards,
Leo
^ permalink raw reply [flat|nested] 5+ messages in thread
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2021-06-16 12:48 [PULL v2] u-boot-riscv/next Leo Liang
2021-06-16 14:59 ` Tom Rini
2021-06-16 22:58 ` Bin Meng
2021-06-17 1:51 ` Leo Liang
2021-06-17 1:49 ` Leo Liang
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