[PATCH 0/3] clk: Some build infrastructure cleanups

[PATCH 0/3] clk: Some build infrastructure cleanups

[Sean Anderson]

This makes some minor clean ups to the clock build infrastructure.


Sean Anderson (3):
  clk: Alphabetize Makefile
  clk: Alphabetize Kconfig
  clk: Rename ICS8N3QV01 to CLK_ICS8N3QV01

 configs/gazerbeam_defconfig |   2 +-
 drivers/clk/Kconfig         | 182 ++++++++++++++++++------------------
 drivers/clk/Makefile        |  20 ++--
 3 files changed, 102 insertions(+), 102 deletions(-)

-- 
2.33.0

[PATCH 1/3] clk: Alphabetize Makefile

[Sean Anderson]

This alphabetizes the clock makefile by Kconfig option. This will help
prevent merge conflicts.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
---

 drivers/clk/Makefile | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 711ae5bc29..cf559ff759 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -15,41 +15,41 @@ obj-y += analogbits/
 obj-y += imx/
 obj-y += tegra/
 obj-y += ti/
+obj-$(CONFIG_$(SPL_TPL_)CLK_INTEL) += intel/
 obj-$(CONFIG_ARCH_ASPEED) += aspeed/
 obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
-obj-$(CONFIG_ARCH_MTMIPS) += mtmips/
 obj-$(CONFIG_ARCH_MESON) += meson/
+obj-$(CONFIG_ARCH_MTMIPS) += mtmips/
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
 obj-$(CONFIG_ARCH_SOCFPGA) += altera/
+obj-$(CONFIG_ARCH_SUNXI) += sunxi/
 obj-$(CONFIG_CLK_AT91) += at91/
-obj-$(CONFIG_CLK_MVEBU) += mvebu/
 obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o
 obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
+obj-$(CONFIG_CLK_CDCE9XX) += clk-cdce9xx.o
 obj-$(CONFIG_CLK_EXYNOS) += exynos/
-obj-$(CONFIG_$(SPL_TPL_)CLK_INTEL) += intel/
 obj-$(CONFIG_CLK_HSDK) += clk-hsdk-cgu.o
 obj-$(CONFIG_CLK_K210) += clk_kendryte.o
 obj-$(CONFIG_CLK_MPC83XX) += mpc83xx_clk.o
 obj-$(CONFIG_CLK_MPFS) += microchip/
+obj-$(CONFIG_CLK_MVEBU) += mvebu/
 obj-$(CONFIG_CLK_OCTEON) += clk_octeon.o
 obj-$(CONFIG_CLK_OWL) += owl/
 obj-$(CONFIG_CLK_RENESAS) += renesas/
 obj-$(CONFIG_CLK_SCMI) += clk_scmi.o
 obj-$(CONFIG_CLK_SIFIVE) += sifive/
-obj-$(CONFIG_ARCH_SUNXI) += sunxi/
 obj-$(CONFIG_CLK_STM32F) += clk_stm32f.o
 obj-$(CONFIG_CLK_STM32MP1) += clk_stm32mp1.o
 obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
+obj-$(CONFIG_CLK_VERSACLOCK) += clk_versaclock.o
+obj-$(CONFIG_CLK_VERSAL) += clk_versal.o
 obj-$(CONFIG_CLK_VEXPRESS_OSC) += clk_vexpress_osc.o
+obj-$(CONFIG_CLK_XLNX_CLKWZRD) += clk-xlnx-clock-wizard.o
 obj-$(CONFIG_CLK_ZYNQ) += clk_zynq.o
 obj-$(CONFIG_CLK_ZYNQMP) += clk_zynqmp.o
-obj-$(CONFIG_CLK_XLNX_CLKWZRD) += clk-xlnx-clock-wizard.o
 obj-$(CONFIG_ICS8N3QV01) += ics8n3qv01.o
 obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
+obj-$(CONFIG_SANDBOX_CLK_CCF) += clk_sandbox_ccf.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
-obj-$(CONFIG_SANDBOX_CLK_CCF) += clk_sandbox_ccf.o
 obj-$(CONFIG_STM32H7) += clk_stm32h7.o
-obj-$(CONFIG_CLK_VERSAL) += clk_versal.o
-obj-$(CONFIG_CLK_CDCE9XX) += clk-cdce9xx.o
-obj-$(CONFIG_CLK_VERSACLOCK) += clk_versaclock.o
-- 
2.33.0

[PATCH 2/3] clk: Alphabetize Kconfig

[Sean Anderson]

This alphabetizes the Kconfig for the clock subsystem. This will help
people find their clocks, and help prevent merge conflicts.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
---

 drivers/clk/Kconfig | 182 ++++++++++++++++++++++----------------------
 1 file changed, 91 insertions(+), 91 deletions(-)

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index baac8d281e..2cd03c2515 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -30,22 +30,6 @@ config TPL_CLK
 	  setting up clocks within TPL, and allows the same drivers to be
 	  used as U-Boot proper.
 
-config CLK_BCM6345
-	bool "Clock controller driver for BCM6345"
-	depends on CLK && ARCH_BMIPS
-	default y
-	help
-	  This clock driver adds support for enabling and disabling peripheral
-	  clocks on BCM6345 SoCs. HW has no rate changing capabilities.
-
-config CLK_BOSTON
-	def_bool y if TARGET_BOSTON
-	depends on CLK
-	select REGMAP
-	select SYSCON
-	help
-	  Enable this to support the clocks
-
 config SPL_CLK_CCF
 	bool "SPL Common Clock Framework [CCF] support "
 	depends on SPL
@@ -73,6 +57,37 @@ config CLK_COMPOSITE_CCF
 	  Enable this option if you want to (re-)use the Linux kernel's Common
 	  Clock Framework [CCF] composite code in U-Boot's clock driver.
 
+config CLK_BCM6345
+	bool "Clock controller driver for BCM6345"
+	depends on CLK && ARCH_BMIPS
+	default y
+	help
+	  This clock driver adds support for enabling and disabling peripheral
+	  clocks on BCM6345 SoCs. HW has no rate changing capabilities.
+
+config CLK_BOSTON
+	def_bool y if TARGET_BOSTON
+	depends on CLK
+	select REGMAP
+	select SYSCON
+	help
+	  Enable this to support the clocks
+
+config CLK_CDCE9XX
+	bool "Enable CDCD9XX clock driver"
+	depends on CLK
+	help
+	   Enable the clock synthesizer driver for CDCE913/925/937/949
+	   series of chips.
+
+config ICS8N3QV01
+	bool "Enable ICS8N3QV01 VCXO driver"
+	depends on CLK
+	help
+	  Support for the ICS8N3QV01 Quad-Frequency VCXO (Voltage-Controlled
+	  Crystal Oscillator). The output frequency can be programmed via an
+	  I2C interface.
+
 config CLK_INTEL
 	bool "Enable clock driver for Intel x86"
 	depends on CLK && X86
@@ -83,6 +98,25 @@ config CLK_INTEL
 	  set up by U-Boot itself but only statically. Thus the driver does not
 	  support changing clock rates, only querying them.
 
+config CLK_K210
+	bool "Clock support for Kendryte K210"
+	depends on CLK
+	help
+	  This enables support clock driver for Kendryte K210 platforms.
+
+config CLK_K210_SET_RATE
+	bool "Enable setting the Kendryte K210 PLL rate"
+	depends on CLK_K210
+	help
+	  Add functionality to calculate new rates for K210 PLLs. Enabling this
+	  feature adds around 1K to U-Boot's final size.
+
+config CLK_MPC83XX
+	bool "Enable MPC83xx clock driver"
+	depends on CLK
+	help
+	  Support for the clock driver of the MPC83xx series of SoCs.
+
 config CLK_OCTEON
 	bool "Clock controller driver for Marvell MIPS Octeon"
 	depends on CLK && ARCH_OCTEON
@@ -90,6 +124,22 @@ config CLK_OCTEON
 	help
 	  Enable this to support the clocks on Octeon MIPS platforms.
 
+config SANDBOX_CLK_CCF
+	bool "Sandbox Common Clock Framework [CCF] support "
+	depends on SANDBOX
+	select CLK_CCF
+	help
+	  Enable this option if you want to test the Linux kernel's Common
+	  Clock Framework [CCF] code in U-Boot's Sandbox clock driver.
+
+config CLK_SCMI
+	bool "Enable SCMI clock driver"
+	depends on SCMI_FIRMWARE
+	help
+	  Enable this option if you want to support clock devices exposed
+	  by a SCMI agent based on SCMI clock protocol communication
+	  with a SCMI server.
+
 config CLK_STM32F
 	bool "Enable clock driver support for STM32F family"
 	depends on CLK && (STM32F7 || STM32F4)
@@ -98,6 +148,14 @@ config CLK_STM32F
 	  This clock driver adds support for RCC clock management
 	  for STM32F4 and STM32F7 SoCs.
 
+config CLK_STM32MP1
+	bool "Enable RCC clock driver for STM32MP1"
+	depends on ARCH_STM32MP && CLK
+	default y
+	help
+	  Enable the STM32 clock (RCC) driver. Enable support for
+	  manipulating STM32MP1's on-SoC clocks.
+
 config CLK_HSDK
 	bool "Enable cgu clock driver for HSDK boards"
 	depends on CLK && TARGET_HSDK
@@ -105,6 +163,15 @@ config CLK_HSDK
 	  Enable this to support the cgu clocks on Synopsys ARC HSDK and
 	  Synopsys ARC HSDK-4xD boards
 
+config CLK_VERSACLOCK
+	tristate "Enable VersaClock 5/6 devices"
+	depends on CLK
+	depends on CLK_CCF
+	depends on OF_CONTROL
+	help
+	  This driver supports the IDT VersaClock 5 and VersaClock 6
+	  programmable clock generators.
+
 config CLK_VERSAL
 	bool "Enable clock driver support for Versal"
 	depends on ARCH_VERSAL
@@ -120,14 +187,6 @@ config CLK_VEXPRESS_OSC
 	  This clock driver adds support for clock generators present on
 	  Arm Versatile Express platforms.
 
-config CLK_ZYNQ
-	bool "Enable clock driver support for Zynq"
-	depends on CLK && ARCH_ZYNQ
-	default y
-	help
-	  This clock driver adds support for clock related settings for
-	  Zynq platform.
-
 config CLK_XLNX_CLKWZRD
 	bool "Xilinx Clocking Wizard"
 	depends on CLK
@@ -139,6 +198,14 @@ config CLK_XLNX_CLKWZRD
 	  set_duty_cycle API, this driver only supports set_rate to modify
 	  the frequency.
 
+config CLK_ZYNQ
+	bool "Enable clock driver support for Zynq"
+	depends on CLK && ARCH_ZYNQ
+	default y
+	help
+	  This clock driver adds support for clock related settings for
+	  Zynq platform.
+
 config CLK_ZYNQMP
 	bool "Enable clock driver support for ZynqMP"
 	depends on ARCH_ZYNQMP
@@ -147,42 +214,6 @@ config CLK_ZYNQMP
 	  This clock driver adds support for clock realted settings for
 	  ZynqMP platform.
 
-config CLK_STM32MP1
-	bool "Enable RCC clock driver for STM32MP1"
-	depends on ARCH_STM32MP && CLK
-	default y
-	help
-	  Enable the STM32 clock (RCC) driver. Enable support for
-	  manipulating STM32MP1's on-SoC clocks.
-
-config CLK_CDCE9XX
-	bool "Enable CDCD9XX clock driver"
-	depends on CLK
-	help
-	   Enable the clock synthesizer driver for CDCE913/925/937/949
-	   series of chips.
-
-config CLK_SCMI
-	bool "Enable SCMI clock driver"
-	depends on SCMI_FIRMWARE
-	help
-	  Enable this option if you want to support clock devices exposed
-	  by a SCMI agent based on SCMI clock protocol communication
-	  with a SCMI server.
-
-config CLK_K210
-	bool "Clock support for Kendryte K210"
-	depends on CLK
-	help
-	  This enables support clock driver for Kendryte K210 platforms.
-
-config CLK_K210_SET_RATE
-	bool "Enable setting the Kendryte K210 PLL rate"
-	depends on CLK_K210
-	help
-	  Add functionality to calculate new rates for K210 PLLs. Enabling this
-	  feature adds around 1K to U-Boot's final size.
-
 source "drivers/clk/analogbits/Kconfig"
 source "drivers/clk/at91/Kconfig"
 source "drivers/clk/exynos/Kconfig"
@@ -198,35 +229,4 @@ source "drivers/clk/tegra/Kconfig"
 source "drivers/clk/ti/Kconfig"
 source "drivers/clk/uniphier/Kconfig"
 
-config ICS8N3QV01
-	bool "Enable ICS8N3QV01 VCXO driver"
-	depends on CLK
-	help
-	  Support for the ICS8N3QV01 Quad-Frequency VCXO (Voltage-Controlled
-	  Crystal Oscillator). The output frequency can be programmed via an
-	  I2C interface.
-
-config CLK_MPC83XX
-	bool "Enable MPC83xx clock driver"
-	depends on CLK
-	help
-	  Support for the clock driver of the MPC83xx series of SoCs.
-
-config SANDBOX_CLK_CCF
-	bool "Sandbox Common Clock Framework [CCF] support "
-	depends on SANDBOX
-	select CLK_CCF
-	help
-	  Enable this option if you want to test the Linux kernel's Common
-	  Clock Framework [CCF] code in U-Boot's Sandbox clock driver.
-
-config CLK_VERSACLOCK
-	tristate "Enable VersaClock 5/6 devices"
-	depends on CLK
-	depends on CLK_CCF
-	depends on OF_CONTROL
-	help
-	  This driver supports the IDT VersaClock 5 and VersaClock 6
-	  programmable clock generators.
-
 endmenu
-- 
2.33.0

[PATCH 3/3] clk: Rename ICS8N3QV01 to CLK_ICS8N3QV01

[Sean Anderson]

This driver was missing a clock prefix. Add one.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
---

 configs/gazerbeam_defconfig | 2 +-
 drivers/clk/Kconfig         | 2 +-
 drivers/clk/Makefile        | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig
index 8232340023..4fff84ced9 100644
--- a/configs/gazerbeam_defconfig
+++ b/configs/gazerbeam_defconfig
@@ -155,7 +155,7 @@ CONFIG_REGMAP=y
 CONFIG_AXI=y
 CONFIG_IHS_AXI=y
 CONFIG_CLK=y
-CONFIG_ICS8N3QV01=y
+CONFIG_CLK_ICS8N3QV01=y
 CONFIG_CPU=y
 CONFIG_CPU_MPC83XX=y
 CONFIG_DM_PCA953X=y
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 2cd03c2515..6dc271f71b 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -80,7 +80,7 @@ config CLK_CDCE9XX
 	   Enable the clock synthesizer driver for CDCE913/925/937/949
 	   series of chips.
 
-config ICS8N3QV01
+config CLK_ICS8N3QV01
 	bool "Enable ICS8N3QV01 VCXO driver"
 	depends on CLK
 	help
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index cf559ff759..f922a7c323 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -47,7 +47,7 @@ obj-$(CONFIG_CLK_VEXPRESS_OSC) += clk_vexpress_osc.o
 obj-$(CONFIG_CLK_XLNX_CLKWZRD) += clk-xlnx-clock-wizard.o
 obj-$(CONFIG_CLK_ZYNQ) += clk_zynq.o
 obj-$(CONFIG_CLK_ZYNQMP) += clk_zynqmp.o
-obj-$(CONFIG_ICS8N3QV01) += ics8n3qv01.o
+obj-$(CONFIG_CLK_ICS8N3QV01) += ics8n3qv01.o
 obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
 obj-$(CONFIG_SANDBOX_CLK_CCF) += clk_sandbox_ccf.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox.o
-- 
2.33.0

Re: [PATCH 0/3] clk: Some build infrastructure cleanups

[Sean Anderson]

On Wed, 15 Dec 2021 11:36:17 -0500, Sean Anderson wrote:
> This makes some minor clean ups to the clock build infrastructure.
> 
> 
> Sean Anderson (3):
>   clk: Alphabetize Makefile
>   clk: Alphabetize Kconfig
>   clk: Rename ICS8N3QV01 to CLK_ICS8N3QV01
> 
> [...]

Applied, thanks!

[1/3] clk: Alphabetize Makefile
      commit: ae77af01ce49135f2406797e6bf048c3ee373405
[2/3] clk: Alphabetize Kconfig
      commit: 742212fcfa8320c37126e059b08e672c9bf2ee45
[3/3] clk: Rename ICS8N3QV01 to CLK_ICS8N3QV01
      commit: 286bddaca3baaf915f0501ac52e6af6cb5eb0a29

Best regards,
-- 
Sean Anderson <seanga2@gmail.com>