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* [uU PATCH 0/8] Integration of sysfw and tispl with U-Boot build
@ 2022-04-01 14:12 Neha Malcom Francis
  2022-04-01 14:12 ` [uU PATCH 1/8] tools: config: yaml: Add board config class to generate config binaries Neha Malcom Francis
                   ` (7 more replies)
  0 siblings, 8 replies; 9+ messages in thread
From: Neha Malcom Francis @ 2022-04-01 14:12 UTC (permalink / raw)
  To: a-govindraju, vigneshr, nm
  Cc: sjg, marek.behun, xypron.glpk, n-francis, s-anna, kristo, kishon,
	bmeng.cn, email2tema, joel.peshkin, ilias.apalodimas,
	patrick.delaunay, mr.nuke.me, u-boot

Devices that belong to the K3 architecture require SYSFW which is a FIT
image consisting of a signed system firmware image and board config
binaries.

Board config binaries are needed to bring up SYSFW during U-Boot SPL
startup. The board config data is given in YAML as input. These board
configs contain board-specific information such as resource management,
power management and security.

The following series intends to plumb the system firmware generation
into U-Boot using binman for packaging. Thus it will eliminate the need
for additional custom repositories for SYSFW generation and also moves t
owards the community standard build flow.

The series also plumbs the generation of tispl.bin into the build flow.
This image is required for loading u-boot in K3 devices. The image is
packaged using ATF, OPTEE and DM (Device Manager).

Please note that the following series has implemented the above for
J721E general purpose board. The board configs and device trees added
are specific to J721E GP devices.

Also note the introduction of two new etypes for sysfw and ti-dm.

The binman tests for sysfw has coverage of 90%, this is believed to be
because of the requirement of sysfw to access a signing script located
outside the binman directory. Logs of the binman test is located here:
https://pastebin.ubuntu.com/p/n5CdT7TFJg/

On running CI tests on Github, errors were produced during world builds
of keystone2_keystone3 and siemens (I0T2050 which is based on AM65x).
This patch series is intended for only J721E and future work is to expand
to the remaining K3 devices as well. The errors that come are mainly due
to the boards other than J721E trying to generate tispl.bin. Error logs
of the CI test is located here:
https://pastebin.ubuntu.com/p/rpMrWzH7tv/

Neha Malcom Francis (8):
  tools: config: yaml: Add board config class to generate config
    binaries
  binman: etype: sysfw: Add entry type for sysfw
  schema: yaml: Add board config schema
  config: yaml: j721e_evm: Add board config for J721E EVM
  binman: sysfw: Add support for packaging tiboot3.bin and sysfw.itb
  binman: dtsi: sysfw: j721e: Use binman to package sysfw.itb
  binman: etype: dm: Add entry type for TI DM
  binman: dtsi: tispl: j721e: Use binman to package tispl.bin

 Makefile                                      |    1 +
 arch/arm/dts/j721e-a72-binman.dtsi            |   92 +
 arch/arm/dts/j721e-r5-binman.dtsi             |   75 +
 .../k3-j721e-common-proc-board-u-boot.dtsi    |    1 +
 .../k3-j721e-r5-common-proc-board-u-boot.dtsi |    1 +
 arch/arm/mach-k3/config.mk                    |   54 +-
 board/ti/common/schema.yaml                   |  355 ++
 board/ti/j721e/Kconfig                        |    2 +
 board/ti/j721e/config.yaml                    | 3162 +++++++++++++++++
 scripts/Makefile.spl                          |    4 -
 test/py/requirements.txt                      |    1 +
 tools/binman/entries.rst                      |   21 +
 tools/binman/etype/sysfw.py                   |   60 +
 tools/binman/etype/ti_dm.py                   |   22 +
 tools/binman/ftest.py                         |   14 +
 tools/binman/test/225_ti_dm.dts               |   13 +
 tools/binman/test/226_sysfw.dts               |   13 +
 tools/tibcfg_gen.py                           |  116 +
 18 files changed, 3969 insertions(+), 38 deletions(-)
 create mode 100644 arch/arm/dts/j721e-a72-binman.dtsi
 create mode 100644 arch/arm/dts/j721e-r5-binman.dtsi
 create mode 100644 board/ti/common/schema.yaml
 create mode 100644 board/ti/j721e/config.yaml
 create mode 100644 tools/binman/etype/sysfw.py
 create mode 100644 tools/binman/etype/ti_dm.py
 create mode 100644 tools/binman/test/225_ti_dm.dts
 create mode 100644 tools/binman/test/226_sysfw.dts
 create mode 100644 tools/tibcfg_gen.py

-- 
2.17.1

Thanking You
Neha Malcom Francis

^ permalink raw reply	[flat|nested] 9+ messages in thread

* [uU PATCH 1/8] tools: config: yaml: Add board config class to generate config binaries
  2022-04-01 14:12 [uU PATCH 0/8] Integration of sysfw and tispl with U-Boot build Neha Malcom Francis
@ 2022-04-01 14:12 ` Neha Malcom Francis
  2022-04-01 14:12 ` [uU PATCH 2/8] binman: etype: sysfw: Add entry type for sysfw Neha Malcom Francis
                   ` (6 subsequent siblings)
  7 siblings, 0 replies; 9+ messages in thread
From: Neha Malcom Francis @ 2022-04-01 14:12 UTC (permalink / raw)
  To: a-govindraju, vigneshr, nm
  Cc: sjg, marek.behun, xypron.glpk, n-francis, s-anna, kristo, kishon,
	bmeng.cn, email2tema, joel.peshkin, ilias.apalodimas,
	patrick.delaunay, mr.nuke.me, u-boot

For validating config files and generating binary config artifacts, here
board specific config class is added.

Add function cfgBinaryGen() in tibcfg_gen.py. It uses TIBoardConfig
class to load given schema and config files in YAML, validate them and
generate binaries.

Signed-off-by: Tarun Sahu <t-sahu@ti.com>
[n-francis@ti.com: prepared patch for upstreaming]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
 test/py/requirements.txt |   1 +
 tools/tibcfg_gen.py      | 116 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 117 insertions(+)
 create mode 100644 tools/tibcfg_gen.py

diff --git a/test/py/requirements.txt b/test/py/requirements.txt
index 33c5c0bbc4..a91ba64563 100644
--- a/test/py/requirements.txt
+++ b/test/py/requirements.txt
@@ -4,6 +4,7 @@ coverage==4.5.4
 extras==1.0.0
 fixtures==3.0.0
 importlib-metadata==0.23
+jsonschema==4.0.0
 linecache2==1.0.0
 more-itertools==7.2.0
 packaging==19.2
diff --git a/tools/tibcfg_gen.py b/tools/tibcfg_gen.py
new file mode 100644
index 0000000000..7635596906
--- /dev/null
+++ b/tools/tibcfg_gen.py
@@ -0,0 +1,116 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# TI Board Configuration Class for Schema Validation and Binary Generation
+#
+
+from jsonschema import validate
+
+import yaml
+import os
+import sys
+
+
+class TIBoardConfig:
+    file_yaml = {}
+    schema_yaml = {}
+    data_rules = {}
+
+    def __init__(self):
+        pass
+
+    def Load(self, file, schema, data_rules=""):
+        with open(file, 'r') as f:
+            self.file_yaml = yaml.safe_load(f)
+        with open(schema, 'r') as sch:
+            self.schema_yaml = yaml.safe_load(sch)
+        self.data_rules = data_rules
+
+    def CheckValidity(self):
+        try:
+            validate(self.file_yaml, self.schema_yaml)
+            return True
+        except Exception as e:
+            print(e)
+            return False
+
+    def __ConvertToByteChunk(self, val, data_type):
+        br = []
+        size = 0
+        if(data_type == "#/definitions/u8"):
+            size = 1
+        elif(data_type == "#/definitions/u16"):
+            size = 2
+        elif(data_type == "#/definitions/u32"):
+            size = 4
+        else:
+            return -1
+        if(type(val) == int):
+            while(val != 0):
+                br = br + [(val & 0xFF)]
+                val = val >> 8
+        while(len(br) < size):
+            br = br + [0]
+        return br
+
+    def __CompileYaml(self, schema_yaml, file_yaml):
+        br = []
+        for key in file_yaml.keys():
+            if not 'type' in schema_yaml['properties'][key]:
+                br = br + \
+                    self.__ConvertToByteChunk(
+                        file_yaml[key], schema_yaml['properties'][key]["$ref"])
+            elif schema_yaml['properties'][key]['type'] == 'object':
+                br = br + \
+                    self.__CompileYaml(
+                        schema_yaml['properties'][key], file_yaml[key])
+            elif schema_yaml['properties'][key]['type'] == 'array':
+                for item in file_yaml[key]:
+                    if not isinstance(item, dict):
+                        br = br + \
+                            self.__ConvertToByteChunk(
+                                item, schema_yaml['properties'][key]['items']["$ref"])
+                    else:
+                        br = br + \
+                            self.__CompileYaml(
+                                schema_yaml['properties'][key]['items'], item)
+        return br
+
+    def GenerateBinaries(self, out_path=""):
+        if not os.path.isdir(out_path):
+            os.mkdir(out_path)
+        if(self.CheckValidity()):
+            for key in self.file_yaml.keys():
+                br = []
+                br = self.__CompileYaml(
+                    self.schema_yaml['properties'][key], self.file_yaml[key])
+                with open(out_path + "/" + key + ".bin", 'wb') as cfg:
+                    cfg.write(bytearray(br))
+        else:
+            raise ValueError("Config YAML Validation failed!")
+
+    def DeleteBinaries(self, out_path=""):
+        if os.path.isdir(out_path):
+            for key in self.file_yaml.keys():
+                if os.path.isfile(out_path + "/" + key + ".bin"):
+                    os.remove(out_path + "/" + key + ".bin")
+
+
+def cfgBinaryGen():
+    """Generate config binaries from YAML config file and YAML schema
+        Arguments:
+            - config_yaml: board config file in YAML
+            - schema_yaml: schema file in YAML to validate config_yaml against
+    Pass the arguments along with the filename in the Makefile.
+    """
+    tibcfg = TIBoardConfig()
+    config_yaml = sys.argv[1]
+    schema_yaml = sys.argv[2]
+    try:
+        tibcfg.Load(config_yaml, schema_yaml)
+    except:
+        raise ValueError("Could not find config files!")
+    tibcfg.GenerateBinaries(os.environ['O'])
+
+
+cfgBinaryGen()
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [uU PATCH 2/8] binman: etype: sysfw: Add entry type for sysfw
  2022-04-01 14:12 [uU PATCH 0/8] Integration of sysfw and tispl with U-Boot build Neha Malcom Francis
  2022-04-01 14:12 ` [uU PATCH 1/8] tools: config: yaml: Add board config class to generate config binaries Neha Malcom Francis
@ 2022-04-01 14:12 ` Neha Malcom Francis
  2022-04-01 14:12 ` [uU PATCH 3/8] schema: yaml: Add board config schema Neha Malcom Francis
                   ` (5 subsequent siblings)
  7 siblings, 0 replies; 9+ messages in thread
From: Neha Malcom Francis @ 2022-04-01 14:12 UTC (permalink / raw)
  To: a-govindraju, vigneshr, nm
  Cc: sjg, marek.behun, xypron.glpk, n-francis, s-anna, kristo, kishon,
	bmeng.cn, email2tema, joel.peshkin, ilias.apalodimas,
	patrick.delaunay, mr.nuke.me, u-boot

For K3 devices that require a sysfw image, add entry for SYSFW. It can
contain system firmware image that can be packaged into sysfw.itb by
binman. The method ReadBlobContents in sysfw.py runs the TI K3
certificate generation script to create the signed sysfw image that can
be used for packaging by binman into sysfw.bin.

Signed-off-by: Tarun Sahu <t-sahu@ti.com>
[n-francis@ti.com: added tests for addition of etype]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
 tools/binman/entries.rst        | 11 ++++++
 tools/binman/etype/sysfw.py     | 60 +++++++++++++++++++++++++++++++++
 tools/binman/ftest.py           |  7 ++++
 tools/binman/test/226_sysfw.dts | 13 +++++++
 4 files changed, 91 insertions(+)
 create mode 100644 tools/binman/etype/sysfw.py
 create mode 100644 tools/binman/test/226_sysfw.dts

diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index 484cde5c80..7c95bbfbec 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -1019,6 +1019,17 @@ This entry holds firmware for an external platform-specific coprocessor.
 
 
 
+Entry: sysfw: Texas Instruments System Firmware (SYSFW) blob
+------------------------------------------------------------
+
+Properties / Entry arguments:
+    - sysfw-path: Filename of file to read into the entry, typically sysfw.bin
+
+This entry contains system firmware necessary for booting of K3 architecture
+devices.
+
+
+
 Entry: section: Entry that contains other entries
 -------------------------------------------------
 
diff --git a/tools/binman/etype/sysfw.py b/tools/binman/etype/sysfw.py
new file mode 100644
index 0000000000..c73300400b
--- /dev/null
+++ b/tools/binman/etype/sysfw.py
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Entry type module for TI SYSFW binary blob
+#
+
+import struct
+import zlib
+import os
+import sys
+
+from binman.etype.blob_named_by_arg import Entry_blob_named_by_arg
+from dtoc import fdt_util
+from patman import tools
+
+
+class Entry_sysfw(Entry_blob_named_by_arg):
+    """Entry containing System Firmware (SYSFW) blob
+
+    Properties / Entry arguments:
+        - sysfw-path: Filename of file to read into the entry, typically sysfw.bin
+
+This entry contains system firmware necessary for booting of K3 architecture devices.
+    """
+
+    def __init__(self, section, etype, node):
+        super().__init__(section, etype, node, 'scp')
+        self.core = "0"
+        self.missing_msg = "sysfw"
+
+    def ReadNode(self):
+        self._load_addr = fdt_util.GetInt(self._node, 'load', 0)
+        self._args = []
+
+    def _SignSysfw(self, out):
+        """Sign the sysfw image and write it to the output directory"""
+        # Try running the K3 x509 certificate signing script
+        try:
+            args = [
+                '-c', "0",
+                '-b', self._filename,
+                '-l', str(self._load_addr),
+                '-o', out
+            ]
+            k3_cert_gen_path = os.environ['srctree'] + \
+                "/tools/k3_gen_x509_cert.sh"
+            tools.run(k3_cert_gen_path, *args)
+            self.SetContents(tools.read_file(out))
+            return True
+        # If not available (example, in the case of binman tests, set entry contents as dummy binary)
+        except KeyError:
+            self.missing = True
+            self.SetContents(b'sysfw')
+            return True
+
+    def ObtainContents(self):
+        self.missing = False
+        out = tools.get_output_filename("sysfwint")
+        self._SignSysfw(out)
+        return True
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index 8f00db6945..7c12058fe4 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -87,6 +87,7 @@ ATF_BL31_DATA         = b'bl31'
 TEE_OS_DATA           = b'this is some tee OS data'
 ATF_BL2U_DATA         = b'bl2u'
 OPENSBI_DATA          = b'opensbi'
+SYSFW_DATA            = b'sysfw'
 SCP_DATA              = b'scp'
 TEST_FDT1_DATA        = b'fdt1'
 TEST_FDT2_DATA        = b'test-fdt2'
@@ -192,6 +193,7 @@ class TestFunctional(unittest.TestCase):
         TestFunctional._MakeInputFile('tee-pager.bin', TEE_OS_DATA)
         TestFunctional._MakeInputFile('bl2u.bin', ATF_BL2U_DATA)
         TestFunctional._MakeInputFile('fw_dynamic.bin', OPENSBI_DATA)
+        TestFunctional._MakeInputFile('sysfw.bin', SYSFW_DATA)
         TestFunctional._MakeInputFile('scp.bin', SCP_DATA)
 
         # Add a few .dtb files for testing
@@ -5321,6 +5323,11 @@ fdt         fdtmap                Extract the devicetree blob from the fdtmap
         self.assertIn("Node '/binman/fit': Unknown operation 'unknown'",
                       str(exc.exception))
 
+    def testPackSysfw(self):
+        """Test that an image with a SYSFW binary can be created"""
+        data = self._DoReadFile('226_sysfw.dts')
+        self.assertEqual(SYSFW_DATA, data[:len(SYSFW_DATA)])
+
 
 if __name__ == "__main__":
     unittest.main()
diff --git a/tools/binman/test/226_sysfw.dts b/tools/binman/test/226_sysfw.dts
new file mode 100644
index 0000000000..23d64d3688
--- /dev/null
+++ b/tools/binman/test/226_sysfw.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	binman {
+		sysfw {
+			filename = "sysfw.bin";
+		};
+	};
+};
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [uU PATCH 3/8] schema: yaml: Add board config schema
  2022-04-01 14:12 [uU PATCH 0/8] Integration of sysfw and tispl with U-Boot build Neha Malcom Francis
  2022-04-01 14:12 ` [uU PATCH 1/8] tools: config: yaml: Add board config class to generate config binaries Neha Malcom Francis
  2022-04-01 14:12 ` [uU PATCH 2/8] binman: etype: sysfw: Add entry type for sysfw Neha Malcom Francis
@ 2022-04-01 14:12 ` Neha Malcom Francis
  2022-04-01 14:12 ` [uU PATCH 4/8] config: yaml: j721e_evm: Add board config for J721E EVM Neha Malcom Francis
                   ` (4 subsequent siblings)
  7 siblings, 0 replies; 9+ messages in thread
From: Neha Malcom Francis @ 2022-04-01 14:12 UTC (permalink / raw)
  To: a-govindraju, vigneshr, nm
  Cc: sjg, marek.behun, xypron.glpk, n-francis, s-anna, kristo, kishon,
	bmeng.cn, email2tema, joel.peshkin, ilias.apalodimas,
	patrick.delaunay, mr.nuke.me, u-boot

Schema file in YAML must be provided in board/ti/common for validating
input config files and packaging system firmware. The schema includes
entries for rm-cfg, board-cfg, pm-cfg and sec-cfg.

Signed-off-by: Tarun Sahu <t-sahu@ti.com>
[n-francis@ti.com: cleaned up config and schema files]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
 board/ti/common/schema.yaml | 355 ++++++++++++++++++++++++++++++++++++
 1 file changed, 355 insertions(+)
 create mode 100644 board/ti/common/schema.yaml

diff --git a/board/ti/common/schema.yaml b/board/ti/common/schema.yaml
new file mode 100644
index 0000000000..070ff797e0
--- /dev/null
+++ b/board/ti/common/schema.yaml
@@ -0,0 +1,355 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Config schema for TI K3 devices
+#
+
+---
+
+definitions:
+    u8:
+        type: integer
+        minimum: 0
+        maximum: 0xff
+    u16:
+        type: integer
+        minimum: 0
+        maximum: 0xffff
+    u32:
+        type: integer
+        minimum: 0
+        maximum: 0xffffffff
+
+
+
+type: object
+properties:
+    pm-cfg:
+        type: object
+        properties:
+            rev:
+                type: object
+                properties:
+                    boardcfg_abi_maj:
+                        $ref: "#/definitions/u8"
+                    boardcfg_abi_min:
+                        $ref: "#/definitions/u8"
+    board-cfg:
+        type: object
+        properties:
+            rev:
+                type: object
+                properties:
+                    boardcfg_abi_maj:
+                        $ref: "#/definitions/u8"
+                    boardcfg_abi_min:
+                        $ref: "#/definitions/u8"
+            control:
+                type: object
+                properties:
+                    subhdr:
+                        type: object
+                        properties:
+                            magic:
+                                $ref: "#/definitions/u16"
+                            size:
+                                $ref: "#/definitions/u16"
+                    main_isolation_enable:
+                        $ref: "#/definitions/u8"
+                    main_isolation_hostid:
+                        $ref: "#/definitions/u16"
+
+
+            secproxy:
+                type: object
+                properties:
+                    subhdr:
+                        type: object
+                        properties:
+                            magic:
+                                $ref: "#/definitions/u16"
+                            size:
+                                $ref: "#/definitions/u16"
+                    scaling_factor:
+                        $ref: "#/definitions/u8"
+                    scaling_profile:
+                        $ref: "#/definitions/u8"
+                    disable_main_nav_secure_proxy:
+                        $ref: "#/definitions/u8"
+
+            msmc:
+                type: object
+                properties:
+                    subhdr:
+                        type: object
+                        properties:
+                            magic:
+                                $ref: "#/definitions/u16"
+                            size:
+                                $ref: "#/definitions/u16"
+                    msmc_cache_size:
+                        $ref: "#/definitions/u8"
+            debug_cfg:
+                type: object
+                properties:
+                    subhdr:
+                        type: object
+                        properties:
+                            magic:
+                                $ref: "#/definitions/u16"
+                            size:
+                                $ref: "#/definitions/u16"
+                    trace_dst_enables:
+                        $ref: "#/definitions/u16"
+                    trace_src_enables:
+                        $ref: "#/definitions/u16"
+
+    sec-cfg:
+        type: object
+        properties:
+            rev:
+                type: object
+                properties:
+                    boardcfg_abi_maj:
+                        $ref: "#/definitions/u8"
+                    boardcfg_abi_min:
+                        $ref: "#/definitions/u8"
+
+            processor_acl_list:
+                type: object
+                properties:
+                    subhdr:
+                        type: object
+                        properties:
+                            magic:
+                                $ref: "#/definitions/u16"
+                            size:
+                                $ref: "#/definitions/u16"
+                    proc_acl_entries:
+                        type: array
+                        minItems: 32
+                        maxItems: 32
+                        items:
+                            type: object
+                            properties:
+                                processor_id:
+                                    $ref: "#/definitions/u8"
+                                proc_access_master:
+                                    $ref: "#/definitions/u8"
+                                proc_access_secondary:
+                                    type: array
+                                    minItems: 3
+                                    maxItems: 3
+                                    items:
+                                        $ref: "#/definitions/u8"
+            host_hierarchy:
+                type: object
+                properties:
+                    subhdr:
+                        type: object
+                        properties:
+                            magic:
+                                $ref: "#/definitions/u16"
+                            size:
+                                $ref: "#/definitions/u16"
+                    host_hierarchy_entries:
+                        type: array
+                        minItems: 32
+                        maxItems: 32
+                        items:
+                            type: object
+                            properties:
+                                host_id:
+                                    $ref: "#/definitions/u8"
+                                supervisor_host_id:
+                                    $ref: "#/definitions/u8"
+
+            otp_config:
+                type: object
+                properties:
+                    subhdr:
+                        type: object
+                        properties:
+                            magic:
+                                $ref: "#/definitions/u16"
+                            size:
+                                $ref: "#/definitions/u16"
+                    otp_entry:
+                        type: array
+                        minItems: 32
+                        maxItems: 32
+                        items:
+                            type: object
+                            properties:
+                                host_id:
+                                    $ref: "#/definitions/u8"
+                                host_perms:
+                                    $ref: "#/definitions/u8"
+                    write_host_id:
+                        $ref: "#/definitions/u8"
+
+            dkek_config:
+                type: object
+                properties:
+                    subhdr:
+                        type: object
+                        properties:
+                            magic:
+                                $ref: "#/definitions/u16"
+                            size:
+                                $ref: "#/definitions/u16"
+                    allowed_hosts:
+                        type: array
+                        minItems: 4
+                        maxItems: 4
+                        items:
+                            $ref: "#/definitions/u8"
+                    allow_dkek_export_tisci:
+                        $ref: "#/definitions/u8"
+                    rsvd:
+                        type: array
+                        minItems: 3
+                        maxItems: 3
+                        items:
+                            $ref: "#/definitions/u8"
+
+            sa2ul_cfg:
+                type: object
+                properties:
+                    subhdr:
+                        type: object
+                        properties:
+                            magic:
+                                $ref: "#/definitions/u16"
+                            size:
+                                $ref: "#/definitions/u16"
+                    rsvd:
+                        type: array
+                        minItems: 4
+                        maxItems: 4
+                        items:
+                            $ref: "#/definitions/u8"
+            sec_dbg_config:
+                type: object
+                properties:
+                    subhdr:
+                        type: object
+                        properties:
+                            magic:
+                                $ref: "#/definitions/u16"
+                            size:
+                                $ref: "#/definitions/u16"
+                    allow_jtag_unlock:
+                        $ref: "#/definitions/u8"
+                    allow_wildcard_unlock:
+                        $ref: "#/definitions/u8"
+                    allowed_debug_level_rsvd:
+                        $ref: "#/definitions/u8"
+                    rsvd:
+                        $ref: "#/definitions/u8"
+                    min_cert_rev:
+                        $ref: "#/definitions/u32"
+                    jtag_unlock_hosts:
+                        type: array
+                        minItems: 4
+                        maxItems: 4
+                        items:
+                            $ref: "#/definitions/u8"
+
+
+            sec_handover_cfg:
+                type: object
+                properties:
+                    subhdr:
+                        type: object
+                        properties:
+                            magic:
+                                $ref: "#/definitions/u16"
+                            size:
+                                $ref: "#/definitions/u16"
+                    handover_msg_sender:
+                        $ref: "#/definitions/u8"
+                    handover_to_host_id:
+                        $ref: "#/definitions/u8"
+                    rsvd:
+                        type: array
+                        minItems: 4
+                        maxItems: 4
+                        items:
+                            $ref: "#/definitions/u8"
+
+    rm-cfg:
+        type: object
+        properties:
+            rm_boardcfg:
+                type: object
+                properties:
+                    rev:
+                        type: object
+                        properties:
+                            boardcfg_abi_maj:
+                                $ref: "#/definitions/u8"
+                            boardcfg_abi_min:
+                                $ref: "#/definitions/u8"
+
+                    host_cfg:
+                        type: object
+                        properties:
+                            subhdr:
+                                type: object
+                                properties:
+                                    magic:
+                                        $ref: "#/definitions/u16"
+                                    size:
+                                        $ref: "#/definitions/u16"
+                            host_cfg_entries:
+                                type: array
+                                minItems: 0
+                                maxItems: 32
+                                items:
+                                    type: object
+                                    properties:
+                                        host_id:
+                                            $ref: "#/definitions/u8"
+                                        allowed_atype:
+                                            $ref: "#/definitions/u8"
+                                        allowed_qos:
+                                            $ref: "#/definitions/u16"
+                                        allowed_orderid:
+                                            $ref: "#/definitions/u32"
+                                        allowed_priority:
+                                            $ref: "#/definitions/u16"
+                                        allowed_sched_priority:
+                                            $ref: "#/definitions/u8"
+                    resasg:
+                        type: object
+                        properties:
+                            subhdr:
+                                type: object
+                                properties:
+                                    magic:
+                                        $ref: "#/definitions/u16"
+                                    size:
+                                        $ref: "#/definitions/u16"
+                            resasg_entries_size:
+                                        $ref: "#/definitions/u16"
+                            reserved:
+                                        $ref: "#/definitions/u16"
+
+            resasg_entries:
+                type: array
+                minItems: 0
+                maxItems: 418
+                items:
+                    type: object
+                    properties:
+                        start_resource:
+                            $ref: "#/definitions/u16"
+                        num_resource:
+                            $ref: "#/definitions/u16"
+                        type:
+                            $ref: "#/definitions/u16"
+                        host_id:
+                            $ref: "#/definitions/u8"
+                        reserved:
+                            $ref: "#/definitions/u8"
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [uU PATCH 4/8] config: yaml: j721e_evm: Add board config for J721E EVM
  2022-04-01 14:12 [uU PATCH 0/8] Integration of sysfw and tispl with U-Boot build Neha Malcom Francis
                   ` (2 preceding siblings ...)
  2022-04-01 14:12 ` [uU PATCH 3/8] schema: yaml: Add board config schema Neha Malcom Francis
@ 2022-04-01 14:12 ` Neha Malcom Francis
  2022-04-01 14:12 ` [uU PATCH 5/8] binman: sysfw: Add support for packaging tiboot3.bin and sysfw.itb Neha Malcom Francis
                   ` (3 subsequent siblings)
  7 siblings, 0 replies; 9+ messages in thread
From: Neha Malcom Francis @ 2022-04-01 14:12 UTC (permalink / raw)
  To: a-govindraju, vigneshr, nm
  Cc: sjg, marek.behun, xypron.glpk, n-francis, s-anna, kristo, kishon,
	bmeng.cn, email2tema, joel.peshkin, ilias.apalodimas,
	patrick.delaunay, mr.nuke.me, u-boot

Board config file must be provided in board/ti/<devicename> in YAML.
These can then be consumed for generation of binaries to package system
firmware. Added YAML config for J721E EVM in particular.

It is to be noted that the bootflow followed by J721E requires
tiboot3.bin, TIFS and board config binaries to be packaged into
sysfw.itb along with u-boot.img. It also requires DM, ATF, OPTEE
packaged into tispl.bin.

Signed-off-by: Tarun Sahu <t-sahu@ti.com>
[n-francis@ti.com: prepared patch for upstreaming]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
 board/ti/j721e/config.yaml | 3162 ++++++++++++++++++++++++++++++++++++
 1 file changed, 3162 insertions(+)
 create mode 100644 board/ti/j721e/config.yaml

diff --git a/board/ti/j721e/config.yaml b/board/ti/j721e/config.yaml
new file mode 100644
index 0000000000..710517404f
--- /dev/null
+++ b/board/ti/j721e/config.yaml
@@ -0,0 +1,3162 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for J721E EVM
+#
+
+---
+
+pm-cfg:
+        rev:
+                boardcfg_abi_maj: 0x0
+                boardcfg_abi_min: 0x1
+
+board-cfg:
+        rev:
+                boardcfg_abi_maj: 0x0
+                boardcfg_abi_min: 0x1
+        control:
+                subhdr:
+                        magic: 0xC1D3
+                        size: 7
+                main_isolation_enable: 0x5A
+                main_isolation_hostid: 0x2
+        secproxy:
+                subhdr:
+                        magic: 0x1207
+                        size: 7
+                scaling_factor: 0x1
+                scaling_profile: 0x1
+                disable_main_nav_secure_proxy: 0
+        msmc:
+                subhdr:
+                        magic: 0xA5C3
+                        size: 5
+                msmc_cache_size: 0x0
+        debug_cfg:
+                subhdr:
+                        magic: 0x020C
+                        size: 8
+                trace_dst_enables: 0x00
+                trace_src_enables: 0x00
+
+sec-cfg:
+        rev:
+                boardcfg_abi_maj: 0x0
+                boardcfg_abi_min: 0x1
+        processor_acl_list:
+                subhdr:
+                        magic: 0xF1EA
+                        size: 164
+                proc_acl_entries:
+                        - #1
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #2
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #3
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #4
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #5
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #6
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #7
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #8
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #9
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #10
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #11
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #12
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #13
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #14
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #15
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #16
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #17
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #18
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #19
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #20
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #21
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #22
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #23
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #24
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #25
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #26
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #27
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #28
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #29
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #30
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #31
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+                        - #32
+                                processor_id: 0
+                                proc_access_master: 0
+                                proc_access_secondary: [0, 0, 0]
+
+        host_hierarchy:
+                subhdr:
+                        magic: 0x8D27
+                        size: 68
+                host_hierarchy_entries:
+                        - #1
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #2
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #3
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #4
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #5
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #6
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #7
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #8
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #9
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #10
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #11
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #12
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #13
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #14
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #15
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #16
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #17
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #18
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #19
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #20
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #21
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #22
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #23
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #24
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #25
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #26
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #27
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #28
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #29
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #30
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #31
+                                host_id: 0
+                                supervisor_host_id: 0
+                        - #32
+                                host_id: 0
+                                supervisor_host_id: 0
+        otp_config:
+                subhdr:
+                        magic: 0x4081
+                        size: 69
+                otp_entry:
+                        - #1
+                                host_id: 0
+                                host_perms: 0
+                        - #2
+                                host_id: 0
+                                host_perms: 0
+                        - #3
+                                host_id: 0
+                                host_perms: 0
+                        - #4
+                                host_id: 0
+                                host_perms: 0
+                        - #5
+                                host_id: 0
+                                host_perms: 0
+                        - #6
+                                host_id: 0
+                                host_perms: 0
+                        - #7
+                                host_id: 0
+                                host_perms: 0
+                        - #8
+                                host_id: 0
+                                host_perms: 0
+                        - #9
+                                host_id: 0
+                                host_perms: 0
+                        - #10
+                                host_id: 0
+                                host_perms: 0
+                        - #11
+                                host_id: 0
+                                host_perms: 0
+                        - #12
+                                host_id: 0
+                                host_perms: 0
+                        - #13
+                                host_id: 0
+                                host_perms: 0
+                        - #14
+                                host_id: 0
+                                host_perms: 0
+                        - #15
+                                host_id: 0
+                                host_perms: 0
+                        - #16
+                                host_id: 0
+                                host_perms: 0
+                        - #17
+                                host_id: 0
+                                host_perms: 0
+                        - #18
+                                host_id: 0
+                                host_perms: 0
+                        - #19
+                                host_id: 0
+                                host_perms: 0
+                        - #20
+                                host_id: 0
+                                host_perms: 0
+                        - #21
+                                host_id: 0
+                                host_perms: 0
+                        - #22
+                                host_id: 0
+                                host_perms: 0
+                        - #23
+                                host_id: 0
+                                host_perms: 0
+                        - #24
+                                host_id: 0
+                                host_perms: 0
+                        - #25
+                                host_id: 0
+                                host_perms: 0
+                        - #26
+                                host_id: 0
+                                host_perms: 0
+                        - #27
+                                host_id: 0
+                                host_perms: 0
+                        - #28
+                                host_id: 0
+                                host_perms: 0
+                        - #29
+                                host_id: 0
+                                host_perms: 0
+                        - #30
+                                host_id: 0
+                                host_perms: 0
+                        - #31
+                                host_id: 0
+                                host_perms: 0
+                        - #32
+                                host_id: 0
+                                host_perms: 0
+                write_host_id: 0
+        dkek_config:
+                subhdr:
+                        magic: 0x5170
+                        size: 12
+                allowed_hosts: [128, 0, 0, 0]
+                allow_dkek_export_tisci: 0x5A
+                rsvd: [0, 0, 0]
+        sa2ul_cfg:
+                subhdr:
+                        magic: 0x23BE
+                        size: 0
+                rsvd: [0, 0, 0, 0]
+        sec_dbg_config:
+                subhdr:
+                        magic: 0x42AF
+                        size: 16
+                allow_jtag_unlock: 0x5A
+                allow_wildcard_unlock: 0x5A
+                allowed_debug_level_rsvd: 0
+                rsvd: 0
+                min_cert_rev: 0x0
+                jtag_unlock_hosts: [0, 0, 0, 0]
+        sec_handover_cfg:
+                subhdr:
+                        magic: 0x608F
+                        size: 10
+                handover_msg_sender: 0
+                handover_to_host_id: 0
+                rsvd: [0, 0, 0, 0]
+
+rm-cfg:
+        rm_boardcfg:
+                rev:
+                        boardcfg_abi_maj: 0x0
+                        boardcfg_abi_min: 0x1
+                host_cfg:
+                        subhdr:
+                                magic: 0x4C41
+                                size: 356
+                        host_cfg_entries:
+                                - #1
+                                        host_id: 3
+                                        allowed_atype: 0x2A
+                                        allowed_qos: 0xAAAA
+                                        allowed_orderid: 0xAAAAAAAA
+                                        allowed_priority: 0xAAAA
+                                        allowed_sched_priority: 0xAA
+                                - #2
+                                        host_id: 5
+                                        allowed_atype: 0x2A
+                                        allowed_qos: 0xAAAA
+                                        allowed_orderid: 0xAAAAAAAA
+                                        allowed_priority: 0xAAAA
+                                        allowed_sched_priority: 0xAA
+                                - #3
+                                        host_id: 12
+                                        allowed_atype: 0x2A
+                                        allowed_qos: 0xAAAA
+                                        allowed_orderid: 0xAAAAAAAA
+                                        allowed_priority: 0xAAAA
+                                        allowed_sched_priority: 0xAA
+                                - #4
+                                        host_id: 13
+                                        allowed_atype: 0x2A
+                                        allowed_qos: 0xAAAA
+                                        allowed_orderid: 0xAAAAAAAA
+                                        allowed_priority: 0xAAAA
+                                        allowed_sched_priority: 0xAA
+                                - #5
+                                        host_id: 21
+                                        allowed_atype: 0x2A
+                                        allowed_qos: 0xAAAA
+                                        allowed_orderid: 0xAAAAAAAA
+                                        allowed_priority: 0xAAAA
+                                        allowed_sched_priority: 0xAA
+                                - #6
+                                        host_id: 26
+                                        allowed_atype: 0x2A
+                                        allowed_qos: 0xAAAA
+                                        allowed_orderid: 0xAAAAAAAA
+                                        allowed_priority: 0xAAAA
+                                        allowed_sched_priority: 0xAA
+                                - #7
+                                        host_id: 28
+                                        allowed_atype: 0x2A
+                                        allowed_qos: 0xAAAA
+                                        allowed_orderid: 0xAAAAAAAA
+                                        allowed_priority: 0xAAAA
+                                        allowed_sched_priority: 0xAA
+                                - #8
+                                        host_id: 35
+                                        allowed_atype: 0x2A
+                                        allowed_qos: 0xAAAA
+                                        allowed_orderid: 0xAAAAAAAA
+                                        allowed_priority: 0xAAAA
+                                        allowed_sched_priority: 0xAA
+                                - #9
+                                        host_id: 37
+                                        allowed_atype: 0x2A
+                                        allowed_qos: 0xAAAA
+                                        allowed_orderid: 0xAAAAAAAA
+                                        allowed_priority: 0xAAAA
+                                        allowed_sched_priority: 0xAA
+                                - #10
+                                        host_id: 40
+                                        allowed_atype: 0x2A
+                                        allowed_qos: 0xAAAA
+                                        allowed_orderid: 0xAAAAAAAA
+                                        allowed_priority: 0xAAAA
+                                        allowed_sched_priority: 0xAA
+                                - #11
+                                        host_id: 42
+                                        allowed_atype: 0x2A
+                                        allowed_qos: 0xAAAA
+                                        allowed_orderid: 0xAAAAAAAA
+                                        allowed_priority: 0xAAAA
+                                        allowed_sched_priority: 0xAA
+                                - #12
+                                        host_id: 0
+                                        allowed_atype: 0
+                                        allowed_qos: 0
+                                        allowed_orderid: 0
+                                        allowed_priority: 0
+                                        allowed_sched_priority: 0
+                                - #13
+                                        host_id: 0
+                                        allowed_atype: 0
+                                        allowed_qos: 0
+                                        allowed_orderid: 0
+                                        allowed_priority: 0
+                                        allowed_sched_priority: 0
+                                - #14
+                                        host_id: 0
+                                        allowed_atype: 0
+                                        allowed_qos: 0
+                                        allowed_orderid: 0
+                                        allowed_priority: 0
+                                        allowed_sched_priority: 0
+                                - #15
+                                        host_id: 0
+                                        allowed_atype: 0
+                                        allowed_qos: 0
+                                        allowed_orderid: 0
+                                        allowed_priority: 0
+                                        allowed_sched_priority: 0
+                                - #16
+                                        host_id: 0
+                                        allowed_atype: 0
+                                        allowed_qos: 0
+                                        allowed_orderid: 0
+                                        allowed_priority: 0
+                                        allowed_sched_priority: 0
+                                - #17
+                                        host_id: 0
+                                        allowed_atype: 0
+                                        allowed_qos: 0
+                                        allowed_orderid: 0
+                                        allowed_priority: 0
+                                        allowed_sched_priority: 0
+                                - #18
+                                        host_id: 0
+                                        allowed_atype: 0
+                                        allowed_qos: 0
+                                        allowed_orderid: 0
+                                        allowed_priority: 0
+                                        allowed_sched_priority: 0
+                                - #19
+                                        host_id: 0
+                                        allowed_atype: 0
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+                        host_id: 37
+                        reserved: 0
+                -
+                        start_resource: 15
+                        num_resource: 9
+                        type: 15043
+                        host_id: 12
+                        reserved: 0
+                -
+                        start_resource: 24
+                        num_resource: 6
+                        type: 15043
+                        host_id: 13
+                        reserved: 0
+                -
+                        start_resource: 30
+                        num_resource: 3
+                        type: 15043
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 33
+                        num_resource: 2
+                        type: 15043
+                        host_id: 5
+                        reserved: 0
+                -
+                        start_resource: 35
+                        num_resource: 1
+                        type: 15043
+                        host_id: 40
+                        reserved: 0
+                -
+                        start_resource: 36
+                        num_resource: 1
+                        type: 15043
+                        host_id: 42
+                        reserved: 0
+                -
+                        start_resource: 37
+                        num_resource: 1
+                        type: 15043
+                        host_id: 21
+                        reserved: 0
+                -
+                        start_resource: 38
+                        num_resource: 1
+                        type: 15043
+                        host_id: 26
+                        reserved: 0
+                -
+                        start_resource: 39
+                        num_resource: 1
+                        type: 15043
+                        host_id: 28
+                        reserved: 0
+                -
+                        start_resource: 40
+                        num_resource: 2
+                        type: 15043
+                        host_id: 35
+                        reserved: 0
+                -
+                        start_resource: 42
+                        num_resource: 1
+                        type: 15043
+                        host_id: 37
+                        reserved: 0
+                -
+                        start_resource: 43
+                        num_resource: 3
+                        type: 15043
+                        host_id: 128
+                        reserved: 0
+                -
+                        start_resource: 48
+                        num_resource: 0
+                        type: 15045
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 48
+                        num_resource: 2
+                        type: 15045
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 0
+                        num_resource: 0
+                        type: 15047
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 0
+                        num_resource: 2
+                        type: 15047
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 2
+                        num_resource: 5
+                        type: 15050
+                        host_id: 12
+                        reserved: 0
+                -
+                        start_resource: 7
+                        num_resource: 1
+                        type: 15050
+                        host_id: 13
+                        reserved: 0
+                -
+                        start_resource: 0
+                        num_resource: 3
+                        type: 15051
+                        host_id: 12
+                        reserved: 0
+                -
+                        start_resource: 3
+                        num_resource: 2
+                        type: 15051
+                        host_id: 13
+                        reserved: 0
+                -
+                        start_resource: 5
+                        num_resource: 3
+                        type: 15051
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 8
+                        num_resource: 3
+                        type: 15051
+                        host_id: 5
+                        reserved: 0
+                -
+                        start_resource: 11
+                        num_resource: 3
+                        type: 15051
+                        host_id: 40
+                        reserved: 0
+                -
+                        start_resource: 14
+                        num_resource: 3
+                        type: 15051
+                        host_id: 42
+                        reserved: 0
+                -
+                        start_resource: 17
+                        num_resource: 3
+                        type: 15051
+                        host_id: 21
+                        reserved: 0
+                -
+                        start_resource: 20
+                        num_resource: 3
+                        type: 15051
+                        host_id: 26
+                        reserved: 0
+                -
+                        start_resource: 23
+                        num_resource: 3
+                        type: 15051
+                        host_id: 28
+                        reserved: 0
+                -
+                        start_resource: 26
+                        num_resource: 3
+                        type: 15051
+                        host_id: 35
+                        reserved: 0
+                -
+                        start_resource: 29
+                        num_resource: 3
+                        type: 15051
+                        host_id: 37
+                        reserved: 0
+                -
+                        start_resource: 48
+                        num_resource: 8
+                        type: 15104
+                        host_id: 12
+                        reserved: 0
+                -
+                        start_resource: 56
+                        num_resource: 4
+                        type: 15104
+                        host_id: 13
+                        reserved: 0
+                -
+                        start_resource: 60
+                        num_resource: 8
+                        type: 15104
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 68
+                        num_resource: 4
+                        type: 15104
+                        host_id: 5
+                        reserved: 0
+                -
+                        start_resource: 72
+                        num_resource: 4
+                        type: 15104
+                        host_id: 40
+                        reserved: 0
+                -
+                        start_resource: 76
+                        num_resource: 4
+                        type: 15104
+                        host_id: 42
+                        reserved: 0
+                -
+                        start_resource: 80
+                        num_resource: 8
+                        type: 15104
+                        host_id: 35
+                        reserved: 0
+                -
+                        start_resource: 88
+                        num_resource: 4
+                        type: 15104
+                        host_id: 37
+                        reserved: 0
+                -
+                        start_resource: 92
+                        num_resource: 4
+                        type: 15104
+                        host_id: 128
+                        reserved: 0
+                -
+                        start_resource: 0
+                        num_resource: 1
+                        type: 15105
+                        host_id: 128
+                        reserved: 0
+                -
+                        start_resource: 56320
+                        num_resource: 256
+                        type: 15106
+                        host_id: 128
+                        reserved: 0
+                -
+                        start_resource: 0
+                        num_resource: 1
+                        type: 15107
+                        host_id: 128
+                        reserved: 0
+                -
+                        start_resource: 2
+                        num_resource: 4
+                        type: 15114
+                        host_id: 12
+                        reserved: 0
+                -
+                        start_resource: 6
+                        num_resource: 2
+                        type: 15114
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 6
+                        num_resource: 0
+                        type: 15114
+                        host_id: 13
+                        reserved: 0
+                -
+                        start_resource: 8
+                        num_resource: 0
+                        type: 15114
+                        host_id: 5
+                        reserved: 0
+                -
+                        start_resource: 8
+                        num_resource: 1
+                        type: 15114
+                        host_id: 40
+                        reserved: 0
+                -
+                        start_resource: 9
+                        num_resource: 1
+                        type: 15114
+                        host_id: 42
+                        reserved: 0
+                -
+                        start_resource: 10
+                        num_resource: 1
+                        type: 15114
+                        host_id: 21
+                        reserved: 0
+                -
+                        start_resource: 11
+                        num_resource: 1
+                        type: 15114
+                        host_id: 26
+                        reserved: 0
+                -
+                        start_resource: 12
+                        num_resource: 1
+                        type: 15114
+                        host_id: 28
+                        reserved: 0
+                -
+                        start_resource: 13
+                        num_resource: 1
+                        type: 15114
+                        host_id: 35
+                        reserved: 0
+                -
+                        start_resource: 14
+                        num_resource: 1
+                        type: 15114
+                        host_id: 37
+                        reserved: 0
+                -
+                        start_resource: 15
+                        num_resource: 9
+                        type: 15114
+                        host_id: 12
+                        reserved: 0
+                -
+                        start_resource: 24
+                        num_resource: 6
+                        type: 15114
+                        host_id: 13
+                        reserved: 0
+                -
+                        start_resource: 30
+                        num_resource: 3
+                        type: 15114
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 33
+                        num_resource: 2
+                        type: 15114
+                        host_id: 5
+                        reserved: 0
+                -
+                        start_resource: 35
+                        num_resource: 1
+                        type: 15114
+                        host_id: 40
+                        reserved: 0
+                -
+                        start_resource: 36
+                        num_resource: 1
+                        type: 15114
+                        host_id: 42
+                        reserved: 0
+                -
+                        start_resource: 37
+                        num_resource: 1
+                        type: 15114
+                        host_id: 21
+                        reserved: 0
+                -
+                        start_resource: 38
+                        num_resource: 1
+                        type: 15114
+                        host_id: 26
+                        reserved: 0
+                -
+                        start_resource: 39
+                        num_resource: 1
+                        type: 15114
+                        host_id: 28
+                        reserved: 0
+                -
+                        start_resource: 40
+                        num_resource: 2
+                        type: 15114
+                        host_id: 35
+                        reserved: 0
+                -
+                        start_resource: 42
+                        num_resource: 1
+                        type: 15114
+                        host_id: 37
+                        reserved: 0
+                -
+                        start_resource: 43
+                        num_resource: 2
+                        type: 15114
+                        host_id: 128
+                        reserved: 0
+                -
+                        start_resource: 0
+                        num_resource: 0
+                        type: 15115
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 0
+                        num_resource: 2
+                        type: 15115
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 2
+                        num_resource: 4
+                        type: 15117
+                        host_id: 12
+                        reserved: 0
+                -
+                        start_resource: 6
+                        num_resource: 2
+                        type: 15117
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 6
+                        num_resource: 0
+                        type: 15117
+                        host_id: 13
+                        reserved: 0
+                -
+                        start_resource: 8
+                        num_resource: 0
+                        type: 15117
+                        host_id: 5
+                        reserved: 0
+                -
+                        start_resource: 8
+                        num_resource: 1
+                        type: 15117
+                        host_id: 40
+                        reserved: 0
+                -
+                        start_resource: 9
+                        num_resource: 1
+                        type: 15117
+                        host_id: 42
+                        reserved: 0
+                -
+                        start_resource: 10
+                        num_resource: 1
+                        type: 15117
+                        host_id: 21
+                        reserved: 0
+                -
+                        start_resource: 11
+                        num_resource: 1
+                        type: 15117
+                        host_id: 26
+                        reserved: 0
+                -
+                        start_resource: 12
+                        num_resource: 1
+                        type: 15117
+                        host_id: 28
+                        reserved: 0
+                -
+                        start_resource: 13
+                        num_resource: 1
+                        type: 15117
+                        host_id: 35
+                        reserved: 0
+                -
+                        start_resource: 14
+                        num_resource: 1
+                        type: 15117
+                        host_id: 37
+                        reserved: 0
+                -
+                        start_resource: 15
+                        num_resource: 9
+                        type: 15117
+                        host_id: 12
+                        reserved: 0
+                -
+                        start_resource: 24
+                        num_resource: 6
+                        type: 15117
+                        host_id: 13
+                        reserved: 0
+                -
+                        start_resource: 30
+                        num_resource: 3
+                        type: 15117
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 33
+                        num_resource: 2
+                        type: 15117
+                        host_id: 5
+                        reserved: 0
+                -
+                        start_resource: 35
+                        num_resource: 1
+                        type: 15117
+                        host_id: 40
+                        reserved: 0
+                -
+                        start_resource: 36
+                        num_resource: 1
+                        type: 15117
+                        host_id: 42
+                        reserved: 0
+                -
+                        start_resource: 37
+                        num_resource: 1
+                        type: 15117
+                        host_id: 21
+                        reserved: 0
+                -
+                        start_resource: 38
+                        num_resource: 1
+                        type: 15117
+                        host_id: 26
+                        reserved: 0
+                -
+                        start_resource: 39
+                        num_resource: 1
+                        type: 15117
+                        host_id: 28
+                        reserved: 0
+                -
+                        start_resource: 40
+                        num_resource: 2
+                        type: 15117
+                        host_id: 35
+                        reserved: 0
+                -
+                        start_resource: 42
+                        num_resource: 1
+                        type: 15117
+                        host_id: 37
+                        reserved: 0
+                -
+                        start_resource: 43
+                        num_resource: 3
+                        type: 15117
+                        host_id: 128
+                        reserved: 0
+                -
+                        start_resource: 0
+                        num_resource: 0
+                        type: 15119
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 0
+                        num_resource: 2
+                        type: 15119
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 12
+                        num_resource: 20
+                        type: 15168
+                        host_id: 3
+                        reserved: 0
+                -
+                        start_resource: 36
+                        num_resource: 28
+                        type: 15168
+                        host_id: 5
+                        reserved: 0
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [uU PATCH 5/8] binman: sysfw: Add support for packaging tiboot3.bin and sysfw.itb
  2022-04-01 14:12 [uU PATCH 0/8] Integration of sysfw and tispl with U-Boot build Neha Malcom Francis
                   ` (3 preceding siblings ...)
  2022-04-01 14:12 ` [uU PATCH 4/8] config: yaml: j721e_evm: Add board config for J721E EVM Neha Malcom Francis
@ 2022-04-01 14:12 ` Neha Malcom Francis
  2022-04-01 14:12 ` [uU PATCH 6/8] binman: dtsi: sysfw: j721e: Use binman to package sysfw.itb Neha Malcom Francis
                   ` (2 subsequent siblings)
  7 siblings, 0 replies; 9+ messages in thread
From: Neha Malcom Francis @ 2022-04-01 14:12 UTC (permalink / raw)
  To: a-govindraju, vigneshr, nm
  Cc: sjg, marek.behun, xypron.glpk, n-francis, s-anna, kristo, kishon,
	bmeng.cn, email2tema, joel.peshkin, ilias.apalodimas,
	patrick.delaunay, mr.nuke.me, u-boot

For devices that require sysfw.itb, board config binary artifacts must
be populated in the R5 output directory. These can be used by binman to
package sysfw.itb.

config.mk for mach-k3 updated to generate the required binaries using
tibcfg_gen.py.

K3_CERT_GEN has been introduced in config.mk to remove hardcoding of the
certificate signing script.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
 arch/arm/mach-k3/config.mk | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk
index da458bcfb2..5491fc4dc8 100644
--- a/arch/arm/mach-k3/config.mk
+++ b/arch/arm/mach-k3/config.mk
@@ -13,6 +13,7 @@ endif
 
 IMAGE_SIZE= $(shell cat $(obj)/u-boot-spl.bin | wc -c)
 MAX_SIZE= $(shell printf "%d" $(CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE))
+K3_CERT_GEN= $(srctree)/tools/k3_gen_x509_cert.sh
 
 ifeq ($(CONFIG_SYS_K3_KEY), "")
 KEY=""
@@ -28,6 +29,24 @@ else
 KEY=$(patsubst "%",$(srctree)/%,$(CONFIG_SYS_K3_KEY))
 endif
 
+# Board config binary artifacts necessary for packaging of tiboot3.bin
+# and sysfw.itb by binman, currently for general purpose devices and
+# devices that require sysfw.itb in ROM boot image. Currently set up
+# for J721E
+ifneq ($(CONFIG_SOC_K3_J721E), )
+ifneq ($(CONFIG_TI_SECURE_DEVICE), y)
+
+CONFIG_YAML = $(srctree)/board/ti/$(BOARD)/config.yaml
+SCHEMA_YAML = $(srctree)/board/ti/common/schema.yaml
+board-cfg.bin pm-cfg.bin rm-cfg.bin sec-cfg.bin:
+	$(PYTHON3) $(srctree)/tools/tibcfg_gen.py $(CONFIG_YAML) $(SCHEMA_YAML)
+INPUTS-y	+= board-cfg.bin
+INPUTS-y	+= pm-cfg.bin
+INPUTS-y	+= rm-cfg.bin
+INPUTS-y	+= sec-cfg.bin
+endif
+endif
+
 # tiboot3.bin is mandated by ROM and ROM only supports R5 boot.
 # So restrict tiboot3.bin creation for CPU_V7R.
 ifdef CONFIG_CPU_V7R
@@ -41,7 +60,7 @@ image_check: $(obj)/u-boot-spl.bin FORCE
 	fi
 
 tiboot3.bin: image_check FORCE
-	$(srctree)/tools/k3_gen_x509_cert.sh -c 16 -b $(obj)/u-boot-spl.bin \
+	$(K3_CERT_GEN) -c 16 -b $(obj)/u-boot-spl.bin \
 				-o $@ -l $(CONFIG_SPL_TEXT_BASE) -k $(KEY)
 
 INPUTS-y	+= tiboot3.bin
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [uU PATCH 6/8] binman: dtsi: sysfw: j721e: Use binman to package sysfw.itb
  2022-04-01 14:12 [uU PATCH 0/8] Integration of sysfw and tispl with U-Boot build Neha Malcom Francis
                   ` (4 preceding siblings ...)
  2022-04-01 14:12 ` [uU PATCH 5/8] binman: sysfw: Add support for packaging tiboot3.bin and sysfw.itb Neha Malcom Francis
@ 2022-04-01 14:12 ` Neha Malcom Francis
  2022-04-01 14:12 ` [uU PATCH 7/8] binman: etype: dm: Add entry type for TI DM Neha Malcom Francis
  2022-04-01 14:12 ` [uU PATCH 8/8] binman: dtsi: tispl: j721e: Use binman to package tispl.bin Neha Malcom Francis
  7 siblings, 0 replies; 9+ messages in thread
From: Neha Malcom Francis @ 2022-04-01 14:12 UTC (permalink / raw)
  To: a-govindraju, vigneshr, nm
  Cc: sjg, marek.behun, xypron.glpk, n-francis, s-anna, kristo, kishon,
	bmeng.cn, email2tema, joel.peshkin, ilias.apalodimas,
	patrick.delaunay, mr.nuke.me, u-boot

By providing entries in the binman node of the device tree, binman will
be able to find and package board config binary artifacts generated by
TIBoardConfig with sysfw.bin and generate the final image sysfw.itb.

j721e-r5-binman.dtsi has been introduced for R5 specific binman node. It
can be then be include by files that require it like
k3-j721e-r5-common-proc-board-u-boot.dtsi.

Signed-off-by: Tarun Sahu <t-sahu@ti.com>
[n-francis@ti.com: prepared patch for upstreaming]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
 arch/arm/dts/j721e-r5-binman.dtsi             | 75 +++++++++++++++++++
 .../k3-j721e-r5-common-proc-board-u-boot.dtsi |  1 +
 board/ti/j721e/Kconfig                        |  1 +
 3 files changed, 77 insertions(+)
 create mode 100644 arch/arm/dts/j721e-r5-binman.dtsi

diff --git a/arch/arm/dts/j721e-r5-binman.dtsi b/arch/arm/dts/j721e-r5-binman.dtsi
new file mode 100644
index 0000000000..6e69084eaa
--- /dev/null
+++ b/arch/arm/dts/j721e-r5-binman.dtsi
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+
+#include <config.h>
+
+/ {
+	binman: binman {
+		multiple-images;
+	};
+};
+
+&binman {
+	binary {
+		filename = "sysfw.bin";
+		sysfw {
+			filename = "ti-fs-firmware-j721e-gp.bin";
+			device = "j721e";
+			load = <0x0040000>;
+		};
+	};
+	itb {
+		filename = "sysfw.itb";
+		fit {
+			description = "SYSFW and Config Fragments";
+			#address-cells = <1>;
+			images {
+				sysfw.bin {
+					description = "sysfw";
+					type = "firmware";
+					arch = "arm";
+					compression = "none";
+					blob-ext {
+						filename = "sysfw.bin";
+					};
+				};
+				board-cfg.bin {
+					description = "board-cfg";
+					type = "firmware";
+					arch = "arm";
+					compression = "none";
+					blob-ext {
+						filename = "board-cfg.bin";
+					};
+				};
+				pm-cfg.bin {
+					description = "pm-cfg";
+					type = "firmware";
+					arch = "arm";
+					compression = "none";
+					blob-ext {
+						filename = "pm-cfg.bin";
+					};
+				};
+				rm-cfg.bin {
+					description = "rm-cfg";
+					type = "firmware";
+					arch = "arm";
+					compression = "none";
+					blob-ext {
+						filename = "rm-cfg.bin";
+					};
+				};
+				sec-cfg.bin {
+					description = "sec-cfg";
+					type = "firmware";
+					arch = "arm";
+					compression = "none";
+					blob-ext {
+						filename = "sec-cfg.bin";
+					};
+				};
+			};
+		};
+	};
+};
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi
index 48c6ddf672..75fae60a97 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi
@@ -4,6 +4,7 @@
  */
 
 #include "k3-j721e-common-proc-board-u-boot.dtsi"
+#include "j721e-r5-binman.dtsi"
 
 / {
 	chosen {
diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig
index c28752a658..a3a9d504ae 100644
--- a/board/ti/j721e/Kconfig
+++ b/board/ti/j721e/Kconfig
@@ -24,6 +24,7 @@ config TARGET_J721E_R5_EVM
 	select RAM
 	select SPL_RAM
 	select K3_DDRSS
+	select BINMAN
 	imply SYS_K3_SPL_ATF
 	imply TI_I2C_BOARD_DETECT
 
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [uU PATCH 7/8] binman: etype: dm: Add entry type for TI DM
  2022-04-01 14:12 [uU PATCH 0/8] Integration of sysfw and tispl with U-Boot build Neha Malcom Francis
                   ` (5 preceding siblings ...)
  2022-04-01 14:12 ` [uU PATCH 6/8] binman: dtsi: sysfw: j721e: Use binman to package sysfw.itb Neha Malcom Francis
@ 2022-04-01 14:12 ` Neha Malcom Francis
  2022-04-01 14:12 ` [uU PATCH 8/8] binman: dtsi: tispl: j721e: Use binman to package tispl.bin Neha Malcom Francis
  7 siblings, 0 replies; 9+ messages in thread
From: Neha Malcom Francis @ 2022-04-01 14:12 UTC (permalink / raw)
  To: a-govindraju, vigneshr, nm
  Cc: sjg, marek.behun, xypron.glpk, n-francis, s-anna, kristo, kishon,
	bmeng.cn, email2tema, joel.peshkin, ilias.apalodimas,
	patrick.delaunay, mr.nuke.me, u-boot

K3 devices introduces the concept of centralized power, resource and
security management to System Firmware. This is to overcome challenges
by the traditional approach that implements system control functions on
each of the processing units.

The software interface for System Firmware is split into TIFS and DM. DM
(Device Manager) is responsible for resource and power management from
secure and non-secure hosts. This additional binary is necessary for
specific platforms' ROM boot images and is to be packaged into tispl.bin

Add an entry for DM. The entry can be used for the packaging of
tispl.bin by binman along with ATF and TEE.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
 Makefile                        |  1 +
 tools/binman/entries.rst        | 10 ++++++++++
 tools/binman/etype/ti_dm.py     | 22 ++++++++++++++++++++++
 tools/binman/ftest.py           |  7 +++++++
 tools/binman/test/225_ti_dm.dts | 13 +++++++++++++
 5 files changed, 53 insertions(+)
 create mode 100644 tools/binman/etype/ti_dm.py
 create mode 100644 tools/binman/test/225_ti_dm.dts

diff --git a/Makefile b/Makefile
index 4672147318..dd3403f912 100644
--- a/Makefile
+++ b/Makefile
@@ -1328,6 +1328,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
 		$(foreach f,$(BINMAN_INDIRS),-I $(f)) \
 		-a atf-bl31-path=${BL31} \
 		-a tee-os-path=${TEE} \
+		-a ti-dm-path=${DM} \
 		-a opensbi-path=${OPENSBI} \
 		-a default-dt=$(default_dt) \
 		-a scp-path=$(SCP) \
diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index 7c95bbfbec..cf392b6e32 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -1030,6 +1030,16 @@ devices.
 
 
 
+Entry: ti-dm: Texas Instruments Device Manager (DM) blob
+-----------------------------------------------------------------
+
+Properties / Entry arguments:
+    - ti-dm-path: Filename of file to read into the entry, typically dm.bin
+
+This entry holds the device manager responsible for resource and power management in K3 devices.
+
+
+
 Entry: section: Entry that contains other entries
 -------------------------------------------------
 
diff --git a/tools/binman/etype/ti_dm.py b/tools/binman/etype/ti_dm.py
new file mode 100644
index 0000000000..f44ee21777
--- /dev/null
+++ b/tools/binman/etype/ti_dm.py
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Entry type for TI Device Manager
+
+from binman.etype.blob_named_by_arg import Entry_blob_named_by_arg
+import os
+
+
+class Entry_ti_dm(Entry_blob_named_by_arg):
+    """Entry containing a Device Manager (DM)
+
+    Properties / Entry arguments:
+        - ti-dm-path: Filename of file to read into the entry, typically dm.bin
+
+    This entry holds the device manager responsible for resource and power management
+    in K3 devices.
+    """
+
+    def __init__(self, section, etype, node):
+        super().__init__(section, etype, node, 'ti-dm')
+        self.external = True
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index 7c12058fe4..52bfbe792c 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -85,6 +85,7 @@ FSP_S_DATA            = b'fsp_s'
 FSP_T_DATA            = b'fsp_t'
 ATF_BL31_DATA         = b'bl31'
 TEE_OS_DATA           = b'this is some tee OS data'
+TI_DM_DATA            = b'tidmtidm'
 ATF_BL2U_DATA         = b'bl2u'
 OPENSBI_DATA          = b'opensbi'
 SYSFW_DATA            = b'sysfw'
@@ -191,6 +192,7 @@ class TestFunctional(unittest.TestCase):
         TestFunctional._MakeInputFile('compress_big', COMPRESS_DATA_BIG)
         TestFunctional._MakeInputFile('bl31.bin', ATF_BL31_DATA)
         TestFunctional._MakeInputFile('tee-pager.bin', TEE_OS_DATA)
+        TestFunctional._MakeInputFile('dm.bin', TI_DM_DATA)
         TestFunctional._MakeInputFile('bl2u.bin', ATF_BL2U_DATA)
         TestFunctional._MakeInputFile('fw_dynamic.bin', OPENSBI_DATA)
         TestFunctional._MakeInputFile('sysfw.bin', SYSFW_DATA)
@@ -5305,6 +5307,11 @@ fdt         fdtmap                Extract the devicetree blob from the fdtmap
         data = self._DoReadFile('222_tee_os.dts')
         self.assertEqual(TEE_OS_DATA, data[:len(TEE_OS_DATA)])
 
+    def testPackTiDm(self):
+        """Test that an image with a TI DM binary can be created"""
+        data = self._DoReadFile('225_ti_dm.dts')
+        self.assertEqual(TI_DM_DATA, data[:len(TI_DM_DATA)])
+
     def testFitFdtOper(self):
         """Check handling of a specified FIT operation"""
         entry_args = {
diff --git a/tools/binman/test/225_ti_dm.dts b/tools/binman/test/225_ti_dm.dts
new file mode 100644
index 0000000000..3ab754131e
--- /dev/null
+++ b/tools/binman/test/225_ti_dm.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	binman {
+		ti-dm {
+			filename = "dm.bin";
+		};
+	};
+};
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [uU PATCH 8/8] binman: dtsi: tispl: j721e: Use binman to package tispl.bin
  2022-04-01 14:12 [uU PATCH 0/8] Integration of sysfw and tispl with U-Boot build Neha Malcom Francis
                   ` (6 preceding siblings ...)
  2022-04-01 14:12 ` [uU PATCH 7/8] binman: etype: dm: Add entry type for TI DM Neha Malcom Francis
@ 2022-04-01 14:12 ` Neha Malcom Francis
  7 siblings, 0 replies; 9+ messages in thread
From: Neha Malcom Francis @ 2022-04-01 14:12 UTC (permalink / raw)
  To: a-govindraju, vigneshr, nm
  Cc: sjg, marek.behun, xypron.glpk, n-francis, s-anna, kristo, kishon,
	bmeng.cn, email2tema, joel.peshkin, ilias.apalodimas,
	patrick.delaunay, mr.nuke.me, u-boot

Explicit make commands were earlier used to generate tispl.bin image,
now it is replaced using binman.

Binman picks up and packages entries according to the description of
entries given in the binman node in the device tree. The make commands
that were earlier responsible for generating tispl.bin has been removed.

j721e-a72-binman.dtsi has been introduced for A72 specific binman node.
It can be included in files that require it like
k3-j721e-common-proc-board-u-boot.dtsi.

Note that make commands for secure devices has also been removed as
focus is on general purpose devices at present time.

Signed-off-by: Tarun Sahu <t-sahu@ti.com>
[n-francis@ti.com: prepared patch for upstreaming]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
 arch/arm/dts/j721e-a72-binman.dtsi            | 92 +++++++++++++++++++
 .../k3-j721e-common-proc-board-u-boot.dtsi    |  1 +
 arch/arm/mach-k3/config.mk                    | 33 -------
 board/ti/j721e/Kconfig                        |  1 +
 scripts/Makefile.spl                          |  4 -
 5 files changed, 94 insertions(+), 37 deletions(-)
 create mode 100644 arch/arm/dts/j721e-a72-binman.dtsi

diff --git a/arch/arm/dts/j721e-a72-binman.dtsi b/arch/arm/dts/j721e-a72-binman.dtsi
new file mode 100644
index 0000000000..a01b1fcc6d
--- /dev/null
+++ b/arch/arm/dts/j721e-a72-binman.dtsi
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+
+#include <config.h>
+
+#ifdef CONFIG_ARM64
+/ {
+	binman: binman {
+		multiple-images;
+	};
+};
+
+&binman {
+	tispl {
+		filename = "tispl.bin";
+		fit {
+			description = "FIT IMAGE";
+			#address-cells = <1>;
+			fit,fdt-list = "of-list";
+			images {
+				atf {
+					description = "ARM Trusted Firmware";
+					type = "firmware";
+					arch = "arm64";
+					compression = "none";
+					os = "arm-trusted-firmware";
+					load = <CONFIG_K3_ATF_LOAD_ADDR>;
+					entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+					atf-bl31 {
+						filename = "bl31.bin";
+					};
+				};
+				tee {
+					description = "OPTEE";
+					type = "tee";
+					arch = "arm64";
+					compression = "none";
+					os = "tee";
+					load = <0x9e800000>;
+					entry = <0x9e800000>;
+					tee-os {
+						filename = "tee-pager.bin";
+						missing-msg = "tee-os";
+					};
+				};
+				dm {
+					description = "DM binary";
+					type = "firmware";
+					arch = "arm32";
+					compression = "none";
+					os = "DM";
+					load = <0x89000000>;
+					entry = <0x89000000>;
+					ti-dm {
+						filename = "dm.bin";
+					};
+				};
+				spl {
+					description = "SPL (64-bit)";
+					type = "standalone";
+					os = "U-Boot";
+					arch = "arm64";
+					compression = "none";
+					load = <0x80080000>;
+					entry = <0x80080000>;
+					blob-ext {
+						filename = "spl/u-boot-spl-nodtb.bin";
+					};
+				};
+				k3-j721e-common-proc-board.dtb {
+					description = "k3-j721e-common-proc-board";
+					type = "flat_dt";
+					arch = "arm";
+					compression = "none";
+					blob-ext {
+					filename = "spl/dts/k3-j721e-common-proc-board.dtb";
+					};
+				};
+			};
+			configurations {
+				default = "conf";
+				conf {
+					description = "k3-j721e-common-proc-board";
+					firmware = "atf";
+					loadables = "tee", "dm", "spl";
+					fdt = "k3-j721e-common-proc-board.dtb";
+				};
+			};
+		};
+	};
+};
+#endif
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index 677a72d2a2..78ec6b1d48 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/net/ti-dp83867.h>
+#include "j721e-a72-binman.dtsi"
 
 / {
 	chosen {
diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk
index 5491fc4dc8..e4b94564b8 100644
--- a/arch/arm/mach-k3/config.mk
+++ b/arch/arm/mach-k3/config.mk
@@ -72,38 +72,5 @@ ifeq ($(CONFIG_SOC_K3_J721E),)
 export DM := /dev/null
 endif
 
-ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
-SPL_ITS := u-boot-spl-k3_HS.its
-$(SPL_ITS): export IS_HS=1
-INPUTS-y	+= tispl.bin_HS
-else
-SPL_ITS := u-boot-spl-k3.its
-INPUTS-y	+= tispl.bin
-endif
-
-ifeq ($(CONFIG_SPL_OF_LIST),)
-LIST_OF_DTB := $(CONFIG_DEFAULT_DEVICE_TREE)
-else
-LIST_OF_DTB := $(CONFIG_SPL_OF_LIST)
 endif
-
-quiet_cmd_k3_mkits = MKITS   $@
-cmd_k3_mkits = \
-	$(srctree)/tools/k3_fit_atf.sh \
-	$(CONFIG_K3_ATF_LOAD_ADDR) \
-	$(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(LIST_OF_DTB))) > $@
-
-$(SPL_ITS): FORCE
-	$(call cmd,k3_mkits)
 endif
-
-else
-
-ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
-INPUTS-y	+= u-boot.img_HS
-else
-INPUTS-y	+= u-boot.img
-endif
-endif
-
-include $(srctree)/arch/arm/mach-k3/config_secure.mk
diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig
index a3a9d504ae..3cf05f0d3b 100644
--- a/board/ti/j721e/Kconfig
+++ b/board/ti/j721e/Kconfig
@@ -14,6 +14,7 @@ config TARGET_J721E_A72_EVM
 	select BOARD_LATE_INIT
 	imply TI_I2C_BOARD_DETECT
 	select SYS_DISABLE_DCACHE_OPS
+	select BINMAN
 
 config TARGET_J721E_R5_EVM
 	bool "TI K3 based J721E EVM running on R5"
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 83a95ee4aa..21dc434449 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -574,7 +574,3 @@ $(obj)/$(SPL_BIN).multidtb.fit.gz: $(obj)/$(SPL_BIN).multidtb.fit
 $(obj)/$(SPL_BIN).multidtb.fit.lzo: $(obj)/$(SPL_BIN).multidtb.fit
 	@lzop -f9 $< > $@
 
-ifdef CONFIG_ARCH_K3
-tispl.bin: $(obj)/u-boot-spl-nodtb.bin $(SHRUNK_ARCH_DTB) $(SPL_ITS) FORCE
-	$(call if_changed,mkfitimage)
-endif
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2022-04-01 14:18 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-04-01 14:12 [uU PATCH 0/8] Integration of sysfw and tispl with U-Boot build Neha Malcom Francis
2022-04-01 14:12 ` [uU PATCH 1/8] tools: config: yaml: Add board config class to generate config binaries Neha Malcom Francis
2022-04-01 14:12 ` [uU PATCH 2/8] binman: etype: sysfw: Add entry type for sysfw Neha Malcom Francis
2022-04-01 14:12 ` [uU PATCH 3/8] schema: yaml: Add board config schema Neha Malcom Francis
2022-04-01 14:12 ` [uU PATCH 4/8] config: yaml: j721e_evm: Add board config for J721E EVM Neha Malcom Francis
2022-04-01 14:12 ` [uU PATCH 5/8] binman: sysfw: Add support for packaging tiboot3.bin and sysfw.itb Neha Malcom Francis
2022-04-01 14:12 ` [uU PATCH 6/8] binman: dtsi: sysfw: j721e: Use binman to package sysfw.itb Neha Malcom Francis
2022-04-01 14:12 ` [uU PATCH 7/8] binman: etype: dm: Add entry type for TI DM Neha Malcom Francis
2022-04-01 14:12 ` [uU PATCH 8/8] binman: dtsi: tispl: j721e: Use binman to package tispl.bin Neha Malcom Francis

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