From: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
To: <u-boot@lists.denx.de>
Cc: <sandeep.sheriker@microchip.com>, <eugen.hristev@microchip.com>,
<dario.binacchi@amarulasolutions.com>,
<michael@amarulasolutions.com>, <mihai.sain@microchip.com>,
<sergiu.moga@microchip.com>,
<balamanikandan.gunasundar@microchip.com>,
<claudiu.beznea@microchip.com>, <hs@denx.de>,
<tudor.ambarus@microchip.com>, <sjg@chromium.org>,
<ascull@google.com>, <kettenis@openbsd.org>,
<jh80.chung@samsung.com>, <peng.fan@nxp.com>, <ye.li@nxp.com>,
<hari.prasathge@microchip.com>
Subject: [PATCH v2 3/9] mfd: syscon: Add atmel-matrix registers definition
Date: Mon, 29 Aug 2022 11:49:22 +0530 [thread overview]
Message-ID: <20220829061928.21895-4-balamanikandan.gunasundar@microchip.com> (raw)
In-Reply-To: <20220829061928.21895-1-balamanikandan.gunasundar@microchip.com>
This file is copied from Linux. AT91 SoCs have a memory range reserved
for internal bus configuration. Expose those registers so that drivers
can make use of the matrix syscon declared in at91 DTs.
Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
---
include/linux/mfd/syscon/atmel-matrix.h | 112 ++++++++++++++++++++++++
1 file changed, 112 insertions(+)
create mode 100644 include/linux/mfd/syscon/atmel-matrix.h
diff --git a/include/linux/mfd/syscon/atmel-matrix.h b/include/linux/mfd/syscon/atmel-matrix.h
new file mode 100644
index 0000000000..dd228cab67
--- /dev/null
+++ b/include/linux/mfd/syscon/atmel-matrix.h
@@ -0,0 +1,112 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2014 Atmel Corporation.
+ *
+ * Memory Controllers (MATRIX, EBI) - System peripherals registers.
+ */
+
+#ifndef _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
+#define _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
+
+#define AT91SAM9260_MATRIX_MCFG 0x00
+#define AT91SAM9260_MATRIX_SCFG 0x40
+#define AT91SAM9260_MATRIX_PRS 0x80
+#define AT91SAM9260_MATRIX_MRCR 0x100
+#define AT91SAM9260_MATRIX_EBICSA 0x11c
+
+#define AT91SAM9261_MATRIX_MRCR 0x0
+#define AT91SAM9261_MATRIX_SCFG 0x4
+#define AT91SAM9261_MATRIX_TCR 0x24
+#define AT91SAM9261_MATRIX_EBICSA 0x30
+#define AT91SAM9261_MATRIX_USBPUCR 0x34
+
+#define AT91SAM9263_MATRIX_MCFG 0x00
+#define AT91SAM9263_MATRIX_SCFG 0x40
+#define AT91SAM9263_MATRIX_PRS 0x80
+#define AT91SAM9263_MATRIX_MRCR 0x100
+#define AT91SAM9263_MATRIX_TCR 0x114
+#define AT91SAM9263_MATRIX_EBI0CSA 0x120
+#define AT91SAM9263_MATRIX_EBI1CSA 0x124
+
+#define AT91SAM9RL_MATRIX_MCFG 0x00
+#define AT91SAM9RL_MATRIX_SCFG 0x40
+#define AT91SAM9RL_MATRIX_PRS 0x80
+#define AT91SAM9RL_MATRIX_MRCR 0x100
+#define AT91SAM9RL_MATRIX_TCR 0x114
+#define AT91SAM9RL_MATRIX_EBICSA 0x120
+
+#define AT91SAM9G45_MATRIX_MCFG 0x00
+#define AT91SAM9G45_MATRIX_SCFG 0x40
+#define AT91SAM9G45_MATRIX_PRS 0x80
+#define AT91SAM9G45_MATRIX_MRCR 0x100
+#define AT91SAM9G45_MATRIX_TCR 0x110
+#define AT91SAM9G45_MATRIX_DDRMPR 0x118
+#define AT91SAM9G45_MATRIX_EBICSA 0x128
+
+#define AT91SAM9N12_MATRIX_MCFG 0x00
+#define AT91SAM9N12_MATRIX_SCFG 0x40
+#define AT91SAM9N12_MATRIX_PRS 0x80
+#define AT91SAM9N12_MATRIX_MRCR 0x100
+#define AT91SAM9N12_MATRIX_EBICSA 0x118
+
+#define AT91SAM9X5_MATRIX_MCFG 0x00
+#define AT91SAM9X5_MATRIX_SCFG 0x40
+#define AT91SAM9X5_MATRIX_PRS 0x80
+#define AT91SAM9X5_MATRIX_MRCR 0x100
+#define AT91SAM9X5_MATRIX_EBICSA 0x120
+
+#define SAMA5D3_MATRIX_MCFG 0x00
+#define SAMA5D3_MATRIX_SCFG 0x40
+#define SAMA5D3_MATRIX_PRS 0x80
+#define SAMA5D3_MATRIX_MRCR 0x100
+
+#define AT91_MATRIX_MCFG(o, x) ((o) + ((x) * 0x4))
+#define AT91_MATRIX_ULBT GENMASK(2, 0)
+#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
+#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
+#define AT91_MATRIX_ULBT_FOUR (2 << 0)
+#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
+#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
+
+#define AT91_MATRIX_SCFG(o, x) ((o) + ((x) * 0x4))
+#define AT91_MATRIX_SLOT_CYCLE GENMASK(7, 0)
+#define AT91_MATRIX_DEFMSTR_TYPE GENMASK(17, 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
+#define AT91_MATRIX_FIXED_DEFMSTR GENMASK(20, 18)
+#define AT91_MATRIX_ARBT GENMASK(25, 24)
+#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
+#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
+
+#define AT91_MATRIX_ITCM_SIZE GENMASK(3, 0)
+#define AT91_MATRIX_ITCM_0 (0 << 0)
+#define AT91_MATRIX_ITCM_16 (5 << 0)
+#define AT91_MATRIX_ITCM_32 (6 << 0)
+#define AT91_MATRIX_ITCM_64 (7 << 0)
+#define AT91_MATRIX_DTCM_SIZE GENMASK(7, 4)
+#define AT91_MATRIX_DTCM_0 (0 << 4)
+#define AT91_MATRIX_DTCM_16 (5 << 4)
+#define AT91_MATRIX_DTCM_32 (6 << 4)
+#define AT91_MATRIX_DTCM_64 (7 << 4)
+
+#define AT91_MATRIX_PRAS(o, x) ((o) + ((x) * 0x8))
+#define AT91_MATRIX_PRBS(o, x) ((o) + ((x) * 0x8) + 0x4)
+#define AT91_MATRIX_MPR(x) GENMASK(((x) * 0x4) + 1, ((x) * 0x4))
+
+#define AT91_MATRIX_RCB(x) BIT(x)
+
+#define AT91_MATRIX_CSA(cs, val) ((val) << (cs))
+#define AT91_MATRIX_DBPUC BIT(8)
+#define AT91_MATRIX_DBPDC BIT(9)
+#define AT91_MATRIX_VDDIOMSEL BIT(16)
+#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16)
+#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16)
+#define AT91_MATRIX_EBI_IOSR BIT(17)
+#define AT91_MATRIX_DDR_IOSR BIT(18)
+#define AT91_MATRIX_NFD0_SELECT BIT(24)
+#define AT91_MATRIX_DDR_MP_EN BIT(25)
+
+#define AT91_MATRIX_USBPUCR_PUON BIT(30)
+
+#endif /* _LINUX_MFD_SYSCON_ATMEL_MATRIX_H */
--
2.34.1
next prev parent reply other threads:[~2022-08-29 6:20 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-29 6:19 [PATCH v2 0/9] Add DM support for atmel NAND driver Balamanikandan Gunasundar
2022-08-29 6:19 ` [PATCH v2 1/9] nand: atmel: Add DM based " Balamanikandan Gunasundar
2022-09-05 8:55 ` Eugen.Hristev
2022-08-29 6:19 ` [PATCH v2 2/9] nand: atmel: Add pmecc driver Balamanikandan Gunasundar
2022-08-29 6:19 ` Balamanikandan Gunasundar [this message]
2022-08-29 6:19 ` [PATCH v2 4/9] memory: atmel-ebi: add Atmel EBI (External Bus Interface) driver Balamanikandan Gunasundar
2022-08-29 6:19 ` [PATCH v2 5/9] mfd: syscon: atmel-smc: Add driver for atmel SMC Balamanikandan Gunasundar
2022-08-31 12:53 ` Michael Nazzareno Trimarchi
2022-09-30 11:02 ` Michael Nazzareno Trimarchi
2022-09-30 14:00 ` Tom Rini
2022-08-29 6:19 ` [PATCH v2 6/9] configs: at91: sam9x60ek: Enable DM based nand driver Balamanikandan Gunasundar
2022-08-29 6:19 ` [PATCH v2 7/9] ARM: dts: at91: sam9x60: Add nodes for EBI and NAND Balamanikandan Gunasundar
2022-08-29 6:19 ` [PATCH v2 8/9] ARM: dts: at91: sam9x60ek: Enable NAND support Balamanikandan Gunasundar
2022-08-31 13:14 ` Michael Nazzareno Trimarchi
2022-08-31 13:31 ` Eugen.Hristev
2022-08-31 14:19 ` Michael Nazzareno Trimarchi
2022-09-01 5:57 ` Eugen.Hristev
2022-09-20 8:41 ` Dario Binacchi
2022-08-29 6:19 ` [PATCH v2 9/9] board: sam9x60ek: remove nand init from board file Balamanikandan Gunasundar
2022-08-29 6:41 ` [PATCH v2 0/9] Add DM support for atmel NAND driver Michael Nazzareno Trimarchi
2022-08-30 2:30 ` Simon Glass
2022-08-31 6:34 ` Eugen.Hristev
2022-08-31 6:37 ` Michael Nazzareno Trimarchi
2022-08-31 13:46 ` Simon Glass
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220829061928.21895-4-balamanikandan.gunasundar@microchip.com \
--to=balamanikandan.gunasundar@microchip.com \
--cc=ascull@google.com \
--cc=claudiu.beznea@microchip.com \
--cc=dario.binacchi@amarulasolutions.com \
--cc=eugen.hristev@microchip.com \
--cc=hari.prasathge@microchip.com \
--cc=hs@denx.de \
--cc=jh80.chung@samsung.com \
--cc=kettenis@openbsd.org \
--cc=michael@amarulasolutions.com \
--cc=mihai.sain@microchip.com \
--cc=peng.fan@nxp.com \
--cc=sandeep.sheriker@microchip.com \
--cc=sergiu.moga@microchip.com \
--cc=sjg@chromium.org \
--cc=tudor.ambarus@microchip.com \
--cc=u-boot@lists.denx.de \
--cc=ye.li@nxp.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).